1 /* $NetBSD: pq3duart.c,v 1.2 2011/01/18 01:02:53 matt Exp $ */ 2 /*- 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 * 10 * This material is based upon work supported by the Defense Advanced Research 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 * Contract No. N66001-09-C-2073. 13 * Approved for Public Release, Distribution Unlimited 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #include <sys/cdefs.h> 38 39 #include <sys/param.h> 40 #include <sys/cpu.h> 41 #include <sys/device.h> 42 #include <sys/tty.h> 43 44 #include "ioconf.h" 45 46 #include <sys/intr.h> 47 #include <sys/bus.h> 48 49 #include <dev/ic/comreg.h> 50 #include <dev/ic/comvar.h> 51 52 #include <powerpc/booke/cpuvar.h> 53 #include <powerpc/booke/e500var.h> 54 #include <powerpc/booke/e500reg.h> 55 56 struct pq3duart_softc { 57 device_t dsc_dev; 58 struct com_softc *dsc_sc[2]; 59 bus_space_tag_t dsc_memt; 60 bus_addr_t dsc_base; 61 void *dsc_ih; 62 }; 63 64 struct pq3duart_attach_args { 65 const char *da_busname; 66 bus_space_tag_t da_memt; 67 bus_addr_t da_addr; 68 bus_addr_t da_size; 69 u_int da_port; 70 }; 71 72 static int pq3duart_match(device_t, cfdata_t, void *); 73 static void pq3duart_attach(device_t, device_t, void *); 74 static int com_pq3duart_match(device_t, cfdata_t, void *); 75 static void com_pq3duart_attach(device_t, device_t, void *); 76 77 CFATTACH_DECL_NEW(pq3duart, sizeof(struct pq3duart_softc), 78 pq3duart_match, pq3duart_attach, NULL, NULL); 79 80 CFATTACH_DECL_NEW(com_pq3duart, sizeof(struct com_softc), 81 com_pq3duart_match, com_pq3duart_attach, NULL, NULL); 82 83 static int 84 pq3duart_match(device_t parent, cfdata_t cf, void *aux) 85 { 86 87 if (!e500_cpunode_submatch(parent, cf, cf->cf_name, aux)) 88 return 0; 89 90 return 1; 91 } 92 93 static int 94 com_pq3duart_match(device_t parent, cfdata_t cfdata, void *aux) 95 { 96 struct pq3duart_softc * const dsc = device_private(parent); 97 struct pq3duart_attach_args * const da = aux; 98 struct com_regs regs; 99 100 if ((da->da_port != 1 && da->da_port != 2) 101 || dsc->dsc_sc[da->da_port-1] != NULL) 102 return 0; 103 104 bus_space_tag_t memt = da->da_memt; 105 bus_addr_t addr = da->da_addr; 106 bus_addr_t size = da->da_size; 107 bus_space_handle_t memh; 108 109 if (com_is_console(memt, addr, &memh)) 110 return 1; 111 112 if (bus_space_map(memt, addr, size, 0, &memh)) 113 return 0; 114 115 COM_INIT_REGS(regs, memt, memh, addr); 116 117 int rv = com_probe_subr(®s); 118 119 bus_space_unmap(memt, memh, size); 120 121 return rv; 122 } 123 124 static int 125 pq3duart_intr(void *arg) 126 { 127 struct pq3duart_softc * const dsc = arg; 128 int rv = 0; 129 130 if (dsc->dsc_sc[0] != NULL) 131 rv += comintr(dsc->dsc_sc[0]); 132 if (dsc->dsc_sc[1] != NULL) 133 rv += comintr(dsc->dsc_sc[1]); 134 135 return rv; 136 } 137 138 static int 139 pq3duart_print(void *aux, const char *pnp) 140 { 141 struct pq3duart_attach_args * const da = aux; 142 143 if (pnp != NULL) 144 return QUIET; 145 146 aprint_normal(" port %d", da->da_port); 147 148 return UNCONF; 149 } 150 151 static void 152 pq3duart_attach(device_t parent, device_t self, void *aux) 153 { 154 struct cpunode_softc * const psc = device_private(parent); 155 struct pq3duart_softc * const dsc = device_private(self); 156 struct cpunode_attach_args * const cna = aux; 157 struct cpunode_locators * const cnl = &cna->cna_locs; 158 struct pq3duart_attach_args da; 159 u_int nports = cnl->cnl_size / DUART_SIZE; 160 161 psc->sc_children |= cna->cna_childmask; 162 dsc->dsc_dev = self; 163 164 aprint_normal(": %u ports\n", nports); 165 166 for (u_int port = 1; port <= min(2, nports); port++) { 167 da.da_memt = cna->cna_memt; 168 da.da_port = port; 169 da.da_addr = cnl->cnl_addr + (port - 1) * DUART_SIZE; 170 da.da_size = COM_NPORTS; 171 (void)config_found_sm_loc(self, "duart", NULL, 172 &da, pq3duart_print, NULL); 173 } 174 175 if (dsc->dsc_sc[0] != NULL || dsc->dsc_sc[1] != NULL) { 176 dsc->dsc_ih = intr_establish(cnl->cnl_intrs[0], IPL_SERIAL, 177 IST_ONCHIP, pq3duart_intr, dsc); 178 if (dsc->dsc_ih == NULL) 179 aprint_error_dev(self, 180 "failed to establish interrupt %d\n", 181 cnl->cnl_intrs[0]); 182 else 183 aprint_normal_dev(self, 184 "interrupting on irq %d\n", 185 cnl->cnl_intrs[0]); 186 } 187 } 188 189 static void 190 com_pq3duart_attach(device_t parent, device_t self, void *aux) 191 { 192 struct pq3duart_softc * const dsc = device_private(parent); 193 struct com_softc * const sc = device_private(self); 194 struct pq3duart_attach_args * const da = aux; 195 196 dsc->dsc_sc[da->da_port-1] = sc; 197 sc->sc_dev = self; 198 sc->sc_frequency = (int) board_info_get_number("bus-frequency"); 199 200 bus_space_tag_t memt = da->da_memt; 201 bus_addr_t addr = da->da_addr; 202 bus_addr_t size = da->da_size; 203 bus_space_handle_t memh; 204 205 if (!com_is_console(memt, addr, &memh)) { 206 int error = bus_space_map(memt, addr, size, 0, &memh); 207 if (error) { 208 aprint_error(": failed to map registers: %d\n", error); 209 return; 210 } 211 } 212 213 COM_INIT_REGS(sc->sc_regs, memt, memh, addr); 214 sc->sc_regs.cr_nports = size; 215 216 com_attach_subr(sc); 217 218 } 219