1 /* $NetBSD: e500wdog.c,v 1.2 2011/01/18 01:02:53 matt Exp $ */ 2 /*- 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 * 10 * This material is based upon work supported by the Defense Advanced Research 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 * Contract No. N66001-09-C-2073. 13 * Approved for Public Release, Distribution Unlimited 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #include <sys/cdefs.h> 38 39 #include <sys/param.h> 40 #include <sys/cpu.h> 41 #include <sys/device.h> 42 #include <sys/wdog.h> 43 44 #include <dev/sysmon/sysmonvar.h> 45 46 #include "ioconf.h" 47 48 #include <sys/intr.h> 49 50 #include <powerpc/spr.h> 51 #include <powerpc/booke/spr.h> 52 53 #include <powerpc/booke/cpuvar.h> 54 55 struct e500wdog_softc { 56 device_t sc_dev; 57 struct sysmon_wdog sc_smw; 58 u_int sc_wdog_period; 59 bool sc_wdog_armed; 60 uint64_t sc_timebase; 61 }; 62 #ifndef PQ3WDOG_PERIOD_DEFAULT 63 #define PQ3WDOG_PERIOD_DEFAULT 10 64 #endif 65 66 static int e500wdog_match(device_t, cfdata_t, void *); 67 static void e500wdog_attach(device_t, device_t, void *); 68 69 CFATTACH_DECL_NEW(e500wdog, sizeof(struct e500wdog_softc), 70 e500wdog_match, e500wdog_attach, NULL, NULL); 71 72 static int 73 e500wdog_match(device_t parent, cfdata_t cf, void *aux) 74 { 75 struct cpunode_softc * const psc = device_private(parent); 76 struct cpunode_attach_args * const cna = aux; 77 struct cpunode_locators * const cnl = &cna->cna_locs; 78 79 if (!board_info_get_bool("pq3") 80 || cnl->cnl_instance != 0 81 || (psc->sc_children & cna->cna_childmask) 82 || strcmp(cnl->cnl_name, "wdog") != 0) 83 return 0; 84 85 return 1; 86 } 87 88 static int 89 e500wdog_tickle(struct sysmon_wdog *smw) 90 { 91 mtspr(SPR_TSR, TSR_ENW); 92 return 0; 93 } 94 95 static int 96 e500wdog_setmode(struct sysmon_wdog *smw) 97 { 98 struct e500wdog_softc * const sc = smw->smw_cookie; 99 100 if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) { 101 /* 102 * We can't disarm the watchdog. 103 */ 104 if (sc->sc_wdog_armed) 105 return EBUSY; 106 } else { 107 /* 108 * If no changes, don't do anything. 109 */ 110 if (sc->sc_wdog_armed 111 && smw->smw_period == sc->sc_wdog_period) { 112 mtspr(SPR_TSR, TSR_ENW); 113 return 0; 114 } 115 printf("%s:%d %u %u\n", __func__, __LINE__, 116 sc->sc_wdog_period, smw->smw_period); 117 if (smw->smw_period == WDOG_PERIOD_DEFAULT) { 118 sc->sc_wdog_period = PQ3WDOG_PERIOD_DEFAULT; 119 smw->smw_period = PQ3WDOG_PERIOD_DEFAULT; 120 } 121 mtspr(SPR_TSR, TSR_ENW); 122 uint32_t tcr = mfspr(SPR_TCR); 123 if (!sc->sc_wdog_armed) 124 tcr = (tcr & ~TCR_WRC) | TCR_WRC_RESET | TCR_WIE; 125 const uint64_t period = sc->sc_wdog_period * sc->sc_timebase / 3; 126 const u_int wp = __builtin_clz(period) + 1; 127 tcr &= ~(TCR_WP|TCR_WPEXT); 128 tcr |= __SHIFTIN(wp, TCR_WP) | __SHIFTIN(wp >> 2, TCR_WPEXT); 129 mtspr(SPR_TCR, tcr); 130 sc->sc_wdog_period = 131 ((1ULL << (63 - wp)) + sc->sc_timebase - 1) 132 / sc->sc_timebase; 133 sc->sc_wdog_armed = true; 134 } 135 return 0; 136 } 137 138 static void 139 e500wdog_attach(device_t parent, device_t self, void *aux) 140 { 141 struct cpunode_softc * const psc = device_private(parent); 142 struct e500wdog_softc * const sc = device_private(self); 143 struct cpunode_attach_args * const cna = aux; 144 145 psc->sc_children |= cna->cna_childmask; 146 sc->sc_dev = self; 147 148 sc->sc_timebase = board_info_get_number("timebase-frequency"); 149 const uint32_t tcr = mfspr(SPR_TCR); 150 u_int wp = __SHIFTOUT(tcr, TCR_WP) | (__SHIFTOUT(tcr, TCR_WPEXT) << 2); 151 152 #if DEBUG > 1 153 printf(" tcr=%#x wp=%u", tcr, wp); 154 printf(" timebase=%"PRIu64, sc->sc_timebase); 155 #endif 156 sc->sc_wdog_armed = (tcr & TCR_WRC) != 0; 157 if (sc->sc_wdog_armed) 158 sc->sc_wdog_period = ((1ULL << (63 - wp)) + sc->sc_timebase - 1) 159 / sc->sc_timebase; 160 else 161 sc->sc_wdog_period = PQ3WDOG_PERIOD_DEFAULT; 162 163 aprint_normal(": default period is %u seconds%s\n", 164 sc->sc_wdog_period, 165 sc->sc_wdog_armed ? " (wdog is active)" : ""); 166 167 sc->sc_smw.smw_name = device_xname(sc->sc_dev); 168 sc->sc_smw.smw_cookie = sc; 169 sc->sc_smw.smw_setmode = e500wdog_setmode; 170 sc->sc_smw.smw_tickle = e500wdog_tickle; 171 sc->sc_smw.smw_period = sc->sc_wdog_period; 172 173 if (sysmon_wdog_register(&sc->sc_smw) != 0) 174 aprint_error_dev(self, "unable to register with sysmon\n"); 175 176 #if 1 177 if (sc->sc_wdog_armed) { 178 int error = sysmon_wdog_setmode(&sc->sc_smw, WDOG_MODE_KTICKLE, 179 sc->sc_wdog_period); 180 if (error) 181 aprint_error_dev(self, 182 "failed to start kernel tickler: %d\n", error); 183 } 184 #else 185 //mtspr(SPR_TSR, TSR_ENW); 186 #endif 187 } 188