1 /* $NetBSD: booke_pmap.c,v 1.18 2014/03/18 18:20:41 riastradh Exp $ */ 2 /*- 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 * 10 * This material is based upon work supported by the Defense Advanced Research 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 * Contract No. N66001-09-C-2073. 13 * Approved for Public Release, Distribution Unlimited 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #define __PMAP_PRIVATE 38 39 #include <sys/cdefs.h> 40 41 __KERNEL_RCSID(0, "$NetBSD: booke_pmap.c,v 1.18 2014/03/18 18:20:41 riastradh Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/kcore.h> 45 #include <sys/buf.h> 46 47 #include <uvm/uvm.h> 48 49 #include <machine/pmap.h> 50 51 /* 52 * Initialize the kernel pmap. 53 */ 54 #ifdef MULTIPROCESSOR 55 #define PMAP_SIZE offsetof(struct pmap, pm_pai[PMAP_TLB_MAX]) 56 #else 57 #define PMAP_SIZE sizeof(struct pmap) 58 #endif 59 60 CTASSERT(sizeof(pmap_segtab_t) == NBPG); 61 62 pmap_segtab_t pmap_kernel_segtab; 63 64 void 65 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 66 { 67 struct pmap * const pmap = p->p_vmspace->vm_map.pmap; 68 vsize_t off = va & PAGE_SIZE; 69 70 kpreempt_disable(); 71 for (const vaddr_t eva = va + len; va < eva; off = 0) { 72 const vaddr_t segeva = min(va + len, va - off + PAGE_SIZE); 73 pt_entry_t * const ptep = pmap_pte_lookup(pmap, va); 74 if (ptep == NULL) { 75 va = segeva; 76 continue; 77 } 78 pt_entry_t pt_entry = *ptep; 79 if (!pte_valid_p(pt_entry) || !pte_exec_p(pt_entry)) { 80 va = segeva; 81 continue; 82 } 83 kpreempt_enable(); 84 dcache_wb(pte_to_paddr(pt_entry), segeva - va); 85 icache_inv(pte_to_paddr(pt_entry), segeva - va); 86 kpreempt_disable(); 87 va = segeva; 88 } 89 kpreempt_enable(); 90 } 91 92 void 93 pmap_md_page_syncicache(struct vm_page *pg, const kcpuset_t *onproc) 94 { 95 /* 96 * If onproc is empty, we could do a 97 * pmap_page_protect(pg, VM_PROT_NONE) and remove all 98 * mappings of the page and clear its execness. Then 99 * the next time page is faulted, it will get icache 100 * synched. But this is easier. :) 101 */ 102 paddr_t pa = VM_PAGE_TO_PHYS(pg); 103 dcache_wb_page(pa); 104 icache_inv_page(pa); 105 } 106 107 vaddr_t 108 pmap_md_direct_map_paddr(paddr_t pa) 109 { 110 return (vaddr_t) pa; 111 } 112 113 bool 114 pmap_md_direct_mapped_vaddr_p(vaddr_t va) 115 { 116 return va < VM_MIN_KERNEL_ADDRESS || VM_MAX_KERNEL_ADDRESS <= va; 117 } 118 119 paddr_t 120 pmap_md_direct_mapped_vaddr_to_paddr(vaddr_t va) 121 { 122 return (paddr_t) va; 123 } 124 125 #ifdef PMAP_MINIMALTLB 126 static pt_entry_t * 127 kvtopte(const pmap_segtab_t *stp, vaddr_t va) 128 { 129 pt_entry_t * const ptep = stp->seg_tab[va >> SEGSHIFT]; 130 if (ptep == NULL) 131 return NULL; 132 return &ptep[(va & SEGOFSET) >> PAGE_SHIFT]; 133 } 134 135 vaddr_t 136 pmap_kvptefill(vaddr_t sva, vaddr_t eva, pt_entry_t pt_entry) 137 { 138 const pmap_segtab_t * const stp = pmap_kernel()->pm_segtab; 139 KASSERT(sva == trunc_page(sva)); 140 pt_entry_t *ptep = kvtopte(stp, sva); 141 for (; sva < eva; sva += NBPG) { 142 *ptep++ = pt_entry ? (sva | pt_entry) : 0; 143 } 144 return sva; 145 } 146 #endif 147 148 /* 149 * Bootstrap the system enough to run with virtual memory. 150 * firstaddr is the first unused kseg0 address (not page aligned). 151 */ 152 vaddr_t 153 pmap_bootstrap(vaddr_t startkernel, vaddr_t endkernel, 154 phys_ram_seg_t *avail, size_t cnt) 155 { 156 pmap_segtab_t * const stp = &pmap_kernel_segtab; 157 158 /* 159 * Initialize the kernel segment table. 160 */ 161 pmap_kernel()->pm_segtab = stp; 162 curcpu()->ci_pmap_kern_segtab = stp; 163 #ifdef MULTIPROCESSOR 164 pmap_kernel()->pm_active = kcpuset_running; 165 pmap_kernel()->pm_onproc = kcpuset_running; 166 #endif 167 168 KASSERT(endkernel == trunc_page(endkernel)); 169 170 /* 171 * Compute the number of pages kmem_arena will have. 172 */ 173 kmeminit_nkmempages(); 174 175 /* 176 * Figure out how many PTE's are necessary to map the kernel. 177 * We also reserve space for kmem_alloc_pageable() for vm_fork(). 178 */ 179 180 /* Get size of buffer cache and set an upper limit */ 181 buf_setvalimit((VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS) / 8); 182 vsize_t bufsz = buf_memcalc(); 183 buf_setvalimit(bufsz); 184 185 vsize_t kv_nsegtabs = pmap_round_seg(VM_PHYS_SIZE 186 + (ubc_nwins << ubc_winshift) 187 + bufsz 188 + 16 * NCARGS 189 + pager_map_size 190 + maxproc * USPACE 191 #ifdef SYSVSHM 192 + NBPG * shminfo.shmall 193 #endif 194 + NBPG * nkmempages) >> SEGSHIFT; 195 196 /* 197 * Initialize `FYI' variables. Note we're relying on 198 * the fact that BSEARCH sorts the vm_physmem[] array 199 * for us. Must do this before uvm_pageboot_alloc() 200 * can be called. 201 */ 202 pmap_limits.avail_start = vm_physmem[0].start << PGSHIFT; 203 pmap_limits.avail_end = vm_physmem[vm_nphysseg - 1].end << PGSHIFT; 204 const size_t max_nsegtabs = 205 (pmap_round_seg(VM_MAX_KERNEL_ADDRESS) 206 - pmap_trunc_seg(VM_MIN_KERNEL_ADDRESS)) / NBSEG; 207 if (kv_nsegtabs >= max_nsegtabs) { 208 pmap_limits.virtual_end = VM_MAX_KERNEL_ADDRESS; 209 kv_nsegtabs = max_nsegtabs; 210 } else { 211 pmap_limits.virtual_end = VM_MIN_KERNEL_ADDRESS 212 + kv_nsegtabs * NBSEG; 213 } 214 215 /* 216 * Now actually allocate the kernel PTE array (must be done 217 * after virtual_end is initialized). 218 */ 219 const vaddr_t kv_segtabs = avail[0].start; 220 KASSERT(kv_segtabs == endkernel); 221 KASSERT(avail[0].size >= NBPG * kv_nsegtabs); 222 printf(" kv_nsegtabs=%#"PRIxVSIZE, kv_nsegtabs); 223 printf(" kv_segtabs=%#"PRIxVADDR, kv_segtabs); 224 avail[0].start += NBPG * kv_nsegtabs; 225 avail[0].size -= NBPG * kv_nsegtabs; 226 endkernel += NBPG * kv_nsegtabs; 227 228 /* 229 * Initialize the kernel's two-level page level. This only wastes 230 * an extra page for the segment table and allows the user/kernel 231 * access to be common. 232 */ 233 pt_entry_t **ptp = &stp->seg_tab[VM_MIN_KERNEL_ADDRESS >> SEGSHIFT]; 234 pt_entry_t *ptep = (void *)kv_segtabs; 235 memset(ptep, 0, NBPG * kv_nsegtabs); 236 for (size_t i = 0; i < kv_nsegtabs; i++, ptep += NPTEPG) { 237 *ptp++ = ptep; 238 } 239 240 #if PMAP_MINIMALTLB 241 const vsize_t dm_nsegtabs = (physmem + NPTEPG - 1) / NPTEPG; 242 const vaddr_t dm_segtabs = avail[0].start; 243 printf(" dm_nsegtabs=%#"PRIxVSIZE, dm_nsegtabs); 244 printf(" dm_segtabs=%#"PRIxVADDR, dm_segtabs); 245 KASSERT(dm_segtabs == endkernel); 246 KASSERT(avail[0].size >= NBPG * dm_nsegtabs); 247 avail[0].start += NBPG * dm_nsegtabs; 248 avail[0].size -= NBPG * dm_nsegtabs; 249 endkernel += NBPG * dm_nsegtabs; 250 251 ptp = stp->seg_tab; 252 ptep = (void *)dm_segtabs; 253 memset(ptep, 0, NBPG * dm_nsegtabs); 254 for (size_t i = 0; i < dm_nsegtabs; i++, ptp++, ptep += NPTEPG) { 255 *ptp = ptep; 256 } 257 258 /* 259 */ 260 extern uint32_t _fdata[], _etext[]; 261 vaddr_t va; 262 263 /* Now make everything before the kernel inaccessible. */ 264 va = pmap_kvptefill(NBPG, startkernel, 0); 265 266 /* Kernel text is readonly & executable */ 267 va = pmap_kvptefill(va, round_page((vaddr_t)_etext), 268 PTE_M | PTE_xR | PTE_xX); 269 270 /* Kernel .rdata is readonly */ 271 va = pmap_kvptefill(va, trunc_page((vaddr_t)_fdata), PTE_M | PTE_xR); 272 273 /* Kernel .data/.bss + page tables are read-write */ 274 va = pmap_kvptefill(va, round_page(endkernel), PTE_M | PTE_xR | PTE_xW); 275 276 /* message buffer page table pages are read-write */ 277 (void) pmap_kvptefill(msgbuf_paddr, msgbuf_paddr+round_page(MSGBUFSIZE), 278 PTE_M | PTE_xR | PTE_xW); 279 #endif 280 281 for (size_t i = 0; i < cnt; i++) { 282 printf(" uvm_page_physload(%#lx,%#lx,%#lx,%#lx,%d)", 283 atop(avail[i].start), 284 atop(avail[i].start + avail[i].size) - 1, 285 atop(avail[i].start), 286 atop(avail[i].start + avail[i].size) - 1, 287 VM_FREELIST_DEFAULT); 288 uvm_page_physload( 289 atop(avail[i].start), 290 atop(avail[i].start + avail[i].size) - 1, 291 atop(avail[i].start), 292 atop(avail[i].start + avail[i].size) - 1, 293 VM_FREELIST_DEFAULT); 294 } 295 296 pmap_pvlist_lock_init(curcpu()->ci_ci.dcache_line_size); 297 298 /* 299 * Initialize the pools. 300 */ 301 pool_init(&pmap_pmap_pool, PMAP_SIZE, 0, 0, 0, "pmappl", 302 &pool_allocator_nointr, IPL_NONE); 303 pool_init(&pmap_pv_pool, sizeof(struct pv_entry), 0, 0, 0, "pvpl", 304 &pmap_pv_page_allocator, IPL_NONE); 305 306 tlb_set_asid(0); 307 308 return endkernel; 309 } 310 311 struct vm_page * 312 pmap_md_alloc_poolpage(int flags) 313 { 314 /* 315 * Any managed page works for us. 316 */ 317 return uvm_pagealloc(NULL, 0, NULL, flags); 318 } 319 320 vaddr_t 321 pmap_md_map_poolpage(paddr_t pa, vsize_t size) 322 { 323 const vaddr_t sva = (vaddr_t) pa; 324 #ifdef PMAP_MINIMALTLB 325 const vaddr_t eva = sva + size; 326 pmap_kvptefill(sva, eva, PTE_M | PTE_xR | PTE_xW); 327 #endif 328 return sva; 329 } 330 331 void 332 pmap_md_unmap_poolpage(vaddr_t va, vsize_t size) 333 { 334 #ifdef PMAP_MINIMALTLB 335 struct pmap * const pm = pmap_kernel(); 336 const vaddr_t eva = va + size; 337 pmap_kvptefill(va, eva, 0); 338 for (;va < eva; va += NBPG) { 339 pmap_tlb_invalidate_addr(pm, va); 340 } 341 pmap_update(pm); 342 #endif 343 } 344 345 void 346 pmap_zero_page(paddr_t pa) 347 { 348 vaddr_t va = pmap_md_map_poolpage(pa, NBPG); 349 dcache_zero_page(va); 350 351 KASSERT(!VM_PAGEMD_EXECPAGE_P(VM_PAGE_TO_MD(PHYS_TO_VM_PAGE(va)))); 352 pmap_md_unmap_poolpage(va, NBPG); 353 } 354 355 void 356 pmap_copy_page(paddr_t src, paddr_t dst) 357 { 358 const size_t line_size = curcpu()->ci_ci.dcache_line_size; 359 vaddr_t src_va = pmap_md_map_poolpage(src, NBPG); 360 vaddr_t dst_va = pmap_md_map_poolpage(dst, NBPG); 361 const vaddr_t end = src_va + PAGE_SIZE; 362 363 while (src_va < end) { 364 __asm( 365 "dcbt %2,%1" "\n\t" /* touch next src cachline */ 366 "dcba 0,%1" "\n\t" /* don't fetch dst cacheline */ 367 :: "b"(src_va), "b"(dst_va), "b"(line_size)); 368 for (u_int i = 0; 369 i < line_size; 370 src_va += 32, dst_va += 32, i += 32) { 371 register_t tmp; 372 __asm __volatile( 373 "mr %[tmp],31" "\n\t" 374 "lmw 24,0(%[src])" "\n\t" 375 "stmw 24,0(%[dst])" "\n\t" 376 "mr 31,%[tmp]" "\n\t" 377 : [tmp] "=&r"(tmp) 378 : [src] "b"(src_va), [dst] "b"(dst_va) 379 : "r24", "r25", "r26", "r27", 380 "r28", "r29", "r30", "memory"); 381 } 382 } 383 pmap_md_unmap_poolpage(src_va, NBPG); 384 pmap_md_unmap_poolpage(dst_va, NBPG); 385 386 KASSERT(!VM_PAGEMD_EXECPAGE_P(VM_PAGE_TO_MD(PHYS_TO_VM_PAGE(dst)))); 387 } 388 389 void 390 pmap_md_init(void) 391 { 392 393 /* nothing for now */ 394 } 395 396 bool 397 pmap_md_io_vaddr_p(vaddr_t va) 398 { 399 return va >= pmap_limits.avail_end 400 && !(VM_MIN_KERNEL_ADDRESS <= va && va < VM_MAX_KERNEL_ADDRESS); 401 } 402 403 bool 404 pmap_md_tlb_check_entry(void *ctx, vaddr_t va, tlb_asid_t asid, pt_entry_t pte) 405 { 406 pmap_t pm = ctx; 407 struct pmap_asid_info * const pai = PMAP_PAI(pm, curcpu()->ci_tlb_info); 408 409 if (asid != pai->pai_asid) 410 return true; 411 412 const pt_entry_t * const ptep = pmap_pte_lookup(pm, va); 413 KASSERT(ptep != NULL); 414 pt_entry_t xpte = *ptep; 415 xpte &= ~((xpte & (PTE_UNSYNCED|PTE_UNMODIFIED)) << 1); 416 xpte ^= xpte & (PTE_UNSYNCED|PTE_UNMODIFIED|PTE_WIRED); 417 418 KASSERTMSG(pte == xpte, 419 "pm=%p va=%#"PRIxVADDR" asid=%u: TLB pte (%#x) != real pte (%#x/%#x)", 420 pm, va, asid, pte, xpte, *ptep); 421 422 return true; 423 } 424 425 #ifdef MULTIPROCESSOR 426 void 427 pmap_md_tlb_info_attach(struct pmap_tlb_info *ti, struct cpu_info *ci) 428 { 429 /* nothing */ 430 } 431 #endif /* MULTIPROCESSOR */ 432