1 /* $NetBSD: booke_pmap.c,v 1.38 2023/04/17 06:46:53 skrll Exp $ */ 2 /*- 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 * 10 * This material is based upon work supported by the Defense Advanced Research 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 * Contract No. N66001-09-C-2073. 13 * Approved for Public Release, Distribution Unlimited 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #define __PMAP_PRIVATE 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: booke_pmap.c,v 1.38 2023/04/17 06:46:53 skrll Exp $"); 41 42 #ifdef _KERNEL_OPT 43 #include "opt_multiprocessor.h" 44 #include "opt_pmap.h" 45 #endif 46 47 #include <sys/param.h> 48 #include <sys/kcore.h> 49 #include <sys/buf.h> 50 #include <sys/mutex.h> 51 52 #include <uvm/uvm.h> 53 54 #include <machine/pmap.h> 55 56 PMAP_COUNTER(zeroed_pages, "pages zeroed"); 57 PMAP_COUNTER(copied_pages, "pages copied"); 58 59 CTASSERT(sizeof(pmap_segtab_t) == NBPG); 60 61 void 62 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 63 { 64 struct pmap * const pmap = p->p_vmspace->vm_map.pmap; 65 vsize_t off = va & PAGE_MASK; 66 67 kpreempt_disable(); 68 for (const vaddr_t eva = va + len; va < eva; off = 0) { 69 const vaddr_t segeva = uimin(va + len, va - off + PAGE_SIZE); 70 pt_entry_t * const ptep = pmap_pte_lookup(pmap, va); 71 if (ptep == NULL) { 72 va = segeva; 73 continue; 74 } 75 pt_entry_t pt_entry = *ptep; 76 if (!pte_valid_p(pt_entry) || !pte_exec_p(pt_entry)) { 77 va = segeva; 78 continue; 79 } 80 kpreempt_enable(); 81 dcache_wb(pte_to_paddr(pt_entry) + off, segeva - va); 82 icache_inv(pte_to_paddr(pt_entry) + off, segeva - va); 83 kpreempt_disable(); 84 va = segeva; 85 } 86 kpreempt_enable(); 87 } 88 89 void 90 pmap_md_page_syncicache(struct vm_page_md *mdpg, const kcpuset_t *onproc) 91 { 92 KASSERT(VM_PAGEMD_VMPAGE_P(mdpg)); 93 94 struct vm_page * const pg = VM_MD_TO_PAGE(mdpg); 95 96 /* 97 * If onproc is empty, we could do a 98 * pmap_page_protect(pg, VM_PROT_NONE) and remove all 99 * mappings of the page and clear its execness. Then 100 * the next time page is faulted, it will get icache 101 * synched. But this is easier. :) 102 */ 103 const paddr_t pa = VM_PAGE_TO_PHYS(pg); 104 dcache_wb_page(pa); 105 icache_inv_page(pa); 106 } 107 108 vaddr_t 109 pmap_md_direct_map_paddr(paddr_t pa) 110 { 111 return (vaddr_t) pa; 112 } 113 114 bool 115 pmap_md_direct_mapped_vaddr_p(vaddr_t va) 116 { 117 return va < VM_MIN_KERNEL_ADDRESS || VM_MAX_KERNEL_ADDRESS <= va; 118 } 119 120 paddr_t 121 pmap_md_direct_mapped_vaddr_to_paddr(vaddr_t va) 122 { 123 return (paddr_t) va; 124 } 125 126 #ifdef PMAP_MINIMALTLB 127 static pt_entry_t * 128 kvtopte(const pmap_segtab_t *stb, vaddr_t va) 129 { 130 pt_entry_t * const ptep = stb->seg_tab[va >> SEGSHIFT]; 131 if (ptep == NULL) 132 return NULL; 133 return &ptep[(va & SEGOFSET) >> PAGE_SHIFT]; 134 } 135 136 vaddr_t 137 pmap_kvptefill(vaddr_t sva, vaddr_t eva, pt_entry_t pt_entry) 138 { 139 pmap_segtab_t * const stb = &pmap_kern_segtab; 140 KASSERT(sva == trunc_page(sva)); 141 pt_entry_t *ptep = kvtopte(stb, sva); 142 for (; sva < eva; sva += NBPG) { 143 *ptep++ = pt_entry ? (sva | pt_entry) : 0; 144 } 145 return sva; 146 } 147 #endif 148 149 /* 150 * Bootstrap the system enough to run with virtual memory. 151 * firstaddr is the first unused kseg0 address (not page aligned). 152 */ 153 vaddr_t 154 pmap_bootstrap(vaddr_t startkernel, vaddr_t endkernel, 155 phys_ram_seg_t *avail, size_t cnt) 156 { 157 pmap_segtab_t * const stp = &pmap_kern_segtab; 158 159 KASSERT(endkernel == trunc_page(endkernel)); 160 161 /* common initialization */ 162 pmap_bootstrap_common(); 163 164 /* init the lock */ 165 pmap_tlb_info_init(&pmap_tlb0_info); 166 167 /* 168 * Compute the number of pages kmem_arena will have. 169 */ 170 kmeminit_nkmempages(); 171 172 /* 173 * Figure out how many PTE's are necessary to map the kernel. 174 * We also reserve space for kmem_alloc_pageable() for vm_fork(). 175 */ 176 177 /* Get size of buffer cache and set an upper limit */ 178 buf_setvalimit((VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS) / 8); 179 vsize_t bufsz = buf_memcalc(); 180 buf_setvalimit(bufsz); 181 182 vsize_t kv_nsegtabs = pmap_round_seg(VM_PHYS_SIZE 183 + (ubc_nwins << ubc_winshift) 184 + bufsz 185 + 16 * NCARGS 186 + pager_map_size 187 + maxproc * USPACE 188 + NBPG * nkmempages) >> SEGSHIFT; 189 190 /* 191 * Initialize `FYI' variables. Note we're relying on 192 * the fact that BSEARCH sorts the vm_physmem[] array 193 * for us. Must do this before uvm_pageboot_alloc() 194 * can be called. 195 */ 196 pmap_limits.avail_start = uvm_physseg_get_start(uvm_physseg_get_first()) << PGSHIFT; 197 pmap_limits.avail_end = uvm_physseg_get_end(uvm_physseg_get_last()) << PGSHIFT; 198 const size_t max_nsegtabs = 199 (pmap_round_seg(VM_MAX_KERNEL_ADDRESS) 200 - pmap_trunc_seg(VM_MIN_KERNEL_ADDRESS)) / NBSEG; 201 if (kv_nsegtabs >= max_nsegtabs) { 202 pmap_limits.virtual_end = VM_MAX_KERNEL_ADDRESS; 203 kv_nsegtabs = max_nsegtabs; 204 } else { 205 pmap_limits.virtual_end = VM_MIN_KERNEL_ADDRESS 206 + kv_nsegtabs * NBSEG; 207 } 208 209 /* update the top of the kernel VM - pmap_growkernel not required */ 210 pmap_curmaxkvaddr = pmap_limits.virtual_end; 211 212 /* 213 * Now actually allocate the kernel PTE array (must be done 214 * after virtual_end is initialized). 215 */ 216 const vaddr_t kv_segtabs = avail[0].start; 217 KASSERT(kv_segtabs == endkernel); 218 KASSERT(avail[0].size >= NBPG * kv_nsegtabs); 219 printf(" kv_nsegtabs=%#"PRIxVSIZE, kv_nsegtabs); 220 printf(" kv_segtabs=%#"PRIxVADDR, kv_segtabs); 221 avail[0].start += NBPG * kv_nsegtabs; 222 avail[0].size -= NBPG * kv_nsegtabs; 223 endkernel += NBPG * kv_nsegtabs; 224 225 /* 226 * Initialize the kernel's two-level page level. This only wastes 227 * an extra page for the segment table and allows the user/kernel 228 * access to be common. 229 */ 230 231 pmap_ptpage_t **ppg_p = &stp->seg_ppg[VM_MIN_KERNEL_ADDRESS >> SEGSHIFT]; 232 pmap_ptpage_t *ppg = (void *)kv_segtabs; 233 memset(ppg, 0, NBPG * kv_nsegtabs); 234 for (size_t i = 0; i < kv_nsegtabs; i++, ppg++) { 235 *ppg_p++ = ppg; 236 } 237 238 #if PMAP_MINIMALTLB 239 const vsize_t dm_nsegtabs = (physmem + NPTEPG - 1) / NPTEPG; 240 const vaddr_t dm_segtabs = avail[0].start; 241 printf(" dm_nsegtabs=%#"PRIxVSIZE, dm_nsegtabs); 242 printf(" dm_segtabs=%#"PRIxVADDR, dm_segtabs); 243 KASSERT(dm_segtabs == endkernel); 244 KASSERT(avail[0].size >= NBPG * dm_nsegtabs); 245 avail[0].start += NBPG * dm_nsegtabs; 246 avail[0].size -= NBPG * dm_nsegtabs; 247 endkernel += NBPG * dm_nsegtabs; 248 249 ptp = stp->seg_tab; 250 ppg = (void *)dm_segtabs; 251 memset(ppg, 0, NBPG * dm_nsegtabs); 252 for (size_t i = 0; i < dm_nsegtabs; i++, ptp++, ppg++) { 253 *ptp = ppg; 254 } 255 256 /* 257 */ 258 extern uint32_t _fdata[], _etext[]; 259 vaddr_t va; 260 261 /* Now make everything before the kernel inaccessible. */ 262 va = pmap_kvptefill(NBPG, startkernel, 0); 263 264 /* Kernel text is readonly & executable */ 265 va = pmap_kvptefill(va, round_page((vaddr_t)_etext), 266 PTE_M | PTE_xR | PTE_xX); 267 268 /* Kernel .rdata is readonly */ 269 va = pmap_kvptefill(va, trunc_page((vaddr_t)_fdata), PTE_M | PTE_xR); 270 271 /* Kernel .data/.bss + page tables are read-write */ 272 va = pmap_kvptefill(va, round_page(endkernel), PTE_M | PTE_xR | PTE_xW); 273 274 /* message buffer page table pages are read-write */ 275 (void) pmap_kvptefill(msgbuf_paddr, msgbuf_paddr+round_page(MSGBUFSIZE), 276 PTE_M | PTE_xR | PTE_xW); 277 #endif 278 279 for (size_t i = 0; i < cnt; i++) { 280 printf(" uvm_page_physload(%#lx,%#lx,%#lx,%#lx,%d)", 281 atop(avail[i].start), 282 atop(avail[i].start + avail[i].size) - 1, 283 atop(avail[i].start), 284 atop(avail[i].start + avail[i].size) - 1, 285 VM_FREELIST_DEFAULT); 286 uvm_page_physload( 287 atop(avail[i].start), 288 atop(avail[i].start + avail[i].size) - 1, 289 atop(avail[i].start), 290 atop(avail[i].start + avail[i].size) - 1, 291 VM_FREELIST_DEFAULT); 292 } 293 294 pmap_pvlist_lock_init(curcpu()->ci_ci.dcache_line_size); 295 296 /* 297 * Initialize the pools. 298 */ 299 pool_init(&pmap_pmap_pool, PMAP_SIZE, 0, 0, 0, "pmappl", 300 &pool_allocator_nointr, IPL_NONE); 301 pool_init(&pmap_pv_pool, sizeof(struct pv_entry), 0, 0, 0, "pvpl", 302 &pmap_pv_page_allocator, IPL_NONE); 303 304 tlb_set_asid(KERNEL_PID, pmap_kernel()); 305 306 return endkernel; 307 } 308 309 struct vm_page * 310 pmap_md_alloc_poolpage(int flags) 311 { 312 313 /* 314 * Any managed page works for us. 315 */ 316 return uvm_pagealloc(NULL, 0, NULL, flags); 317 } 318 319 vaddr_t 320 pmap_md_map_poolpage(paddr_t pa, vsize_t size) 321 { 322 const vaddr_t sva = (vaddr_t) pa; 323 #ifdef PMAP_MINIMALTLB 324 const vaddr_t eva = sva + size; 325 pmap_kvptefill(sva, eva, PTE_M | PTE_xR | PTE_xW); 326 #endif 327 return sva; 328 } 329 330 void 331 pmap_md_unmap_poolpage(vaddr_t va, vsize_t size) 332 { 333 #ifdef PMAP_MINIMALTLB 334 struct pmap * const pm = pmap_kernel(); 335 const vaddr_t eva = va + size; 336 pmap_kvptefill(va, eva, 0); 337 for (;va < eva; va += NBPG) { 338 pmap_tlb_invalidate_addr(pm, va); 339 } 340 pmap_update(pm); 341 #endif 342 } 343 344 void 345 pmap_zero_page(paddr_t pa) 346 { 347 PMAP_COUNT(zeroed_pages); 348 vaddr_t va = pmap_md_map_poolpage(pa, NBPG); 349 dcache_zero_page(va); 350 351 KASSERT(!VM_PAGEMD_EXECPAGE_P(VM_PAGE_TO_MD(PHYS_TO_VM_PAGE(va)))); 352 pmap_md_unmap_poolpage(va, NBPG); 353 } 354 355 void 356 pmap_copy_page(paddr_t src, paddr_t dst) 357 { 358 const size_t line_size = curcpu()->ci_ci.dcache_line_size; 359 vaddr_t src_va = pmap_md_map_poolpage(src, NBPG); 360 vaddr_t dst_va = pmap_md_map_poolpage(dst, NBPG); 361 const vaddr_t end = src_va + PAGE_SIZE; 362 363 PMAP_COUNT(copied_pages); 364 365 while (src_va < end) { 366 __asm __volatile( 367 "dcbt %2,%0" "\n\t" /* touch next src cacheline */ 368 "dcba 0,%1" "\n\t" /* don't fetch dst cacheline */ 369 :: "b"(src_va), "b"(dst_va), "b"(line_size)); 370 for (u_int i = 0; 371 i < line_size; 372 src_va += 32, dst_va += 32, i += 32) { 373 register_t tmp; 374 __asm __volatile( 375 "mr %[tmp],31" "\n\t" 376 "lmw 24,0(%[src])" "\n\t" 377 "stmw 24,0(%[dst])" "\n\t" 378 "mr 31,%[tmp]" "\n\t" 379 : [tmp] "=&r"(tmp) 380 : [src] "b"(src_va), [dst] "b"(dst_va) 381 : "r24", "r25", "r26", "r27", 382 "r28", "r29", "r30", "memory"); 383 } 384 } 385 pmap_md_unmap_poolpage(src_va, NBPG); 386 pmap_md_unmap_poolpage(dst_va, NBPG); 387 388 KASSERT(!VM_PAGEMD_EXECPAGE_P(VM_PAGE_TO_MD(PHYS_TO_VM_PAGE(dst)))); 389 } 390 391 void 392 pmap_md_init(void) 393 { 394 395 /* nothing for now */ 396 } 397 398 bool 399 pmap_md_io_vaddr_p(vaddr_t va) 400 { 401 return va >= pmap_limits.avail_end 402 && !(VM_MIN_KERNEL_ADDRESS <= va && va < VM_MAX_KERNEL_ADDRESS); 403 } 404 405 bool 406 pmap_md_tlb_check_entry(void *ctx, vaddr_t va, tlb_asid_t asid, pt_entry_t pte) 407 { 408 pmap_t pm = ctx; 409 struct pmap_asid_info * const pai = PMAP_PAI(pm, curcpu()->ci_tlb_info); 410 411 if (asid != pai->pai_asid) 412 return true; 413 414 const pt_entry_t * const ptep = pmap_pte_lookup(pm, va); 415 KASSERT(ptep != NULL); 416 pt_entry_t xpte = *ptep; 417 xpte &= ~((xpte & (PTE_UNSYNCED|PTE_UNMODIFIED)) << 1); 418 xpte ^= xpte & (PTE_UNSYNCED|PTE_UNMODIFIED|PTE_WIRED); 419 420 KASSERTMSG(pte == xpte, 421 "pm=%p va=%#"PRIxVADDR" asid=%u: TLB pte (%#x) != real pte (%#x/%#x)", 422 pm, va, asid, pte, xpte, *ptep); 423 424 return true; 425 } 426 427 #ifdef MULTIPROCESSOR 428 void 429 pmap_md_tlb_info_attach(struct pmap_tlb_info *ti, struct cpu_info *ci) 430 { 431 /* nothing */ 432 } 433 #endif /* MULTIPROCESSOR */ 434