xref: /netbsd-src/sys/arch/powerpc/booke/booke_pmap.c (revision a5847cc334d9a7029f6352b847e9e8d71a0f9e0c)
1 /*	$NetBSD: booke_pmap.c,v 1.10 2011/09/27 01:02:35 jym Exp $	*/
2 /*-
3  * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
4  * All rights reserved.
5  *
6  * This code is derived from software contributed to The NetBSD Foundation
7  * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects
8  * Agency and which was developed by Matt Thomas of 3am Software Foundry.
9  *
10  * This material is based upon work supported by the Defense Advanced Research
11  * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under
12  * Contract No. N66001-09-C-2073.
13  * Approved for Public Release, Distribution Unlimited
14  *
15  * Redistribution and use in source and binary forms, with or without
16  * modification, are permitted provided that the following conditions
17  * are met:
18  * 1. Redistributions of source code must retain the above copyright
19  *    notice, this list of conditions and the following disclaimer.
20  * 2. Redistributions in binary form must reproduce the above copyright
21  *    notice, this list of conditions and the following disclaimer in the
22  *    documentation and/or other materials provided with the distribution.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34  * POSSIBILITY OF SUCH DAMAGE.
35  */
36 
37 #define __PMAP_PRIVATE
38 
39 #include <sys/cdefs.h>
40 
41 __KERNEL_RCSID(0, "$NetBSD: booke_pmap.c,v 1.10 2011/09/27 01:02:35 jym Exp $");
42 
43 #include <sys/param.h>
44 #include <sys/kcore.h>
45 #include <sys/buf.h>
46 
47 #include <uvm/uvm.h>
48 
49 #include <machine/pmap.h>
50 
51 /*
52  * Initialize the kernel pmap.
53  */
54 #ifdef MULTIPROCESSOR
55 #define	PMAP_SIZE	offsetof(struct pmap, pm_pai[MAXCPUS])
56 #else
57 #define	PMAP_SIZE	sizeof(struct pmap)
58 #endif
59 
60 CTASSERT(sizeof(struct pmap_segtab) == NBPG);
61 
62 void
63 pmap_procwr(struct proc *p, vaddr_t va, size_t len)
64 {
65 	struct pmap * const pmap = p->p_vmspace->vm_map.pmap;
66 	vsize_t off = va & PAGE_SIZE;
67 
68 	kpreempt_disable();
69 	for (const vaddr_t eva = va + len; va < eva; off = 0) {
70 		const vaddr_t segeva = min(va + len, va - off + PAGE_SIZE);
71 		pt_entry_t * const ptep = pmap_pte_lookup(pmap, va);
72 		if (ptep == NULL) {
73 			va = segeva;
74 			continue;
75 		}
76 		pt_entry_t pt_entry = *ptep;
77 		if (!pte_valid_p(pt_entry) || !pte_exec_p(pt_entry)) {
78 			va = segeva;
79 			continue;
80 		}
81 		kpreempt_enable();
82 		dcache_wb(pte_to_paddr(pt_entry), segeva - va);
83 		icache_inv(pte_to_paddr(pt_entry), segeva - va);
84 		kpreempt_disable();
85 		va = segeva;
86 	}
87 	kpreempt_enable();
88 }
89 
90 void
91 pmap_md_page_syncicache(struct vm_page *pg, __cpuset_t onproc)
92 {
93 	/*
94 	 * If onproc is empty, we could do a
95 	 * pmap_page_protect(pg, VM_PROT_NONE) and remove all
96 	 * mappings of the page and clear its execness.  Then
97 	 * the next time page is faulted, it will get icache
98 	 * synched.  But this is easier. :)
99 	 */
100 	paddr_t pa = VM_PAGE_TO_PHYS(pg);
101 	dcache_wb_page(pa);
102 	icache_inv_page(pa);
103 }
104 
105 vaddr_t
106 pmap_md_direct_map_paddr(paddr_t pa)
107 {
108 	return (vaddr_t) pa;
109 }
110 
111 bool
112 pmap_md_direct_mapped_vaddr_p(vaddr_t va)
113 {
114 	return va < VM_MIN_KERNEL_ADDRESS || VM_MAX_KERNEL_ADDRESS <= va;
115 }
116 
117 paddr_t
118 pmap_md_direct_mapped_vaddr_to_paddr(vaddr_t va)
119 {
120 	return (paddr_t) va;
121 }
122 
123 /*
124  *	Bootstrap the system enough to run with virtual memory.
125  *	firstaddr is the first unused kseg0 address (not page aligned).
126  */
127 void
128 pmap_bootstrap(vaddr_t startkernel, vaddr_t endkernel,
129 	const phys_ram_seg_t *avail, size_t cnt)
130 {
131 	for (size_t i = 0; i < cnt; i++) {
132 		printf(" uvm_page_physload(%#lx,%#lx,%#lx,%#lx,%d)",
133 		    atop(avail[i].start),
134 		    atop(avail[i].start + avail[i].size) - 1,
135 		    atop(avail[i].start),
136 		    atop(avail[i].start + avail[i].size) - 1,
137 		    VM_FREELIST_DEFAULT);
138 		uvm_page_physload(
139 		    atop(avail[i].start),
140 		    atop(avail[i].start + avail[i].size) - 1,
141 		    atop(avail[i].start),
142 		    atop(avail[i].start + avail[i].size) - 1,
143 		    VM_FREELIST_DEFAULT);
144 	}
145 
146 	pmap_tlb_info_init(&pmap_tlb0_info);		/* init the lock */
147 
148 	/*
149 	 * Compute the number of pages kmem_map will have.
150 	 */
151 	kmeminit_nkmempages();
152 
153 	/*
154 	 * Figure out how many PTE's are necessary to map the kernel.
155 	 * We also reserve space for kmem_alloc_pageable() for vm_fork().
156 	 */
157 
158 	/* Get size of buffer cache and set an upper limit */
159 	buf_setvalimit((VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS) / 8);
160 	vsize_t bufsz = buf_memcalc();
161 	buf_setvalimit(bufsz);
162 
163 	vsize_t nsegtabs = pmap_round_seg(VM_PHYS_SIZE
164 	    + (ubc_nwins << ubc_winshift)
165 	    + bufsz
166 	    + 16 * NCARGS
167 	    + pager_map_size
168 	    + maxproc * USPACE
169 #ifdef SYSVSHM
170 	    + NBPG * shminfo.shmall
171 #endif
172 	    + NBPG * nkmempages);
173 
174 	/*
175 	 * Initialize `FYI' variables.	Note we're relying on
176 	 * the fact that BSEARCH sorts the vm_physmem[] array
177 	 * for us.  Must do this before uvm_pageboot_alloc()
178 	 * can be called.
179 	 */
180 	pmap_limits.avail_start = vm_physmem[0].start << PGSHIFT;
181 	pmap_limits.avail_end = vm_physmem[vm_nphysseg - 1].end << PGSHIFT;
182 	const vsize_t max_nsegtabs =
183 	    (pmap_round_seg(VM_MAX_KERNEL_ADDRESS)
184 		- pmap_trunc_seg(VM_MIN_KERNEL_ADDRESS)) / NBSEG;
185 	if (nsegtabs >= max_nsegtabs) {
186 		pmap_limits.virtual_end = VM_MAX_KERNEL_ADDRESS;
187 		nsegtabs = max_nsegtabs;
188 	} else {
189 		pmap_limits.virtual_end = VM_MIN_KERNEL_ADDRESS
190 		    + nsegtabs * NBSEG;
191 	}
192 
193 	pmap_pvlist_lock_init(curcpu()->ci_ci.dcache_line_size);
194 
195 	/*
196 	 * Now actually allocate the kernel PTE array (must be done
197 	 * after virtual_end is initialized).
198 	 */
199 	vaddr_t segtabs =
200 	    uvm_pageboot_alloc(NBPG * nsegtabs + sizeof(struct pmap_segtab));
201 
202 	/*
203 	 * Initialize the kernel's two-level page level.  This only wastes
204 	 * an extra page for the segment table and allows the user/kernel
205 	 * access to be common.
206 	 */
207 	struct pmap_segtab * const stp = (void *)segtabs;
208 	segtabs += round_page(sizeof(struct pmap_segtab));
209 	pt_entry_t **ptp = &stp->seg_tab[VM_MIN_KERNEL_ADDRESS >> SEGSHIFT];
210 	for (u_int i = 0; i < nsegtabs; i++, segtabs += NBPG) {
211 		*ptp++ = (void *)segtabs;
212 	}
213 	pmap_kernel()->pm_segtab = stp;
214 	curcpu()->ci_pmap_kern_segtab = stp;
215 	printf(" kern_segtab=%p", stp);
216 
217 #if 0
218 	nsegtabs = (physmem + NPTEPG - 1) / NPTEPG;
219 	segtabs = uvm_pageboot_alloc(NBPG * nsegtabs);
220 	ptp = stp->seg_tab;
221 	pt_entry_t pt_entry = PTE_M|PTE_xX|PTE_xR;
222 	pt_entry_t *ptep = (void *)segtabs;
223 	printf("%s: allocated %lu page table pages for mapping %u pages\n",
224 	    __func__, nsegtabs, physmem);
225 	for (u_int i = 0; i < nsegtabs; i++, segtabs += NBPG, ptp++) {
226 		*ptp = ptep;
227 		for (u_int j = 0; j < NPTEPG; j++, ptep++) {
228 			*ptep = pt_entry;
229 			pt_entry += NBPG;
230 		}
231 		printf(" [%u]=%p (%#x)", i, *ptp, **ptp);
232 		pt_entry |= PTE_xW;
233 		pt_entry &= ~PTE_xX;
234 	}
235 
236 	/*
237 	 * Now make everything before the kernel inaccessible.
238 	 */
239 	for (u_int i = 0; i < startkernel / NBPG; i += NBPG) {
240 		stp->seg_tab[i >> SEGSHIFT][(i & SEGOFSET) >> PAGE_SHIFT] = 0;
241 	}
242 #endif
243 
244 	/*
245 	 * Initialize the pools.
246 	 */
247 	pool_init(&pmap_pmap_pool, PMAP_SIZE, 0, 0, 0, "pmappl",
248 	    &pool_allocator_nointr, IPL_NONE);
249 	pool_init(&pmap_pv_pool, sizeof(struct pv_entry), 0, 0, 0, "pvpl",
250 	    &pmap_pv_page_allocator, IPL_NONE);
251 
252 	tlb_set_asid(0);
253 }
254 
255 struct vm_page *
256 pmap_md_alloc_poolpage(int flags)
257 {
258 	/*
259 	 * Any managed page works for us.
260 	 */
261 	return uvm_pagealloc(NULL, 0, NULL, flags);
262 }
263 
264 void
265 pmap_zero_page(paddr_t pa)
266 {
267 	dcache_zero_page(pa);
268 
269 	KASSERT(!VM_PAGEMD_EXECPAGE_P(VM_PAGE_TO_MD(PHYS_TO_VM_PAGE(pa))));
270 }
271 
272 void
273 pmap_copy_page(paddr_t src, paddr_t dst)
274 {
275 	const size_t line_size = curcpu()->ci_ci.dcache_line_size;
276 	const paddr_t end = src + PAGE_SIZE;
277 
278 	while (src < end) {
279 		__asm(
280 			"dcbt	%2,%1"	"\n\t"	/* touch next src cachline */
281 			"dcba	0,%1"	"\n\t" 	/* don't fetch dst cacheline */
282 		    :: "b"(src), "b"(dst), "b"(line_size));
283 		for (u_int i = 0;
284 		     i < line_size;
285 		     src += 32, dst += 32, i += 32) {
286 			__asm(
287 				"lmw	24,0(%0)" "\n\t"
288 				"stmw	24,0(%1)"
289 			    :: "b"(src), "b"(dst)
290 			    : "r24", "r25", "r26", "r27",
291 			      "r28", "r29", "r30", "r31");
292 		}
293 	}
294 
295 	KASSERT(!VM_PAGEMD_EXECPAGE_P(VM_PAGE_TO_MD(PHYS_TO_VM_PAGE(dst - PAGE_SIZE))));
296 }
297 
298 void
299 pmap_md_init(void)
300 {
301 
302 	/* nothing for now */
303 }
304 
305 bool
306 pmap_md_io_vaddr_p(vaddr_t va)
307 {
308 	return va >= pmap_limits.avail_end
309 	    && !(VM_MIN_KERNEL_ADDRESS <= va && va < VM_MAX_KERNEL_ADDRESS);
310 }
311 
312 bool
313 pmap_md_tlb_check_entry(void *ctx, vaddr_t va, tlb_asid_t asid, pt_entry_t pte)
314 {
315 	pmap_t pm = ctx;
316         struct pmap_asid_info * const pai = PMAP_PAI(pm, curcpu()->ci_tlb_info);
317 
318 	if (asid != pai->pai_asid)
319 		return true;
320 
321 	const pt_entry_t * const ptep = pmap_pte_lookup(pm, va);
322 	KASSERT(ptep != NULL);
323 	pt_entry_t xpte = *ptep;
324 	xpte &= ~((xpte & (PTE_UNSYNCED|PTE_UNMODIFIED)) << 1);
325 	xpte ^= xpte & (PTE_UNSYNCED|PTE_UNMODIFIED|PTE_WIRED);
326 
327 	KASSERTMSG(pte == xpte,
328 	    "pm=%p va=%#"PRIxVADDR" asid=%u: TLB pte (%#x) != real pte (%#x/%#x)",
329 	    pm, va, asid, pte, xpte, *ptep);
330 
331 	return true;
332 }
333 
334 #ifdef MULTIPROCESSOR
335 void
336 pmap_md_tlb_info_attach(struct pmap_tlb_info *ti, struct cpu_info *ci)
337 {
338 	/* nothing */
339 }
340 #endif /* MULTIPROCESSOR */
341