1 /* $NetBSD: booke_pmap.c,v 1.29 2020/07/06 10:09:23 rin Exp $ */ 2 /*- 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 * 10 * This material is based upon work supported by the Defense Advanced Research 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 * Contract No. N66001-09-C-2073. 13 * Approved for Public Release, Distribution Unlimited 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #define __PMAP_PRIVATE 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: booke_pmap.c,v 1.29 2020/07/06 10:09:23 rin Exp $"); 41 42 #ifdef _KERNEL_OPT 43 #include "opt_multiprocessor.h" 44 #include "opt_pmap.h" 45 #endif 46 47 #include <sys/param.h> 48 #include <sys/kcore.h> 49 #include <sys/buf.h> 50 #include <sys/mutex.h> 51 52 #include <uvm/uvm.h> 53 54 #include <machine/pmap.h> 55 56 PMAP_COUNTER(zeroed_pages, "pages zeroed"); 57 PMAP_COUNTER(copied_pages, "pages copied"); 58 59 CTASSERT(sizeof(pmap_segtab_t) == NBPG); 60 61 void 62 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 63 { 64 struct pmap * const pmap = p->p_vmspace->vm_map.pmap; 65 vsize_t off = va & PAGE_SIZE; 66 67 kpreempt_disable(); 68 for (const vaddr_t eva = va + len; va < eva; off = 0) { 69 const vaddr_t segeva = uimin(va + len, va - off + PAGE_SIZE); 70 pt_entry_t * const ptep = pmap_pte_lookup(pmap, va); 71 if (ptep == NULL) { 72 va = segeva; 73 continue; 74 } 75 pt_entry_t pt_entry = *ptep; 76 if (!pte_valid_p(pt_entry) || !pte_exec_p(pt_entry)) { 77 va = segeva; 78 continue; 79 } 80 kpreempt_enable(); 81 dcache_wb(pte_to_paddr(pt_entry), segeva - va); 82 icache_inv(pte_to_paddr(pt_entry), segeva - va); 83 kpreempt_disable(); 84 va = segeva; 85 } 86 kpreempt_enable(); 87 } 88 89 void 90 pmap_md_page_syncicache(struct vm_page *pg, const kcpuset_t *onproc) 91 { 92 /* 93 * If onproc is empty, we could do a 94 * pmap_page_protect(pg, VM_PROT_NONE) and remove all 95 * mappings of the page and clear its execness. Then 96 * the next time page is faulted, it will get icache 97 * synched. But this is easier. :) 98 */ 99 paddr_t pa = VM_PAGE_TO_PHYS(pg); 100 dcache_wb_page(pa); 101 icache_inv_page(pa); 102 } 103 104 vaddr_t 105 pmap_md_direct_map_paddr(paddr_t pa) 106 { 107 return (vaddr_t) pa; 108 } 109 110 bool 111 pmap_md_direct_mapped_vaddr_p(vaddr_t va) 112 { 113 return va < VM_MIN_KERNEL_ADDRESS || VM_MAX_KERNEL_ADDRESS <= va; 114 } 115 116 paddr_t 117 pmap_md_direct_mapped_vaddr_to_paddr(vaddr_t va) 118 { 119 return (paddr_t) va; 120 } 121 122 #ifdef PMAP_MINIMALTLB 123 static pt_entry_t * 124 kvtopte(const pmap_segtab_t *stp, vaddr_t va) 125 { 126 pt_entry_t * const ptep = stp->seg_tab[va >> SEGSHIFT]; 127 if (ptep == NULL) 128 return NULL; 129 return &ptep[(va & SEGOFSET) >> PAGE_SHIFT]; 130 } 131 132 vaddr_t 133 pmap_kvptefill(vaddr_t sva, vaddr_t eva, pt_entry_t pt_entry) 134 { 135 pmap_segtab_t * const stp = &pmap_kern_segtab; 136 KASSERT(sva == trunc_page(sva)); 137 pt_entry_t *ptep = kvtopte(stp, sva); 138 for (; sva < eva; sva += NBPG) { 139 *ptep++ = pt_entry ? (sva | pt_entry) : 0; 140 } 141 return sva; 142 } 143 #endif 144 145 /* 146 * Bootstrap the system enough to run with virtual memory. 147 * firstaddr is the first unused kseg0 address (not page aligned). 148 */ 149 vaddr_t 150 pmap_bootstrap(vaddr_t startkernel, vaddr_t endkernel, 151 phys_ram_seg_t *avail, size_t cnt) 152 { 153 pmap_segtab_t * const stp = &pmap_kern_segtab; 154 155 KASSERT(endkernel == trunc_page(endkernel)); 156 157 /* common initialization */ 158 pmap_bootstrap_common(); 159 160 /* init the lock */ 161 pmap_tlb_info_init(&pmap_tlb0_info); 162 163 /* 164 * Compute the number of pages kmem_arena will have. 165 */ 166 kmeminit_nkmempages(); 167 168 /* 169 * Figure out how many PTE's are necessary to map the kernel. 170 * We also reserve space for kmem_alloc_pageable() for vm_fork(). 171 */ 172 173 /* Get size of buffer cache and set an upper limit */ 174 buf_setvalimit((VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS) / 8); 175 vsize_t bufsz = buf_memcalc(); 176 buf_setvalimit(bufsz); 177 178 vsize_t kv_nsegtabs = pmap_round_seg(VM_PHYS_SIZE 179 + (ubc_nwins << ubc_winshift) 180 + bufsz 181 + 16 * NCARGS 182 + pager_map_size 183 + maxproc * USPACE 184 + NBPG * nkmempages) >> SEGSHIFT; 185 186 /* 187 * Initialize `FYI' variables. Note we're relying on 188 * the fact that BSEARCH sorts the vm_physmem[] array 189 * for us. Must do this before uvm_pageboot_alloc() 190 * can be called. 191 */ 192 pmap_limits.avail_start = uvm_physseg_get_start(uvm_physseg_get_first()) << PGSHIFT; 193 pmap_limits.avail_end = uvm_physseg_get_end(uvm_physseg_get_last()) << PGSHIFT; 194 const size_t max_nsegtabs = 195 (pmap_round_seg(VM_MAX_KERNEL_ADDRESS) 196 - pmap_trunc_seg(VM_MIN_KERNEL_ADDRESS)) / NBSEG; 197 if (kv_nsegtabs >= max_nsegtabs) { 198 pmap_limits.virtual_end = VM_MAX_KERNEL_ADDRESS; 199 kv_nsegtabs = max_nsegtabs; 200 } else { 201 pmap_limits.virtual_end = VM_MIN_KERNEL_ADDRESS 202 + kv_nsegtabs * NBSEG; 203 } 204 205 /* 206 * Now actually allocate the kernel PTE array (must be done 207 * after virtual_end is initialized). 208 */ 209 const vaddr_t kv_segtabs = avail[0].start; 210 KASSERT(kv_segtabs == endkernel); 211 KASSERT(avail[0].size >= NBPG * kv_nsegtabs); 212 printf(" kv_nsegtabs=%#"PRIxVSIZE, kv_nsegtabs); 213 printf(" kv_segtabs=%#"PRIxVADDR, kv_segtabs); 214 avail[0].start += NBPG * kv_nsegtabs; 215 avail[0].size -= NBPG * kv_nsegtabs; 216 endkernel += NBPG * kv_nsegtabs; 217 218 /* 219 * Initialize the kernel's two-level page level. This only wastes 220 * an extra page for the segment table and allows the user/kernel 221 * access to be common. 222 */ 223 pt_entry_t **ptp = &stp->seg_tab[VM_MIN_KERNEL_ADDRESS >> SEGSHIFT]; 224 pt_entry_t *ptep = (void *)kv_segtabs; 225 memset(ptep, 0, NBPG * kv_nsegtabs); 226 for (size_t i = 0; i < kv_nsegtabs; i++, ptep += NPTEPG) { 227 *ptp++ = ptep; 228 } 229 230 #if PMAP_MINIMALTLB 231 const vsize_t dm_nsegtabs = (physmem + NPTEPG - 1) / NPTEPG; 232 const vaddr_t dm_segtabs = avail[0].start; 233 printf(" dm_nsegtabs=%#"PRIxVSIZE, dm_nsegtabs); 234 printf(" dm_segtabs=%#"PRIxVADDR, dm_segtabs); 235 KASSERT(dm_segtabs == endkernel); 236 KASSERT(avail[0].size >= NBPG * dm_nsegtabs); 237 avail[0].start += NBPG * dm_nsegtabs; 238 avail[0].size -= NBPG * dm_nsegtabs; 239 endkernel += NBPG * dm_nsegtabs; 240 241 ptp = stp->seg_tab; 242 ptep = (void *)dm_segtabs; 243 memset(ptep, 0, NBPG * dm_nsegtabs); 244 for (size_t i = 0; i < dm_nsegtabs; i++, ptp++, ptep += NPTEPG) { 245 *ptp = ptep; 246 } 247 248 /* 249 */ 250 extern uint32_t _fdata[], _etext[]; 251 vaddr_t va; 252 253 /* Now make everything before the kernel inaccessible. */ 254 va = pmap_kvptefill(NBPG, startkernel, 0); 255 256 /* Kernel text is readonly & executable */ 257 va = pmap_kvptefill(va, round_page((vaddr_t)_etext), 258 PTE_M | PTE_xR | PTE_xX); 259 260 /* Kernel .rdata is readonly */ 261 va = pmap_kvptefill(va, trunc_page((vaddr_t)_fdata), PTE_M | PTE_xR); 262 263 /* Kernel .data/.bss + page tables are read-write */ 264 va = pmap_kvptefill(va, round_page(endkernel), PTE_M | PTE_xR | PTE_xW); 265 266 /* message buffer page table pages are read-write */ 267 (void) pmap_kvptefill(msgbuf_paddr, msgbuf_paddr+round_page(MSGBUFSIZE), 268 PTE_M | PTE_xR | PTE_xW); 269 #endif 270 271 for (size_t i = 0; i < cnt; i++) { 272 printf(" uvm_page_physload(%#lx,%#lx,%#lx,%#lx,%d)", 273 atop(avail[i].start), 274 atop(avail[i].start + avail[i].size) - 1, 275 atop(avail[i].start), 276 atop(avail[i].start + avail[i].size) - 1, 277 VM_FREELIST_DEFAULT); 278 uvm_page_physload( 279 atop(avail[i].start), 280 atop(avail[i].start + avail[i].size) - 1, 281 atop(avail[i].start), 282 atop(avail[i].start + avail[i].size) - 1, 283 VM_FREELIST_DEFAULT); 284 } 285 286 pmap_pvlist_lock_init(curcpu()->ci_ci.dcache_line_size); 287 288 /* 289 * Initialize the pools. 290 */ 291 pool_init(&pmap_pmap_pool, PMAP_SIZE, 0, 0, 0, "pmappl", 292 &pool_allocator_nointr, IPL_NONE); 293 pool_init(&pmap_pv_pool, sizeof(struct pv_entry), 0, 0, 0, "pvpl", 294 &pmap_pv_page_allocator, IPL_NONE); 295 296 tlb_set_asid(0); 297 298 return endkernel; 299 } 300 301 struct vm_page * 302 pmap_md_alloc_poolpage(int flags) 303 { 304 /* 305 * Any managed page works for us. 306 */ 307 return uvm_pagealloc(NULL, 0, NULL, flags); 308 } 309 310 vaddr_t 311 pmap_md_map_poolpage(paddr_t pa, vsize_t size) 312 { 313 const vaddr_t sva = (vaddr_t) pa; 314 #ifdef PMAP_MINIMALTLB 315 const vaddr_t eva = sva + size; 316 pmap_kvptefill(sva, eva, PTE_M | PTE_xR | PTE_xW); 317 #endif 318 return sva; 319 } 320 321 void 322 pmap_md_unmap_poolpage(vaddr_t va, vsize_t size) 323 { 324 #ifdef PMAP_MINIMALTLB 325 struct pmap * const pm = pmap_kernel(); 326 const vaddr_t eva = va + size; 327 pmap_kvptefill(va, eva, 0); 328 for (;va < eva; va += NBPG) { 329 pmap_tlb_invalidate_addr(pm, va); 330 } 331 pmap_update(pm); 332 #endif 333 } 334 335 void 336 pmap_zero_page(paddr_t pa) 337 { 338 PMAP_COUNT(zeroed_pages); 339 vaddr_t va = pmap_md_map_poolpage(pa, NBPG); 340 dcache_zero_page(va); 341 342 KASSERT(!VM_PAGEMD_EXECPAGE_P(VM_PAGE_TO_MD(PHYS_TO_VM_PAGE(va)))); 343 pmap_md_unmap_poolpage(va, NBPG); 344 } 345 346 void 347 pmap_copy_page(paddr_t src, paddr_t dst) 348 { 349 const size_t line_size = curcpu()->ci_ci.dcache_line_size; 350 vaddr_t src_va = pmap_md_map_poolpage(src, NBPG); 351 vaddr_t dst_va = pmap_md_map_poolpage(dst, NBPG); 352 const vaddr_t end = src_va + PAGE_SIZE; 353 354 PMAP_COUNT(copied_pages); 355 356 while (src_va < end) { 357 __asm __volatile( 358 "dcbt %2,%0" "\n\t" /* touch next src cacheline */ 359 "dcba 0,%1" "\n\t" /* don't fetch dst cacheline */ 360 :: "b"(src_va), "b"(dst_va), "b"(line_size)); 361 for (u_int i = 0; 362 i < line_size; 363 src_va += 32, dst_va += 32, i += 32) { 364 register_t tmp; 365 __asm __volatile( 366 "mr %[tmp],31" "\n\t" 367 "lmw 24,0(%[src])" "\n\t" 368 "stmw 24,0(%[dst])" "\n\t" 369 "mr 31,%[tmp]" "\n\t" 370 : [tmp] "=&r"(tmp) 371 : [src] "b"(src_va), [dst] "b"(dst_va) 372 : "r24", "r25", "r26", "r27", 373 "r28", "r29", "r30", "memory"); 374 } 375 } 376 pmap_md_unmap_poolpage(src_va, NBPG); 377 pmap_md_unmap_poolpage(dst_va, NBPG); 378 379 KASSERT(!VM_PAGEMD_EXECPAGE_P(VM_PAGE_TO_MD(PHYS_TO_VM_PAGE(dst)))); 380 } 381 382 void 383 pmap_md_init(void) 384 { 385 386 /* nothing for now */ 387 } 388 389 bool 390 pmap_md_io_vaddr_p(vaddr_t va) 391 { 392 return va >= pmap_limits.avail_end 393 && !(VM_MIN_KERNEL_ADDRESS <= va && va < VM_MAX_KERNEL_ADDRESS); 394 } 395 396 bool 397 pmap_md_tlb_check_entry(void *ctx, vaddr_t va, tlb_asid_t asid, pt_entry_t pte) 398 { 399 pmap_t pm = ctx; 400 struct pmap_asid_info * const pai = PMAP_PAI(pm, curcpu()->ci_tlb_info); 401 402 if (asid != pai->pai_asid) 403 return true; 404 405 const pt_entry_t * const ptep = pmap_pte_lookup(pm, va); 406 KASSERT(ptep != NULL); 407 pt_entry_t xpte = *ptep; 408 xpte &= ~((xpte & (PTE_UNSYNCED|PTE_UNMODIFIED)) << 1); 409 xpte ^= xpte & (PTE_UNSYNCED|PTE_UNMODIFIED|PTE_WIRED); 410 411 KASSERTMSG(pte == xpte, 412 "pm=%p va=%#"PRIxVADDR" asid=%u: TLB pte (%#x) != real pte (%#x/%#x)", 413 pm, va, asid, pte, xpte, *ptep); 414 415 return true; 416 } 417 418 #ifdef MULTIPROCESSOR 419 void 420 pmap_md_tlb_info_attach(struct pmap_tlb_info *ti, struct cpu_info *ci) 421 { 422 /* nothing */ 423 } 424 #endif /* MULTIPROCESSOR */ 425