1 /* $NetBSD: booke_pmap.c,v 1.25 2016/12/24 18:34:31 cherry Exp $ */ 2 /*- 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 * 10 * This material is based upon work supported by the Defense Advanced Research 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 * Contract No. N66001-09-C-2073. 13 * Approved for Public Release, Distribution Unlimited 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #define __PMAP_PRIVATE 38 39 #include <sys/cdefs.h> 40 41 __KERNEL_RCSID(0, "$NetBSD: booke_pmap.c,v 1.25 2016/12/24 18:34:31 cherry Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/kcore.h> 45 #include <sys/buf.h> 46 #include <sys/mutex.h> 47 48 #include <uvm/uvm.h> 49 50 #include <machine/pmap.h> 51 52 #if defined(MULTIPROCESSOR) 53 kmutex_t pmap_tlb_miss_lock; 54 #endif 55 56 PMAP_COUNTER(zeroed_pages, "pages zeroed"); 57 PMAP_COUNTER(copied_pages, "pages copied"); 58 59 CTASSERT(sizeof(pmap_segtab_t) == NBPG); 60 61 void 62 pmap_procwr(struct proc *p, vaddr_t va, size_t len) 63 { 64 struct pmap * const pmap = p->p_vmspace->vm_map.pmap; 65 vsize_t off = va & PAGE_SIZE; 66 67 kpreempt_disable(); 68 for (const vaddr_t eva = va + len; va < eva; off = 0) { 69 const vaddr_t segeva = min(va + len, va - off + PAGE_SIZE); 70 pt_entry_t * const ptep = pmap_pte_lookup(pmap, va); 71 if (ptep == NULL) { 72 va = segeva; 73 continue; 74 } 75 pt_entry_t pt_entry = *ptep; 76 if (!pte_valid_p(pt_entry) || !pte_exec_p(pt_entry)) { 77 va = segeva; 78 continue; 79 } 80 kpreempt_enable(); 81 dcache_wb(pte_to_paddr(pt_entry), segeva - va); 82 icache_inv(pte_to_paddr(pt_entry), segeva - va); 83 kpreempt_disable(); 84 va = segeva; 85 } 86 kpreempt_enable(); 87 } 88 89 void 90 pmap_md_page_syncicache(struct vm_page *pg, const kcpuset_t *onproc) 91 { 92 /* 93 * If onproc is empty, we could do a 94 * pmap_page_protect(pg, VM_PROT_NONE) and remove all 95 * mappings of the page and clear its execness. Then 96 * the next time page is faulted, it will get icache 97 * synched. But this is easier. :) 98 */ 99 paddr_t pa = VM_PAGE_TO_PHYS(pg); 100 dcache_wb_page(pa); 101 icache_inv_page(pa); 102 } 103 104 vaddr_t 105 pmap_md_direct_map_paddr(paddr_t pa) 106 { 107 return (vaddr_t) pa; 108 } 109 110 bool 111 pmap_md_direct_mapped_vaddr_p(vaddr_t va) 112 { 113 return va < VM_MIN_KERNEL_ADDRESS || VM_MAX_KERNEL_ADDRESS <= va; 114 } 115 116 paddr_t 117 pmap_md_direct_mapped_vaddr_to_paddr(vaddr_t va) 118 { 119 return (paddr_t) va; 120 } 121 122 #ifdef PMAP_MINIMALTLB 123 static pt_entry_t * 124 kvtopte(const pmap_segtab_t *stp, vaddr_t va) 125 { 126 pt_entry_t * const ptep = stp->seg_tab[va >> SEGSHIFT]; 127 if (ptep == NULL) 128 return NULL; 129 return &ptep[(va & SEGOFSET) >> PAGE_SHIFT]; 130 } 131 132 vaddr_t 133 pmap_kvptefill(vaddr_t sva, vaddr_t eva, pt_entry_t pt_entry) 134 { 135 pmap_segtab_t * const stp = &pmap_kern_segtab; 136 KASSERT(sva == trunc_page(sva)); 137 pt_entry_t *ptep = kvtopte(stp, sva); 138 for (; sva < eva; sva += NBPG) { 139 *ptep++ = pt_entry ? (sva | pt_entry) : 0; 140 } 141 return sva; 142 } 143 #endif 144 145 /* 146 * Bootstrap the system enough to run with virtual memory. 147 * firstaddr is the first unused kseg0 address (not page aligned). 148 */ 149 vaddr_t 150 pmap_bootstrap(vaddr_t startkernel, vaddr_t endkernel, 151 phys_ram_seg_t *avail, size_t cnt) 152 { 153 pmap_segtab_t * const stp = &pmap_kern_segtab; 154 155 KASSERT(endkernel == trunc_page(endkernel)); 156 157 /* init the lock */ 158 pmap_tlb_info_init(&pmap_tlb0_info); 159 160 #if defined(MULTIPROCESSOR) 161 mutex_init(&pmap_tlb_miss_lock, MUTEX_SPIN, IPL_HIGH); 162 #endif 163 164 /* 165 * Compute the number of pages kmem_arena will have. 166 */ 167 kmeminit_nkmempages(); 168 169 /* 170 * Figure out how many PTE's are necessary to map the kernel. 171 * We also reserve space for kmem_alloc_pageable() for vm_fork(). 172 */ 173 174 /* Get size of buffer cache and set an upper limit */ 175 buf_setvalimit((VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS) / 8); 176 vsize_t bufsz = buf_memcalc(); 177 buf_setvalimit(bufsz); 178 179 vsize_t kv_nsegtabs = pmap_round_seg(VM_PHYS_SIZE 180 + (ubc_nwins << ubc_winshift) 181 + bufsz 182 + 16 * NCARGS 183 + pager_map_size 184 + maxproc * USPACE 185 + NBPG * nkmempages) >> SEGSHIFT; 186 187 /* 188 * Initialize `FYI' variables. Note we're relying on 189 * the fact that BSEARCH sorts the vm_physmem[] array 190 * for us. Must do this before uvm_pageboot_alloc() 191 * can be called. 192 */ 193 pmap_limits.avail_start = uvm_physseg_get_start(uvm_physseg_get_first()) << PGSHIFT; 194 pmap_limits.avail_end = uvm_physseg_get_end(uvm_physseg_get_last()) << PGSHIFT; 195 const size_t max_nsegtabs = 196 (pmap_round_seg(VM_MAX_KERNEL_ADDRESS) 197 - pmap_trunc_seg(VM_MIN_KERNEL_ADDRESS)) / NBSEG; 198 if (kv_nsegtabs >= max_nsegtabs) { 199 pmap_limits.virtual_end = VM_MAX_KERNEL_ADDRESS; 200 kv_nsegtabs = max_nsegtabs; 201 } else { 202 pmap_limits.virtual_end = VM_MIN_KERNEL_ADDRESS 203 + kv_nsegtabs * NBSEG; 204 } 205 206 /* 207 * Now actually allocate the kernel PTE array (must be done 208 * after virtual_end is initialized). 209 */ 210 const vaddr_t kv_segtabs = avail[0].start; 211 KASSERT(kv_segtabs == endkernel); 212 KASSERT(avail[0].size >= NBPG * kv_nsegtabs); 213 printf(" kv_nsegtabs=%#"PRIxVSIZE, kv_nsegtabs); 214 printf(" kv_segtabs=%#"PRIxVADDR, kv_segtabs); 215 avail[0].start += NBPG * kv_nsegtabs; 216 avail[0].size -= NBPG * kv_nsegtabs; 217 endkernel += NBPG * kv_nsegtabs; 218 219 /* 220 * Initialize the kernel's two-level page level. This only wastes 221 * an extra page for the segment table and allows the user/kernel 222 * access to be common. 223 */ 224 pt_entry_t **ptp = &stp->seg_tab[VM_MIN_KERNEL_ADDRESS >> SEGSHIFT]; 225 pt_entry_t *ptep = (void *)kv_segtabs; 226 memset(ptep, 0, NBPG * kv_nsegtabs); 227 for (size_t i = 0; i < kv_nsegtabs; i++, ptep += NPTEPG) { 228 *ptp++ = ptep; 229 } 230 231 #if PMAP_MINIMALTLB 232 const vsize_t dm_nsegtabs = (physmem + NPTEPG - 1) / NPTEPG; 233 const vaddr_t dm_segtabs = avail[0].start; 234 printf(" dm_nsegtabs=%#"PRIxVSIZE, dm_nsegtabs); 235 printf(" dm_segtabs=%#"PRIxVADDR, dm_segtabs); 236 KASSERT(dm_segtabs == endkernel); 237 KASSERT(avail[0].size >= NBPG * dm_nsegtabs); 238 avail[0].start += NBPG * dm_nsegtabs; 239 avail[0].size -= NBPG * dm_nsegtabs; 240 endkernel += NBPG * dm_nsegtabs; 241 242 ptp = stp->seg_tab; 243 ptep = (void *)dm_segtabs; 244 memset(ptep, 0, NBPG * dm_nsegtabs); 245 for (size_t i = 0; i < dm_nsegtabs; i++, ptp++, ptep += NPTEPG) { 246 *ptp = ptep; 247 } 248 249 /* 250 */ 251 extern uint32_t _fdata[], _etext[]; 252 vaddr_t va; 253 254 /* Now make everything before the kernel inaccessible. */ 255 va = pmap_kvptefill(NBPG, startkernel, 0); 256 257 /* Kernel text is readonly & executable */ 258 va = pmap_kvptefill(va, round_page((vaddr_t)_etext), 259 PTE_M | PTE_xR | PTE_xX); 260 261 /* Kernel .rdata is readonly */ 262 va = pmap_kvptefill(va, trunc_page((vaddr_t)_fdata), PTE_M | PTE_xR); 263 264 /* Kernel .data/.bss + page tables are read-write */ 265 va = pmap_kvptefill(va, round_page(endkernel), PTE_M | PTE_xR | PTE_xW); 266 267 /* message buffer page table pages are read-write */ 268 (void) pmap_kvptefill(msgbuf_paddr, msgbuf_paddr+round_page(MSGBUFSIZE), 269 PTE_M | PTE_xR | PTE_xW); 270 #endif 271 272 for (size_t i = 0; i < cnt; i++) { 273 printf(" uvm_page_physload(%#lx,%#lx,%#lx,%#lx,%d)", 274 atop(avail[i].start), 275 atop(avail[i].start + avail[i].size) - 1, 276 atop(avail[i].start), 277 atop(avail[i].start + avail[i].size) - 1, 278 VM_FREELIST_DEFAULT); 279 uvm_page_physload( 280 atop(avail[i].start), 281 atop(avail[i].start + avail[i].size) - 1, 282 atop(avail[i].start), 283 atop(avail[i].start + avail[i].size) - 1, 284 VM_FREELIST_DEFAULT); 285 } 286 287 pmap_pvlist_lock_init(curcpu()->ci_ci.dcache_line_size); 288 289 /* 290 * Initialize the pools. 291 */ 292 pool_init(&pmap_pmap_pool, PMAP_SIZE, 0, 0, 0, "pmappl", 293 &pool_allocator_nointr, IPL_NONE); 294 pool_init(&pmap_pv_pool, sizeof(struct pv_entry), 0, 0, 0, "pvpl", 295 &pmap_pv_page_allocator, IPL_NONE); 296 297 tlb_set_asid(0); 298 299 return endkernel; 300 } 301 302 struct vm_page * 303 pmap_md_alloc_poolpage(int flags) 304 { 305 /* 306 * Any managed page works for us. 307 */ 308 return uvm_pagealloc(NULL, 0, NULL, flags); 309 } 310 311 vaddr_t 312 pmap_md_map_poolpage(paddr_t pa, vsize_t size) 313 { 314 const vaddr_t sva = (vaddr_t) pa; 315 #ifdef PMAP_MINIMALTLB 316 const vaddr_t eva = sva + size; 317 pmap_kvptefill(sva, eva, PTE_M | PTE_xR | PTE_xW); 318 #endif 319 return sva; 320 } 321 322 void 323 pmap_md_unmap_poolpage(vaddr_t va, vsize_t size) 324 { 325 #ifdef PMAP_MINIMALTLB 326 struct pmap * const pm = pmap_kernel(); 327 const vaddr_t eva = va + size; 328 pmap_kvptefill(va, eva, 0); 329 for (;va < eva; va += NBPG) { 330 pmap_tlb_invalidate_addr(pm, va); 331 } 332 pmap_update(pm); 333 #endif 334 } 335 336 void 337 pmap_zero_page(paddr_t pa) 338 { 339 PMAP_COUNT(zeroed_pages); 340 vaddr_t va = pmap_md_map_poolpage(pa, NBPG); 341 dcache_zero_page(va); 342 343 KASSERT(!VM_PAGEMD_EXECPAGE_P(VM_PAGE_TO_MD(PHYS_TO_VM_PAGE(va)))); 344 pmap_md_unmap_poolpage(va, NBPG); 345 } 346 347 void 348 pmap_copy_page(paddr_t src, paddr_t dst) 349 { 350 const size_t line_size = curcpu()->ci_ci.dcache_line_size; 351 vaddr_t src_va = pmap_md_map_poolpage(src, NBPG); 352 vaddr_t dst_va = pmap_md_map_poolpage(dst, NBPG); 353 const vaddr_t end = src_va + PAGE_SIZE; 354 355 PMAP_COUNT(copied_pages); 356 357 while (src_va < end) { 358 __asm __volatile( 359 "dcbt %2,%0" "\n\t" /* touch next src cacheline */ 360 "dcba 0,%1" "\n\t" /* don't fetch dst cacheline */ 361 :: "b"(src_va), "b"(dst_va), "b"(line_size)); 362 for (u_int i = 0; 363 i < line_size; 364 src_va += 32, dst_va += 32, i += 32) { 365 register_t tmp; 366 __asm __volatile( 367 "mr %[tmp],31" "\n\t" 368 "lmw 24,0(%[src])" "\n\t" 369 "stmw 24,0(%[dst])" "\n\t" 370 "mr 31,%[tmp]" "\n\t" 371 : [tmp] "=&r"(tmp) 372 : [src] "b"(src_va), [dst] "b"(dst_va) 373 : "r24", "r25", "r26", "r27", 374 "r28", "r29", "r30", "memory"); 375 } 376 } 377 pmap_md_unmap_poolpage(src_va, NBPG); 378 pmap_md_unmap_poolpage(dst_va, NBPG); 379 380 KASSERT(!VM_PAGEMD_EXECPAGE_P(VM_PAGE_TO_MD(PHYS_TO_VM_PAGE(dst)))); 381 } 382 383 void 384 pmap_md_init(void) 385 { 386 387 /* nothing for now */ 388 } 389 390 bool 391 pmap_md_io_vaddr_p(vaddr_t va) 392 { 393 return va >= pmap_limits.avail_end 394 && !(VM_MIN_KERNEL_ADDRESS <= va && va < VM_MAX_KERNEL_ADDRESS); 395 } 396 397 bool 398 pmap_md_tlb_check_entry(void *ctx, vaddr_t va, tlb_asid_t asid, pt_entry_t pte) 399 { 400 pmap_t pm = ctx; 401 struct pmap_asid_info * const pai = PMAP_PAI(pm, curcpu()->ci_tlb_info); 402 403 if (asid != pai->pai_asid) 404 return true; 405 406 const pt_entry_t * const ptep = pmap_pte_lookup(pm, va); 407 KASSERT(ptep != NULL); 408 pt_entry_t xpte = *ptep; 409 xpte &= ~((xpte & (PTE_UNSYNCED|PTE_UNMODIFIED)) << 1); 410 xpte ^= xpte & (PTE_UNSYNCED|PTE_UNMODIFIED|PTE_WIRED); 411 412 KASSERTMSG(pte == xpte, 413 "pm=%p va=%#"PRIxVADDR" asid=%u: TLB pte (%#x) != real pte (%#x/%#x)", 414 pm, va, asid, pte, xpte, *ptep); 415 416 return true; 417 } 418 419 #ifdef MULTIPROCESSOR 420 void 421 pmap_md_tlb_info_attach(struct pmap_tlb_info *ti, struct cpu_info *ci) 422 { 423 /* nothing */ 424 } 425 426 void 427 pmap_md_tlb_miss_lock_enter(void) 428 { 429 430 mutex_spin_enter(&pmap_tlb_miss_lock); 431 } 432 433 void 434 pmap_md_tlb_miss_lock_exit(void) 435 { 436 437 mutex_spin_exit(&pmap_tlb_miss_lock); 438 } 439 #endif /* MULTIPROCESSOR */ 440