xref: /netbsd-src/sys/arch/pmax/tc/ioasic.c (revision ea57ca8e883a5507690873c1e28502e74f9ce54a)
1*ea57ca8eSsimonb /*	$NetBSD: ioasic.c,v 1.23 2020/09/03 06:42:29 simonb Exp $	*/
26aa5cbc7Snisimura 
36aa5cbc7Snisimura /*
46aa5cbc7Snisimura  * Copyright (c) 1994, 1995 Carnegie-Mellon University.
56aa5cbc7Snisimura  * All rights reserved.
66aa5cbc7Snisimura  *
76aa5cbc7Snisimura  * Author: Keith Bostic, Chris G. Demetriou, Jonathan Stone
86aa5cbc7Snisimura  *
96aa5cbc7Snisimura  * Permission to use, copy, modify and distribute this software and
106aa5cbc7Snisimura  * its documentation is hereby granted, provided that both the copyright
116aa5cbc7Snisimura  * notice and this permission notice appear in all copies of the
126aa5cbc7Snisimura  * software, derivative works or modified versions, and any portions
136aa5cbc7Snisimura  * thereof, and that both notices appear in supporting documentation.
146aa5cbc7Snisimura  *
156aa5cbc7Snisimura  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
166aa5cbc7Snisimura  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
176aa5cbc7Snisimura  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
186aa5cbc7Snisimura  *
196aa5cbc7Snisimura  * Carnegie Mellon requests users of this software to return to
206aa5cbc7Snisimura  *
216aa5cbc7Snisimura  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
226aa5cbc7Snisimura  *  School of Computer Science
236aa5cbc7Snisimura  *  Carnegie Mellon University
246aa5cbc7Snisimura  *  Pittsburgh PA 15213-3890
256aa5cbc7Snisimura  *
266aa5cbc7Snisimura  * any improvements or extensions that they make and grant Carnegie the
276aa5cbc7Snisimura  * rights to redistribute these changes.
286aa5cbc7Snisimura  */
296aa5cbc7Snisimura 
300ab58494Sad #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
31*ea57ca8eSsimonb __KERNEL_RCSID(0, "$NetBSD: ioasic.c,v 1.23 2020/09/03 06:42:29 simonb Exp $");
320ab58494Sad 
336aa5cbc7Snisimura #include <sys/param.h>
346aa5cbc7Snisimura #include <sys/systm.h>
356aa5cbc7Snisimura #include <sys/device.h>
366aa5cbc7Snisimura 
376aa5cbc7Snisimura #include <dev/tc/tcvar.h>
38c6641d91Snisimura #include <dev/tc/ioasicreg.h>
396aa5cbc7Snisimura #include <dev/tc/ioasicvar.h>
406aa5cbc7Snisimura 
41a0640b2bSmatt #include <pmax/sysconf.h>
42bdf420bdSsimonb 
436aa5cbc7Snisimura #include <pmax/pmax/pmaxtype.h>
446aa5cbc7Snisimura #include <pmax/pmax/kmin.h>
456aa5cbc7Snisimura #include <pmax/pmax/maxine.h>
466aa5cbc7Snisimura #include <pmax/pmax/kn03.h>
476aa5cbc7Snisimura 
486aa5cbc7Snisimura #include "opt_dec_3min.h"
496aa5cbc7Snisimura #include "opt_dec_maxine.h"
506aa5cbc7Snisimura #include "opt_dec_3maxplus.h"
516aa5cbc7Snisimura 
526aa5cbc7Snisimura #define ARRAY_SIZEOF(x) (sizeof((x)) / sizeof((x)[0]))
536aa5cbc7Snisimura 
546aa5cbc7Snisimura #if defined(DEC_3MIN)
556aa5cbc7Snisimura static struct ioasic_dev kmin_ioasic_devs[] = {
564f051180Snisimura 	{ "PMAD-BA ",	0x0C0000, C(SYS_DEV_LANCE),	},
574f051180Snisimura 	{ "scc",	0x100000, C(SYS_DEV_SCC0),	},
584f051180Snisimura 	{ "scc",	0x180000, C(SYS_DEV_SCC1),	},
594f051180Snisimura 	{ "mc146818",	0x200000, C(SYS_DEV_BOGUS),	},
604f051180Snisimura 	{ "asc",	0x300000, C(SYS_DEV_SCSI),	},
616aa5cbc7Snisimura };
626aa5cbc7Snisimura static int kmin_builtin_ndevs = ARRAY_SIZEOF(kmin_ioasic_devs);
636aa5cbc7Snisimura static int kmin_ioasic_ndevs = ARRAY_SIZEOF(kmin_ioasic_devs);
646aa5cbc7Snisimura #endif
656aa5cbc7Snisimura 
666aa5cbc7Snisimura #if defined(DEC_MAXINE)
676aa5cbc7Snisimura static struct ioasic_dev xine_ioasic_devs[] = {
684f051180Snisimura 	{ "PMAD-BA ",	0x0C0000, C(SYS_DEV_LANCE),	},
694f051180Snisimura 	{ "scc",	0x100000, C(SYS_DEV_SCC0),	},
704f051180Snisimura 	{ "mc146818",	0x200000, C(SYS_DEV_BOGUS),	},
714f051180Snisimura 	{ "isdn",	0x240000, C(SYS_DEV_ISDN),	},
724f051180Snisimura 	{ "dtop",	0x280000, C(SYS_DEV_DTOP),	},
734f051180Snisimura 	{ "fdc",	0x2C0000, C(SYS_DEV_FDC),	},
744f051180Snisimura 	{ "asc",	0x300000, C(SYS_DEV_SCSI),	},
754f051180Snisimura 	{ "(TC0)",	0x0,	  C(SYS_DEV_OPT0),	},
764f051180Snisimura 	{ "(TC1)",	0x0,	  C(SYS_DEV_OPT1),	},
774f051180Snisimura 	{ "(TC2)",	0x0,	  C(SYS_DEV_OPT2),	},
786aa5cbc7Snisimura };
796aa5cbc7Snisimura static int xine_builtin_ndevs = ARRAY_SIZEOF(xine_ioasic_devs) - 3;
806aa5cbc7Snisimura static int xine_ioasic_ndevs = ARRAY_SIZEOF(xine_ioasic_devs);
816aa5cbc7Snisimura #endif
826aa5cbc7Snisimura 
836aa5cbc7Snisimura #if defined(DEC_3MAXPLUS)
846aa5cbc7Snisimura static struct ioasic_dev kn03_ioasic_devs[] = {
854f051180Snisimura 	{ "PMAD-BA ",	0x0C0000, C(SYS_DEV_LANCE),	},
864f051180Snisimura 	{ "z8530   ",	0x100000, C(SYS_DEV_SCC0),	},
874f051180Snisimura 	{ "z8530   ",	0x180000, C(SYS_DEV_SCC1),	},
884f051180Snisimura 	{ "mc146818",	0x200000, C(SYS_DEV_BOGUS),	},
894f051180Snisimura 	{ "asc",	0x300000, C(SYS_DEV_SCSI),	},
904f051180Snisimura 	{ "(TC0)",	0x0,	  C(SYS_DEV_OPT0),	},
914f051180Snisimura 	{ "(TC1)",	0x0,	  C(SYS_DEV_OPT1),	},
924f051180Snisimura 	{ "(TC2)",	0x0,	  C(SYS_DEV_OPT2),	},
936aa5cbc7Snisimura };
946aa5cbc7Snisimura static int kn03_builtin_ndevs = ARRAY_SIZEOF(kn03_ioasic_devs) - 3;
956aa5cbc7Snisimura static int kn03_ioasic_ndevs = ARRAY_SIZEOF(kn03_ioasic_devs);
966aa5cbc7Snisimura #endif
976aa5cbc7Snisimura 
98def92600Stsutsui static int	ioasicmatch(device_t, cfdata_t, void *);
99def92600Stsutsui static void	ioasicattach(device_t, device_t, void *);
1006aa5cbc7Snisimura 
101def92600Stsutsui CFATTACH_DECL_NEW(ioasic, sizeof(struct ioasic_softc),
102b96bc0d7Sthorpej     ioasicmatch, ioasicattach, NULL, NULL);
1036aa5cbc7Snisimura 
104f3837e8aSnisimura tc_addr_t ioasic_base;	/* XXX XXX XXX */
105f3837e8aSnisimura 
106f3837e8aSnisimura /* There can be only one. */
107f3837e8aSnisimura int ioasicfound;
1086aa5cbc7Snisimura 
1096aa5cbc7Snisimura static int
ioasicmatch(device_t parent,cfdata_t cfdata,void * aux)110def92600Stsutsui ioasicmatch(device_t parent, cfdata_t cfdata, void *aux)
1116aa5cbc7Snisimura {
1126aa5cbc7Snisimura 	struct tc_attach_args *ta = aux;
1136aa5cbc7Snisimura 
1146aa5cbc7Snisimura 	/* Make sure that we're looking for this type of device. */
1156aa5cbc7Snisimura 	if (strncmp("IOCTL   ", ta->ta_modname, TC_ROM_LLEN))
1166aa5cbc7Snisimura 		return (0);
1176aa5cbc7Snisimura 
118f3837e8aSnisimura 	if (ioasicfound)
1196aa5cbc7Snisimura 		return (0);
1206aa5cbc7Snisimura 
1216aa5cbc7Snisimura 	return (1);
1226aa5cbc7Snisimura }
1236aa5cbc7Snisimura 
1246aa5cbc7Snisimura static void
ioasicattach(device_t parent,device_t self,void * aux)125def92600Stsutsui ioasicattach(device_t parent, device_t self, void *aux)
1266aa5cbc7Snisimura {
127def92600Stsutsui 	struct ioasic_softc *sc = device_private(self);
1286aa5cbc7Snisimura 	struct tc_attach_args *ta = aux;
1296aa5cbc7Snisimura 	struct ioasic_dev *ioasic_devs;
1306aa5cbc7Snisimura 	int ioasic_ndevs, builtin_ndevs;
1316aa5cbc7Snisimura 
132f3837e8aSnisimura 	ioasicfound = 1;
133f3837e8aSnisimura 
134def92600Stsutsui 	sc->sc_dev = self;
1356aa5cbc7Snisimura 	sc->sc_bst = ta->ta_memt;
136*ea57ca8eSsimonb 	/*
137*ea57ca8eSsimonb 	 * XXX
138*ea57ca8eSsimonb 	 * The TC device addresses are defined in KSEG1, but this
139*ea57ca8eSsimonb 	 * confuses bus_space(9) which expects bus addresses and
140*ea57ca8eSsimonb 	 * not kernel virtual addresses.  Pull the addresses back
141*ea57ca8eSsimonb 	 * to bus addresses with MIPS_KSEG1_TO_PHYS().
142*ea57ca8eSsimonb 	 */
143*ea57ca8eSsimonb 	if (bus_space_map(ta->ta_memt, MIPS_KSEG1_TO_PHYS(ta->ta_addr),
1446aa5cbc7Snisimura 			0x400000, 0, &sc->sc_bsh)) {
145def92600Stsutsui 		printf("%s: unable to map device\n", device_xname(self));
1466aa5cbc7Snisimura 		return;
1476aa5cbc7Snisimura 	}
1486aa5cbc7Snisimura 	sc->sc_dmat = ta->ta_dmat;
1496aa5cbc7Snisimura 
1506aa5cbc7Snisimura 	sc->sc_base = ta->ta_addr; /* XXX XXX XXX */
1516aa5cbc7Snisimura 
1526aa5cbc7Snisimura 	printf("\n");
1536aa5cbc7Snisimura 
1546aa5cbc7Snisimura 	switch (systype) {
1556aa5cbc7Snisimura #if defined(DEC_3MIN)
1566aa5cbc7Snisimura 	case DS_3MIN:
1576aa5cbc7Snisimura 		ioasic_devs = kmin_ioasic_devs;
1586aa5cbc7Snisimura 		ioasic_ndevs = kmin_ioasic_ndevs;
1596aa5cbc7Snisimura 		builtin_ndevs = kmin_builtin_ndevs;
1606aa5cbc7Snisimura 		break;
1616aa5cbc7Snisimura #endif
1626aa5cbc7Snisimura #if defined(DEC_MAXINE)
1636aa5cbc7Snisimura 	case DS_MAXINE:
1646aa5cbc7Snisimura 		ioasic_devs = xine_ioasic_devs;
1656aa5cbc7Snisimura 		ioasic_ndevs = xine_ioasic_ndevs;
1666aa5cbc7Snisimura 		builtin_ndevs = xine_builtin_ndevs;
1676aa5cbc7Snisimura 		break;
1686aa5cbc7Snisimura #endif
1696aa5cbc7Snisimura #if defined(DEC_3MAXPLUS)
1706aa5cbc7Snisimura 	case DS_3MAXPLUS:
1716aa5cbc7Snisimura 		ioasic_devs = kn03_ioasic_devs;
1726aa5cbc7Snisimura 		ioasic_ndevs = kn03_ioasic_ndevs;
1736aa5cbc7Snisimura 		builtin_ndevs = kn03_builtin_ndevs;
1746aa5cbc7Snisimura 		break;
1756aa5cbc7Snisimura #endif
1766aa5cbc7Snisimura 	default:
1776aa5cbc7Snisimura 		panic("ioasicmatch: how did we get here?");
1786aa5cbc7Snisimura 	}
1796aa5cbc7Snisimura 
1804f051180Snisimura #if 0 /* IMSK has been sanitized */
1816aa5cbc7Snisimura 	/*
1826aa5cbc7Snisimura 	 * Turn off all device interrupt bits.
1834f051180Snisimura 	 * (This _does_ include TC option slot bits.)
1846aa5cbc7Snisimura 	 */
1856aa5cbc7Snisimura 	imsk = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK);
1866aa5cbc7Snisimura 	for (i = 0; i < ioasic_ndevs; i++)
1876aa5cbc7Snisimura 		imsk &= ~ioasic_devs[i].iad_intrbits;
1886aa5cbc7Snisimura 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, imsk);
1897faae907Schristos #else
1907faae907Schristos 	__USE(ioasic_ndevs);
1914f051180Snisimura #endif
1926aa5cbc7Snisimura 
1936aa5cbc7Snisimura 	/*
1946aa5cbc7Snisimura 	 * Try to configure each device.
1956aa5cbc7Snisimura 	 */
1966aa5cbc7Snisimura 	ioasic_attach_devs(sc, ioasic_devs, builtin_ndevs);
1976aa5cbc7Snisimura }
1986aa5cbc7Snisimura 
199cffb5808Scgd const struct evcnt *
ioasic_intr_evcnt(device_t dev,void * cookie)200def92600Stsutsui ioasic_intr_evcnt(device_t dev, void *cookie)
201cffb5808Scgd {
202cffb5808Scgd 
203cffb5808Scgd 	/* XXX for now, no evcnt parent reported */
204cffb5808Scgd 	return NULL;
205cffb5808Scgd }
206cffb5808Scgd 
2076aa5cbc7Snisimura void
ioasic_intr_establish(device_t dev,void * cookie,int level,int (* handler)(void *),void * val)208def92600Stsutsui ioasic_intr_establish(device_t dev, void *cookie, int level,
209def92600Stsutsui     int (*handler)(void *), void *val)
2106aa5cbc7Snisimura {
211bdf420bdSsimonb 	(*platform.intr_establish)(dev, cookie, level, handler, val);
2126aa5cbc7Snisimura }
213