xref: /netbsd-src/sys/arch/pmax/include/intr.h (revision 89c5a767f8fc7a4633b2d409966e2becbb98ff92)
1 /*	$NetBSD: intr.h,v 1.13 2000/03/10 01:31:22 nisimura Exp $	*/
2 
3 /*
4  * Copyright (c) 1998 Jonathan Stone.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *	This product includes software developed by Jonathan Stone for
17  *      the NetBSD Project.
18  * 4. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #ifndef _PMAX_INTR_H_
34 #define _PMAX_INTR_H_
35 
36 #define	IPL_NONE	0	/* disable only this interrupt */
37 #define	IPL_BIO		1	/* disable block I/O interrupts */
38 #define	IPL_NET		2	/* disable network interrupts */
39 #define	IPL_TTY		3	/* disable terminal interrupts */
40 #define	IPL_CLOCK	4	/* disable clock interrupts */
41 #define	IPL_STATCLOCK	5	/* disable profiling interrupts */
42 #define	IPL_SERIAL	6	/* disable serial hardware interrupts */
43 #define	IPL_DMA		7	/* disable DMA reload interrupts */
44 #define	IPL_HIGH	8	/* disable all interrupts */
45 
46 #ifdef _KERNEL
47 #ifndef _LOCORE
48 
49 #include <mips/cpuregs.h>
50 #include <mips/intr.h>
51 
52 int	_splraise __P((int));
53 int	_spllower __P((int));
54 int	_splset __P((int));
55 int	_splget __P((void));
56 void	_splnone __P((void));
57 void	_setsoftintr __P((int));
58 void	_clrsoftintr __P((int));
59 
60 #define setsoftclock()	_setsoftintr(MIPS_SOFT_INT_MASK_0)
61 #define setsoftnet()	_setsoftintr(MIPS_SOFT_INT_MASK_1)
62 #define clearsoftclock() _clrsoftintr(MIPS_SOFT_INT_MASK_0)
63 #define clearsoftnet()	 _clrsoftintr(MIPS_SOFT_INT_MASK_1)
64 
65 #define splhigh()	_splraise(MIPS_INT_MASK)
66 #define spl0()		(void)_spllower(0)
67 #define splx(s)		(void)_splset(s)
68 #define splbio()	(_splraise(splvec.splbio))
69 #define splnet()	(_splraise(splvec.splnet))
70 #define spltty()	(_splraise(splvec.spltty))
71 #define splimp()	(_splraise(splvec.splimp))
72 #define splpmap()	(_splraise(splvec.splimp))
73 #define splclock()	(_splraise(splvec.splclock))
74 #define splstatclock()	(_splraise(splvec.splstatclock))
75 #define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0)
76 #define splsoftclock()	_splraise(MIPS_SOFT_INT_MASK_0)
77 #define splsoftnet()	_splraise(MIPS_SOFT_INT_MASK_1)
78 
79 struct splvec {
80 	int	splbio;
81 	int	splnet;
82 	int	spltty;
83 	int	splimp;
84 	int	splclock;
85 	int	splstatclock;
86 };
87 extern struct splvec splvec;
88 
89 /* Conventionals ... */
90 
91 #define MIPS_SPLHIGH (MIPS_INT_MASK)
92 #define MIPS_SPL0 (MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
93 #define MIPS_SPL1 (MIPS_INT_MASK_1|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
94 #define MIPS_SPL3 (MIPS_INT_MASK_3|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
95 #define MIPS_SPL_0_1	 (MIPS_INT_MASK_1|MIPS_SPL0)
96 #define MIPS_SPL_0_1_2	 (MIPS_INT_MASK_2|MIPS_SPL_0_1)
97 #define MIPS_SPL_0_1_3	 (MIPS_INT_MASK_3|MIPS_SPL_0_1)
98 #define MIPS_SPL_0_1_2_3 (MIPS_INT_MASK_3|MIPS_SPL_0_1_2)
99 
100 /*
101  * Index into intrcnt[], which is defined in locore
102  */
103 extern u_long intrcnt[];
104 
105 #define	SOFTCLOCK_INTR	0
106 #define	SOFTNET_INTR	1
107 #define	SERIAL0_INTR	2
108 #define	SERIAL1_INTR	3
109 #define	LANCE_INTR	4
110 #define	SCSI_INTR	5
111 #define	ERROR_INTR	6
112 #define	HARDCLOCK	7
113 #define	FPU_INTR	8
114 #define	SLOT0_INTR	9
115 #define	SLOT1_INTR	10
116 #define	SLOT2_INTR	11
117 #define	DTOP_INTR	12
118 #define	ISDN_INTR	13
119 #define	FLOPPY_INTR	14
120 #define	STRAY_INTR	15
121 
122 struct intrhand {
123 	int	(*ih_func) __P((void *));
124 	void	*ih_arg;
125 };
126 extern struct intrhand intrtab[];
127 
128 #define SYS_DEV_SCSI	SCSI_INTR
129 #define SYS_DEV_LANCE	LANCE_INTR
130 #define SYS_DEV_SCC0	SERIAL0_INTR
131 #define SYS_DEV_SCC1	SERIAL1_INTR
132 #define SYS_DEV_DTOP	DTOP_INTR
133 #define SYS_DEV_FDC	FLOPPY_INTR
134 #define SYS_DEV_ISDN	ISDN_INTR
135 #define SYS_DEV_OPT0	SLOT0_INTR
136 #define SYS_DEV_OPT1	SLOT1_INTR
137 #define SYS_DEV_OPT2	SLOT2_INTR
138 #define SYS_DEV_BOGUS	-1
139 #define MAX_DEV_NCOOKIES 16
140 
141 #endif /* !_LOCORE */
142 #endif /* _KERNEL */
143 
144 #endif	/* !_PMAX_INTR_H_ */
145