1 /* $NetBSD: bus.h,v 1.2 1997/06/16 04:22:15 jonathan Exp $ */ 2 3 /* 4 * Copyright Notice: 5 * 6 * Copyright (c) 1995, 1996, 1997 7 * Jonathan R. Stone. All rights reserved. 8 * 9 * License: 10 * 11 * This License applies to this software ("Software"), created 12 * by Jonathan Stone ("Author"). 13 * 14 * You may use, copy, modify and redistribute this Software without 15 * charge, in either source code form, binary form, or both, on the 16 * following conditions: 17 * 18 * 1. (a) Binary code: (i) a complete copy of the above copyright notice 19 * must be included within each copy of the Software in binary code form, 20 * and (ii) a complete copy of the above copyright notice and all terms 21 * of this License as presented here must be included within each copy of 22 * all documentation accompanying or associated with binary code, in any 23 * medium, along with a list of the software modules to which the license 24 * applies. 25 * 26 * (b) Source Code: A complete copy of the above copyright notice and all 27 * terms of this License as presented here must be included within: (i) 28 * each copy of the Software in source code form, and (ii) each copy of 29 * all accompanying or associated documentation, in any medium. 30 * 31 * 2. The following Acknowledgment must be used in communications 32 * involving the Software as described below: 33 * 34 * This product includes software developed by 35 * Jonathan Stone for the NetBSD Project. 36 * 37 * The Acknowledgment must be conspicuously and completely displayed 38 * whenever the Software, or any software, products or systems containing 39 * the Software, are mentioned in advertising, marketing, informational 40 * or publicity materials of any kind, whether in print, electronic or 41 * other media (except for information provided to support use of 42 * products containing the Software by existing users or customers). 43 * 44 * 3. The name of the Author may not be used to endorse or promote 45 * products derived from this Software without specific prior written 46 * permission (conditions (1) and (2) above are not considered 47 * endorsement or promotion). 48 * 49 * 4. This license applies to: (a) all copies of the Software, whether 50 * partial or whole, original or modified, and (b) your actions, and the 51 * actions of all those who may act on your behalf. All uses not 52 * expressly permitted are reserved to the Author. 53 * 54 * 5. Disclaimer. THIS SOFTWARE IS MADE AVAILABLE BY THE AUTHOR TO THE 55 * PUBLIC FOR FREE AND "AS IS.'' ALL USERS OF THIS FREE SOFTWARE ARE 56 * SOLELY AND ENTIRELY RESPONSIBLE FOR THEIR OWN CHOICE AND USE OF THIS 57 * SOFTWARE FOR THEIR OWN PURPOSES. BY USING THIS SOFTWARE, EACH USER 58 * AGREES THAT THE AUTHOR SHALL NOT BE LIABLE FOR DAMAGES OF ANY KIND IN 59 * RELATION TO ITS USE OR PERFORMANCE. 60 * 61 * 6. If you have a special need for a change in one or more of these 62 * license conditions, please contact the Author via electronic mail to 63 * 64 * jonathan@NetBSD.ORG 65 * 66 * or via the contact information on 67 * 68 * http://www.NetBSD.ORG/People/Pages/jonathan.html 69 */ 70 71 72 /* 73 * NetBSD machine-indepedent bus accessor macros/functions for Decstations. 74 */ 75 #ifndef _PMAX_BUS_H_ 76 #define _PMAX_BUS_H_ 77 78 #include <mips/locore.h> /* wbflush() */ 79 80 81 /* 82 * Bus address and size types 83 */ 84 typedef u_long bus_addr_t; 85 typedef u_long bus_size_t; 86 87 /* 88 * Access types for bus resources and addresses. 89 */ 90 typedef int bus_space_tag_t; 91 typedef u_long bus_space_handle_t; 92 93 94 /* 95 * Read or write a 1, 2, or 4-byte quantity from/to a bus-space 96 * address, as defined by (space-tag, handle, offset 97 */ 98 #define bus_space_read_1(t, h, o) \ 99 (*(volatile u_int8_t *)((h) + (o))) 100 101 #define bus_space_read_2(t, h, o) \ 102 (*(volatile u_int16_t *)((h) + (o))) 103 104 #define bus_space_read_4(t, h, o) \ 105 (*(volatile u_int32_t *)((h) + (o))) 106 107 #define bus_space_write_1(t, h, o, v) \ 108 do { ((void)(*(volatile u_int8_t *)((h) + (o)) = (v))); } while (0) 109 110 #define bus_space_write_2(t, h, o, v) \ 111 do { ((void)(*(volatile u_int16_t *)((h) + (o)) = (v))); } while (0) 112 113 #define bus_space_write_4(t, h, o, v) \ 114 do { ((void)(*(volatile u_int32_t *)((h) + (o)) = (v))); } while (0) 115 116 /* 117 * Read `count' 1, 2, or 4-byte quantities from bus-space 118 * address, defined by (space-tag, handle, offset). 119 * Copy to the specified buffer address. 120 */ 121 #define bus_space_read_multi_1(t, h, o, a, c) \ 122 do { \ 123 register int __i ; \ 124 for (__i = 0; i < (c); i++) \ 125 ((u_char *)(a))[__i] = bus_space_read_1(t, h, o); \ 126 } while (0) 127 128 129 #define bus_space_read_multi_2(t, h, o, a, c) \ 130 do { \ 131 register int __i ; \ 132 for (__i = 0; i < (c); i++) \ 133 ((u_int16t_t *)(a))[__i] = bus_space_read_2(t, h, o); \ 134 } while (0) 135 136 #define bus_space_read_multi_4(t, h, o, a, c) \ 137 do { \ 138 register int __i ; \ 139 for (__i = 0; i < (c); i++) \ 140 ((u_int32_t *)(a))[__i] = bus_space_read_4(t, h, o); \ 141 } while (0) 142 143 /* 144 * Write `count' 1, 2, or 4-byte quantities to a bus-space 145 * address, defined by (space-tag, handle, offset). 146 * Copy from the specified buffer address. 147 */ 148 #define bus_space_write_multi_1(t, h, o, a, c) \ 149 do { \ 150 register int __i ; \ 151 for (__i = 0; i < (c); i++) \ 152 bus_space_write_1(t, h, o, ((u_char *)(a))[__i]); \ 153 } while (0) 154 155 #define bus_space_write_multi_2(t, h, o, a, c) \ 156 do { \ 157 register int __i ; \ 158 for (__i = 0; i < (c); i++) \ 159 bus_space_write_2(t, h, o, ((u_int16_t *)(a))[__i]); \ 160 } while (0) 161 162 #define bus_space_write_multi_4(t, h, o, a, c) \ 163 do { \ 164 register int __i ; \ 165 for (__i = 0; i < (c); i++) \ 166 bus_space_write_4(t, h, o, ((u_int32_t *)(a))[__i]); \ 167 } while (0) 168 169 /* 170 * Copy `count' 1, 2, or 4-byte values from one bus-space address 171 * (t, h, o triple) to another. 172 */ 173 #define bus_space_copy_multi_1(t, h1, h2, o1, o2, c) \ 174 do { \ 175 register int __i ; \ 176 for (__i = 0; i < (c); i++) \ 177 bus_space_write_1(t, h1, o1, bus_space_read_1(t, h2, o2)); \ 178 } while (0) 179 180 #define bus_space_copy_multi_2(t, h1, h2, o1, o2, c) \ 181 do { \ 182 register int __i ; \ 183 for (__i = 0; i < (c); i++) \ 184 bus_space_write_2(t, h1, o1, bus_space_read_2(t, h2, o2)); \ 185 while (0) 186 187 #define bus_space_copy_multi_4(t, h1, h2, o1, o2, c) \ 188 do { \ 189 register int __i ; \ 190 for (__i = 0; i < (c); i++) \ 191 bus_space_write_4(t, h1, o1, bus_space_read_4(t, h2, o2)); \ 192 } while (0) 193 194 195 /* 196 * Bus-space barriers. 197 * Since DECstation DMA is non-cache-coherent, we have to handle 198 * consistency in software anyway (e.g., via bus -DMA, or by ensuring 199 * that DMA buffers are referenced via uncached address space. 200 * For now, simply do CPU writebuffer flushes and export the flags 201 * to MI code. 202 */ 203 #define bus_space_barrier(t, h, o, l, f) \ 204 ((void) wbflush(); 205 206 #define BUS_BARRIER_READ 0x01 207 #define BUS_BARRIER_WRITE 0x02 208 209 #endif /* _PMAX_BUS_H_ */ 210