xref: /netbsd-src/sys/arch/playstation2/include/intr.h (revision 27fd3f6531803adac12382d7643a9a492b576601)
1 /*	$NetBSD: intr.h,v 1.9 2008/04/28 20:23:31 martin Exp $	*/
2 
3 /*-
4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe, UCHIYAMA Yasushi.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _PLAYSTATION2_INTR_H_
33 #define _PLAYSTATION2_INTR_H_
34 #ifdef _KERNEL
35 
36 #include <mips/locore.h>
37 
38 /* Interrupt sharing types. */
39 #define	IST_NONE		0	/* none */
40 #define	IST_PULSE		1	/* pulsed */
41 #define	IST_EDGE		2	/* edge-triggered */
42 #define	IST_LEVEL		3	/* level-triggered */
43 
44 /* Interrupt priority levels */
45 #define	IPL_NONE		0	/* nothing */
46 #define IPL_SOFTCLOCK		1	/* timeouts */
47 #define	IPL_SOFTBIO		1	/* bio */
48 #define	IPL_SOFTNET		2	/* protocol stacks */
49 #define IPL_SOFTSERIAL		2	/* serial */
50 #define	IPL_VM			3	/* i/o */
51 #define	IPL_SCHED		4	/* clock */
52 #define	IPL_HIGH		4	/* everything */
53 
54 #define	_IPL_NSOFT	4
55 #define	_IPL_N		5
56 
57 /*
58  * Hardware interrupt masks
59  */
60 extern u_int32_t __icu_mask[_IPL_N];
61 
62 #define splsoftclock()		splraise(__icu_mask[IPL_SOFTCLOCK])
63 #define	splsoftbio()		splraise(__icu_mask[IPL_SOFTBIO])
64 #define	splsoftnet()		splraise(__icu_mask[IPL_SOFTNET])
65 #define	splsoftserial()		splraise(__icu_mask[IPL_SOFTSERIAL])
66 #define	splvm()			splraise(__icu_mask[IPL_VM])
67 #define	splsched()		splraise(__icu_mask[IPL_SCHED])
68 #define	splx(s)			splset(s)
69 
70 void	spllowersofthigh(void);
71 
72 int splraise(int);
73 void splset(int);
74 void spl0(void);
75 
76 /* R5900 EI/DI instruction */
77 int _intr_suspend(void);
78 void _intr_resume(int);
79 
80 #endif /* _KERNEL */
81 #endif /* _PLAYSTATION2_INTR_H_ */
82