xref: /netbsd-src/sys/arch/playstation2/ee/timer.c (revision fad4c9f71477ae11cea2ee75ec82151ac770a534)
1 /*	$NetBSD: timer.c,v 1.3 2005/12/11 12:18:36 christos Exp $	*/
2 
3 /*-
4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by UCHIYAMA Yasushi.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #include <sys/cdefs.h>
40 __KERNEL_RCSID(0, "$NetBSD: timer.c,v 1.3 2005/12/11 12:18:36 christos Exp $");
41 
42 #include "debug_playstation2.h"
43 
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 
47 #include <playstation2/playstation2/interrupt.h>
48 
49 #include <playstation2/ee/eevar.h>
50 #include <playstation2/ee/intcvar.h>
51 #include <playstation2/ee/timervar.h>
52 #include <playstation2/ee/timerreg.h>
53 
54 
55 #ifdef DEBUG
56 #define STATIC
57 #else
58 #define STATIC static
59 #endif
60 
61 STATIC int timer0_intr(void *);
62 
63 /*
64  * EE timer usage
65  *	0 ... 100 Hz clock interrupt.
66  *      1 ... one shot interrupt for software interrupt for IPL_SOFT
67  *	2 ... for IPL_SOFTCLOCK
68  *	3 ... for IPL_SOFTNET, IPL_SOFTSERIAL
69  */
70 
71 void
72 timer_init()
73 {
74 
75 	_reg_write_4(T0_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
76 	_reg_write_4(T1_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
77 	_reg_write_4(T2_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
78 	_reg_write_4(T3_MODE_REG, (T_MODE_EQUF | T_MODE_OVFF));
79 }
80 
81 void
82 timer_clock_init()
83 {
84 	/* clock interrupt (296.912MHz / 2 / 256) * 5760 = 100Hz */
85 	intc_intr_establish(I_CH9_TIMER0, IPL_CLOCK, timer0_intr, 0);
86 	_reg_write_4(T0_COUNT_REG, 0);
87 	_reg_write_4(T0_COMP_REG, 5760);
88 	_reg_write_4(T0_MODE_REG, T_MODE_CLKS_BUSCLK256 | T_MODE_ZRET |
89 	    T_MODE_CUE | T_MODE_CMPE);
90 }
91 
92 void
93 timer_one_shot(int timer)
94 {
95 	KDASSERT(LEGAL_TIMER(timer) && timer != 0);
96 
97 	_reg_write_4(T_COUNT_REG(timer), 0);
98 	_reg_write_4(T_COMP_REG(timer), 1);
99 	_reg_write_4(T_MODE_REG(timer), T_MODE_CUE | T_MODE_CMPE);
100 }
101 
102 /*
103  * interrupt handler for clock interrupt (100Hz)
104  */
105 int
106 timer0_intr(void *arg)
107 {
108 
109 	_reg_write_4(T0_MODE_REG, _reg_read_4(T0_MODE_REG) | T_MODE_EQUF);
110 
111 	_playstation2_evcnt.clock.ev_count++;
112 
113 	hardclock(&playstation2_clockframe);
114 
115 	return (1);
116 }
117 
118 /* one shot timer interrupt for software interrupt */
119 int
120 timer1_intr(void *arg)
121 {
122 
123 	_reg_write_4(T1_MODE_REG, T_MODE_EQUF | T_MODE_OVFF);
124 
125 	softintr_dispatch(0); /* IPL_SOFT */
126 
127 	return (1);
128 }
129 
130 int
131 timer2_intr(void *arg)
132 {
133 
134 	_reg_write_4(T2_MODE_REG, T_MODE_EQUF | T_MODE_OVFF);
135 
136 	softintr_dispatch(1); /* IPL_SOFTCLOCK */
137 
138 	return (1);
139 }
140 
141 int
142 timer3_intr(void *arg)
143 {
144 
145 	_reg_write_4(T3_MODE_REG, T_MODE_EQUF | T_MODE_OVFF);
146 
147 	softintr_dispatch(3); /* IPL_SOFTSERIAL */
148 	softintr_dispatch(2); /* IPL_SOFTNET */
149 
150 	return (1);
151 }
152