xref: /netbsd-src/sys/arch/next68k/include/pte.h (revision 5e4c038a45edbc7d63b7c2daa76e29f88b64a4e3)
1 /*	$NetBSD: pte.h,v 1.2 1998/08/28 23:05:54 dbj Exp $	*/
2 
3 /*
4  * This file was taken from from mvme68k/include/pte.h and
5  * should probably be re-synced when needed.
6  * Darrin B Jewell <jewell@mit.edu>  Fri Aug 28 03:22:07 1998
7  * original cvs id: NetBSD: pte.h,v 1.1.1.1 1995/07/25 23:12:17 chuck Exp
8  */
9 
10 
11 /*
12  * Copyright (c) 1988 University of Utah.
13  * Copyright (c) 1982, 1986, 1990, 1993
14  *	The Regents of the University of California.  All rights reserved.
15  *
16  * This code is derived from software contributed to Berkeley by
17  * the Systems Programming Group of the University of Utah Computer
18  * Science Department.
19  *
20  * Redistribution and use in source and binary forms, with or without
21  * modification, are permitted provided that the following conditions
22  * are met:
23  * 1. Redistributions of source code must retain the above copyright
24  *    notice, this list of conditions and the following disclaimer.
25  * 2. Redistributions in binary form must reproduce the above copyright
26  *    notice, this list of conditions and the following disclaimer in the
27  *    documentation and/or other materials provided with the distribution.
28  * 3. All advertising materials mentioning features or use of this software
29  *    must display the following acknowledgement:
30  *	This product includes software developed by the University of
31  *	California, Berkeley and its contributors.
32  * 4. Neither the name of the University nor the names of its contributors
33  *    may be used to endorse or promote products derived from this software
34  *    without specific prior written permission.
35  *
36  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
37  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
38  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
39  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
40  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
41  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
42  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
43  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
44  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
45  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
46  * SUCH DAMAGE.
47  *
48  * from: Utah $Hdr: pte.h 1.13 92/01/20$
49  *
50  *	@(#)pte.h	8.1 (Berkeley) 6/10/93
51  */
52 
53 #ifndef	_MACHINE_PTE_H_
54 #define	_MACHINE_PTE_H_
55 
56 /*
57  * m68k hardware segment/page table entries
58  */
59 
60 #if 0
61 struct ste {
62 	unsigned int	sg_pfnum:20;	/* page table frame number */
63 	unsigned int	:8;		/* reserved at 0 */
64 	unsigned int	:1;		/* reserved at 1 */
65 	unsigned int	sg_prot:1;	/* write protect bit */
66 	unsigned int	sg_v:2;		/* valid bits */
67 };
68 
69 struct ste40 {
70 	unsigned int	sg_ptaddr:24;	/* page table page addr */
71 	unsigned int	:4;		/* reserved at 0 */
72 	unsigned int	sg_u;		/* hardware modified (dirty) bit */
73 	unsigned int	sg_prot:1;	/* write protect bit */
74 	unsigned int	sg_v:2;		/* valid bits */
75 };
76 
77 struct pte {
78 	unsigned int	pg_pfnum:20;	/* page frame number or 0 */
79 	unsigned int	:3;
80 	unsigned int	pg_w:1;		/* is wired */
81 	unsigned int	:1;		/* reserved at zero */
82 	unsigned int	pg_ci:1;	/* cache inhibit bit */
83 	unsigned int	:1;		/* reserved at zero */
84 	unsigned int	pg_m:1;		/* hardware modified (dirty) bit */
85 	unsigned int	pg_u:1;		/* hardware used (reference) bit */
86 	unsigned int	pg_prot:1;	/* write protect bit */
87 	unsigned int	pg_v:2;		/* valid bit */
88 };
89 #endif
90 
91 typedef int	st_entry_t;	/* segment table entry */
92 typedef int	pt_entry_t;	/* Mach page table entry */
93 
94 #define	PT_ENTRY_NULL	((pt_entry_t *) 0)
95 #define	ST_ENTRY_NULL	((st_entry_t *) 0)
96 
97 #define	SG_V		0x00000002	/* segment is valid */
98 #define	SG_NV		0x00000000
99 #define	SG_PROT		0x00000004	/* access protection mask */
100 #define	SG_RO		0x00000004
101 #define	SG_RW		0x00000000
102 #define	SG_U		0x00000008	/* modified bit (68040) */
103 #define	SG_FRAME	0xfffff000
104 #define	SG_IMASK	0xffc00000
105 #define	SG_ISHIFT	22
106 #define	SG_PMASK	0x003ff000
107 #define	SG_PSHIFT	12
108 
109 /* 68040 additions */
110 #define	SG4_MASK1	0xfe000000
111 #define	SG4_SHIFT1	25
112 #define	SG4_MASK2	0x01fc0000
113 #define	SG4_SHIFT2	18
114 #define	SG4_MASK3	0x0003f000
115 #define	SG4_SHIFT3	12
116 #define	SG4_ADDR1	0xfffffe00
117 #define	SG4_ADDR2	0xffffff00
118 #define	SG4_LEV1SIZE	128
119 #define	SG4_LEV2SIZE	128
120 #define	SG4_LEV3SIZE	64
121 
122 #define	PG_V		0x00000001
123 #define	PG_NV		0x00000000
124 #define	PG_PROT		0x00000004
125 #define	PG_U		0x00000008
126 #define	PG_M		0x00000010
127 #define	PG_W		0x00000100
128 #define	PG_RO		0x00000004
129 #define	PG_RW		0x00000000
130 #define	PG_FRAME	0xfffff000
131 #define	PG_CI		0x00000040
132 #define PG_SHIFT	12
133 #define	PG_PFNUM(x)	(((x) & PG_FRAME) >> PG_SHIFT)
134 
135 /* 68040 additions */
136 #define	PG_CMASK	0x00000060	/* cache mode mask */
137 #define	PG_CWT		0x00000000	/* writethrough caching */
138 #define	PG_CCB		0x00000020	/* copyback caching */
139 #define	PG_CIS		0x00000040	/* cache inhibited serialized */
140 #define	PG_CIN		0x00000060	/* cache inhibited nonserialized */
141 #define	PG_SO		0x00000080	/* supervisor only */
142 
143 #define HP_STSIZE	(MAXUL2SIZE*SG4_LEV2SIZE*sizeof(st_entry_t))
144 					/* user process segment table size */
145 #define HP_MAX_PTSIZE	0x400000	/* max size of UPT */
146 #define HP_MAX_KPTSIZE	0x100000	/* max memory to allocate to KPT */
147 #define HP_PTBASE	0x10000000	/* UPT map base address */
148 #define HP_PTMAXSIZE	0x70000000	/* UPT map maximum size */
149 
150 /*
151  * Kernel virtual address to page table entry and to physical address.
152  */
153 #define	kvtopte(va) \
154 	(&Sysmap[((unsigned)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT])
155 #define	ptetokv(pt) \
156 	((((pt_entry_t *)(pt) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS)
157 #define	kvtophys(va) \
158 	((kvtopte(va)->pg_pfnum << PGSHIFT) | ((int)(va) & PGOFSET))
159 
160 #endif /* !_MACHINE_PTE_H_ */
161