1 /* $NetBSD: mb8795.c,v 1.44 2008/12/16 22:35:24 christos Exp $ */ 2 /* 3 * Copyright (c) 1998 Darrin B. Jewell 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Darrin B. Jewell 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: mb8795.c,v 1.44 2008/12/16 22:35:24 christos Exp $"); 34 35 #include "opt_inet.h" 36 #include "bpfilter.h" 37 #include "rnd.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/syslog.h> 43 #include <sys/socket.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 #include <sys/ioctl.h> 47 #include <sys/errno.h> 48 #if NRND > 0 49 #include <sys/rnd.h> 50 #endif 51 52 #include <net/if.h> 53 #include <net/if_dl.h> 54 #include <net/if_ether.h> 55 56 #include <net/if_media.h> 57 58 #ifdef INET 59 #include <netinet/in.h> 60 #include <netinet/if_inarp.h> 61 #include <netinet/in_systm.h> 62 #include <netinet/in_var.h> 63 #include <netinet/ip.h> 64 #endif 65 66 67 68 #if NBPFILTER > 0 69 #include <net/bpf.h> 70 #include <net/bpfdesc.h> 71 #endif 72 73 #include <machine/cpu.h> 74 #include <machine/bus.h> 75 #include <machine/intr.h> 76 77 /* @@@ this is here for the REALIGN_DMABUF hack below */ 78 #include "nextdmareg.h" 79 #include "nextdmavar.h" 80 81 #include "mb8795reg.h" 82 #include "mb8795var.h" 83 84 #include "bmapreg.h" 85 86 #ifdef DEBUG 87 #define MB8795_DEBUG 88 #endif 89 90 #define PRINTF(x) printf x; 91 #ifdef MB8795_DEBUG 92 int mb8795_debug = 0; 93 #define DPRINTF(x) if (mb8795_debug) printf x; 94 #else 95 #define DPRINTF(x) 96 #endif 97 98 extern int turbo; 99 100 /* 101 * Support for 102 * Fujitsu Ethernet Data Link Controller (MB8795) 103 * and the Fujitsu Manchester Encoder/Decoder (MB502). 104 */ 105 106 void mb8795_shutdown(void *); 107 108 bus_dmamap_t mb8795_txdma_restart(bus_dmamap_t, void *); 109 void mb8795_start_dma(struct mb8795_softc *); 110 111 int mb8795_mediachange(struct ifnet *); 112 void mb8795_mediastatus(struct ifnet *, struct ifmediareq *); 113 114 void 115 mb8795_config(struct mb8795_softc *sc, int *media, int nmedia, int defmedia) 116 { 117 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 118 119 DPRINTF(("%s: mb8795_config()\n",sc->sc_dev.dv_xname)); 120 121 /* Initialize ifnet structure. */ 122 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 123 ifp->if_softc = sc; 124 ifp->if_start = mb8795_start; 125 ifp->if_ioctl = mb8795_ioctl; 126 ifp->if_watchdog = mb8795_watchdog; 127 ifp->if_flags = 128 IFF_BROADCAST | IFF_NOTRAILERS; 129 130 /* Initialize media goo. */ 131 ifmedia_init(&sc->sc_media, 0, mb8795_mediachange, 132 mb8795_mediastatus); 133 if (media != NULL) { 134 int i; 135 for (i = 0; i < nmedia; i++) 136 ifmedia_add(&sc->sc_media, media[i], 0, NULL); 137 ifmedia_set(&sc->sc_media, defmedia); 138 } else { 139 ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL); 140 ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL); 141 } 142 143 /* Attach the interface. */ 144 if_attach(ifp); 145 ether_ifattach(ifp, sc->sc_enaddr); 146 147 sc->sc_sh = shutdownhook_establish(mb8795_shutdown, sc); 148 if (sc->sc_sh == NULL) 149 panic("mb8795_config: can't establish shutdownhook"); 150 151 #if NRND > 0 152 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 153 RND_TYPE_NET, 0); 154 #endif 155 156 DPRINTF(("%s: leaving mb8795_config()\n",sc->sc_dev.dv_xname)); 157 } 158 159 /* 160 * Media change callback. 161 */ 162 int 163 mb8795_mediachange(struct ifnet *ifp) 164 { 165 struct mb8795_softc *sc = ifp->if_softc; 166 int data; 167 168 if (turbo) 169 return (0); 170 171 switch IFM_SUBTYPE(sc->sc_media.ifm_media) { 172 case IFM_AUTO: 173 if ((bus_space_read_1(sc->sc_bmap_bst, sc->sc_bmap_bsh, BMAP_DATA) & 174 BMAP_DATA_UTPENABLED_MASK) || 175 !(bus_space_read_1(sc->sc_bmap_bst, sc->sc_bmap_bsh, BMAP_DATA) & 176 BMAP_DATA_UTPCARRIER_MASK)) { 177 data = BMAP_DATA_UTPENABLE; 178 sc->sc_media.ifm_cur->ifm_data = IFM_ETHER|IFM_10_T; 179 } else { 180 data = BMAP_DATA_BNCENABLE; 181 sc->sc_media.ifm_cur->ifm_data = IFM_ETHER|IFM_10_2; 182 } 183 break; 184 case IFM_10_T: 185 data = BMAP_DATA_UTPENABLE; 186 break; 187 case IFM_10_2: 188 data = BMAP_DATA_BNCENABLE; 189 break; 190 default: 191 return (1); 192 break; 193 } 194 195 bus_space_write_1(sc->sc_bmap_bst, sc->sc_bmap_bsh, 196 BMAP_DDIR, BMAP_DDIR_UTPENABLE_MASK); 197 bus_space_write_1(sc->sc_bmap_bst, sc->sc_bmap_bsh, 198 BMAP_DATA, data); 199 200 return (0); 201 } 202 203 /* 204 * Media status callback. 205 */ 206 void 207 mb8795_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr) 208 { 209 struct mb8795_softc *sc = ifp->if_softc; 210 211 if (turbo) 212 return; 213 214 if (IFM_SUBTYPE(ifmr->ifm_active) == IFM_AUTO) { 215 ifmr->ifm_active = sc->sc_media.ifm_cur->ifm_data; 216 } 217 if (IFM_SUBTYPE(ifmr->ifm_active) == IFM_10_T) { 218 ifmr->ifm_status = IFM_AVALID; 219 if (!(bus_space_read_1(sc->sc_bmap_bst, sc->sc_bmap_bsh, BMAP_DATA) & 220 BMAP_DATA_UTPCARRIER_MASK)) 221 ifmr->ifm_status |= IFM_ACTIVE; 222 } else { 223 ifmr->ifm_status &= ~IFM_AVALID; /* don't know for 10_2 */ 224 } 225 return; 226 } 227 228 /****************************************************************/ 229 #ifdef MB8795_DEBUG 230 #define XCHR(x) hexdigits[(x) & 0xf] 231 static void 232 mb8795_hex_dump(unsigned char *pkt, size_t len) 233 { 234 size_t i, j; 235 236 printf("00000000 "); 237 for(i=0; i<len; i++) { 238 printf("%c%c ", XCHR(pkt[i]>>4), XCHR(pkt[i])); 239 if ((i+1) % 16 == 8) { 240 printf(" "); 241 } 242 if ((i+1) % 16 == 0) { 243 printf(" %c", '|'); 244 for(j=0; j<16; j++) { 245 printf("%c", pkt[i-15+j]>=32 && pkt[i-15+j]<127?pkt[i-15+j]:'.'); 246 } 247 printf("%c\n%c%c%c%c%c%c%c%c ", '|', 248 XCHR((i+1)>>28),XCHR((i+1)>>24),XCHR((i+1)>>20),XCHR((i+1)>>16), 249 XCHR((i+1)>>12), XCHR((i+1)>>8), XCHR((i+1)>>4), XCHR(i+1)); 250 } 251 } 252 printf("\n"); 253 } 254 #undef XCHR 255 #endif 256 257 /* 258 * Controller receive interrupt. 259 */ 260 void 261 mb8795_rint(struct mb8795_softc *sc) 262 { 263 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 264 int error = 0; 265 u_char rxstat; 266 u_char rxmask; 267 268 rxstat = MB_READ_REG(sc, MB8795_RXSTAT); 269 rxmask = MB_READ_REG(sc, MB8795_RXMASK); 270 271 MB_WRITE_REG(sc, MB8795_RXSTAT, MB8795_RXSTAT_CLEAR); 272 273 if (rxstat & MB8795_RXSTAT_RESET) { 274 DPRINTF(("%s: rx reset packet\n", 275 sc->sc_dev.dv_xname)); 276 error++; 277 } 278 if (rxstat & MB8795_RXSTAT_SHORT) { 279 DPRINTF(("%s: rx short packet\n", 280 sc->sc_dev.dv_xname)); 281 error++; 282 } 283 if (rxstat & MB8795_RXSTAT_ALIGNERR) { 284 DPRINTF(("%s: rx alignment error\n", 285 sc->sc_dev.dv_xname)); 286 #if 0 287 error++; 288 #endif 289 } 290 if (rxstat & MB8795_RXSTAT_CRCERR) { 291 DPRINTF(("%s: rx CRC error\n", 292 sc->sc_dev.dv_xname)); 293 #if 0 294 error++; 295 #endif 296 } 297 if (rxstat & MB8795_RXSTAT_OVERFLOW) { 298 DPRINTF(("%s: rx overflow error\n", 299 sc->sc_dev.dv_xname)); 300 #if 0 301 error++; 302 #endif 303 } 304 305 if (error) { 306 ifp->if_ierrors++; 307 /* @@@ handle more gracefully, free memory, etc. */ 308 } 309 310 if (rxstat & MB8795_RXSTAT_OK) { 311 struct mbuf *m; 312 int s; 313 s = spldma(); 314 315 while ((m = MBDMA_RX_MBUF (sc))) { 316 /* CRC is included with the packet; trim it. */ 317 m->m_pkthdr.len = m->m_len = m->m_len - ETHER_CRC_LEN; 318 m->m_pkthdr.rcvif = ifp; 319 320 /* Find receive length, keep crc */ 321 /* enable DMA interrupts while we process the packet */ 322 splx(s); 323 324 #if defined(MB8795_DEBUG) 325 /* Peek at the packet */ 326 DPRINTF(("%s: received packet, at VA %p-%p,len %d\n", 327 sc->sc_dev.dv_xname,mtod(m,u_char *),mtod(m,u_char *)+m->m_len,m->m_len)); 328 if (mb8795_debug > 3) { 329 mb8795_hex_dump(mtod(m,u_char *), m->m_pkthdr.len); 330 } else if (mb8795_debug > 2) { 331 mb8795_hex_dump(mtod(m,u_char *), m->m_pkthdr.len < 255 ? m->m_pkthdr.len : 128 ); 332 } 333 #endif 334 335 #if NBPFILTER > 0 336 /* 337 * Pass packet to bpf if there is a listener. 338 */ 339 if (ifp->if_bpf) 340 bpf_mtap(ifp->if_bpf, m); 341 #endif 342 343 { 344 ifp->if_ipackets++; 345 346 /* Pass the packet up. */ 347 (*ifp->if_input)(ifp, m); 348 } 349 350 s = spldma(); 351 352 } 353 354 splx(s); 355 356 } 357 358 #ifdef MB8795_DEBUG 359 if (mb8795_debug) { 360 char sbuf[256]; 361 362 snprintb(sbuf, sizeof(sbuf), MB8795_RXSTAT_BITS, rxstat); 363 printf("%s: rx interrupt, rxstat = %s\n", 364 sc->sc_dev.dv_xname, sbuf); 365 366 snprintb(sbuf, sizeof(sbuf), MB8795_RXSTAT_BITS, 367 MB_READ_REG(sc, MB8795_RXSTAT)); 368 369 printf("rxstat = 0x%s\n", sbuf); 370 371 snprintb(sbuf, sizeof(sbuf), MB8795_RXMASK_BITS, 372 MB_READ_REG(sc, MB8795_RXMASK)); 373 printf("rxmask = 0x%s\n", sbuf); 374 375 snprintb(sbuf, sizeof(sbuf), MB8795_RXMODE_BITS, 376 MB_READ_REG(sc, MB8795_RXMODE)); 377 printf("rxmode = 0x%s\n", sbuf); 378 } 379 #endif 380 381 return; 382 } 383 384 /* 385 * Controller transmit interrupt. 386 */ 387 void 388 mb8795_tint(struct mb8795_softc *sc) 389 { 390 u_char txstat; 391 u_char txmask; 392 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 393 394 panic ("tint"); 395 txstat = MB_READ_REG(sc, MB8795_TXSTAT); 396 txmask = MB_READ_REG(sc, MB8795_TXMASK); 397 398 if ((txstat & MB8795_TXSTAT_READY) || 399 (txstat & MB8795_TXSTAT_TXRECV)) { 400 /* printf("X"); */ 401 MB_WRITE_REG(sc, MB8795_TXSTAT, MB8795_TXSTAT_CLEAR); 402 /* MB_WRITE_REG(sc, MB8795_TXMASK, txmask & ~MB8795_TXMASK_READYIE); */ 403 /* MB_WRITE_REG(sc, MB8795_TXMASK, txmask & ~MB8795_TXMASK_TXRXIE); */ 404 MB_WRITE_REG(sc, MB8795_TXMASK, 0); 405 if ((ifp->if_flags & IFF_RUNNING) && !IF_IS_EMPTY(&sc->sc_tx_snd)) { 406 void mb8795_start_dma(struct mb8795_softc *); /* XXXX */ 407 /* printf ("Z"); */ 408 mb8795_start_dma(sc); 409 } 410 return; 411 } 412 413 if (txstat & MB8795_TXSTAT_SHORTED) { 414 printf("%s: tx cable shorted\n", sc->sc_dev.dv_xname); 415 ifp->if_oerrors++; 416 } 417 if (txstat & MB8795_TXSTAT_UNDERFLOW) { 418 printf("%s: tx underflow\n", sc->sc_dev.dv_xname); 419 ifp->if_oerrors++; 420 } 421 if (txstat & MB8795_TXSTAT_COLLERR) { 422 DPRINTF(("%s: tx collision\n", sc->sc_dev.dv_xname)); 423 ifp->if_collisions++; 424 } 425 if (txstat & MB8795_TXSTAT_COLLERR16) { 426 printf("%s: tx 16th collision\n", sc->sc_dev.dv_xname); 427 ifp->if_oerrors++; 428 ifp->if_collisions += 16; 429 } 430 431 #if 0 432 if (txstat & MB8795_TXSTAT_READY) { 433 char sbuf[256]; 434 435 snprintb(sbuf, sizeof(sbuf), MB8795_TXSTAT_BITS, txstat); 436 panic("%s: unexpected tx interrupt %s", 437 sc->sc_dev.dv_xname, sbuf); 438 439 /* turn interrupt off */ 440 MB_WRITE_REG(sc, MB8795_TXMASK, txmask & ~MB8795_TXMASK_READYIE); 441 } 442 #endif 443 444 return; 445 } 446 447 /****************************************************************/ 448 449 void 450 mb8795_reset(struct mb8795_softc *sc) 451 { 452 int s; 453 int i; 454 455 s = splnet(); 456 457 DPRINTF (("%s: mb8795_reset()\n",sc->sc_dev.dv_xname)); 458 459 sc->sc_ethercom.ec_if.if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 460 sc->sc_ethercom.ec_if.if_timer = 0; 461 462 MBDMA_RESET(sc); 463 464 MB_WRITE_REG(sc, MB8795_RESET, MB8795_RESET_MODE); 465 466 mb8795_mediachange(&sc->sc_ethercom.ec_if); 467 468 #if 0 /* This interrupt was sometimes failing to ack correctly 469 * causing a loop @@@ 470 */ 471 MB_WRITE_REG(sc, MB8795_TXMASK, 472 MB8795_TXMASK_UNDERFLOWIE | MB8795_TXMASK_COLLIE | MB8795_TXMASK_COLL16IE 473 | MB8795_TXMASK_PARERRIE); 474 #else 475 MB_WRITE_REG(sc, MB8795_TXMASK, 0); 476 #endif 477 MB_WRITE_REG(sc, MB8795_TXSTAT, MB8795_TXSTAT_CLEAR); 478 479 #if 0 480 MB_WRITE_REG(sc, MB8795_RXMASK, 481 MB8795_RXMASK_OKIE | MB8795_RXMASK_RESETIE | MB8795_RXMASK_SHORTIE | 482 MB8795_RXMASK_ALIGNERRIE | MB8795_RXMASK_CRCERRIE | MB8795_RXMASK_OVERFLOWIE); 483 #else 484 MB_WRITE_REG(sc, MB8795_RXMASK, 485 MB8795_RXMASK_OKIE | MB8795_RXMASK_RESETIE | MB8795_RXMASK_SHORTIE); 486 #endif 487 488 MB_WRITE_REG(sc, MB8795_RXSTAT, MB8795_RXSTAT_CLEAR); 489 490 for(i=0;i<sizeof(sc->sc_enaddr);i++) { 491 MB_WRITE_REG(sc, MB8795_ENADDR+i, sc->sc_enaddr[i]); 492 } 493 494 DPRINTF(("%s: initializing ethernet %02x:%02x:%02x:%02x:%02x:%02x, size=%d\n", 495 sc->sc_dev.dv_xname, 496 sc->sc_enaddr[0],sc->sc_enaddr[1],sc->sc_enaddr[2], 497 sc->sc_enaddr[3],sc->sc_enaddr[4],sc->sc_enaddr[5], 498 sizeof(sc->sc_enaddr))); 499 500 MB_WRITE_REG(sc, MB8795_RESET, 0); 501 502 splx(s); 503 } 504 505 void 506 mb8795_watchdog(struct ifnet *ifp) 507 { 508 struct mb8795_softc *sc = ifp->if_softc; 509 510 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 511 ++ifp->if_oerrors; 512 513 DPRINTF(("%s: %lld input errors, %lld input packets\n", 514 sc->sc_dev.dv_xname, ifp->if_ierrors, ifp->if_ipackets)); 515 516 ifp->if_flags &= ~IFF_RUNNING; 517 mb8795_init(sc); 518 } 519 520 /* 521 * Initialization of interface; set up initialization block 522 * and transmit/receive descriptor rings. 523 */ 524 void 525 mb8795_init(struct mb8795_softc *sc) 526 { 527 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 528 int s; 529 530 DPRINTF (("%s: mb8795_init()\n",sc->sc_dev.dv_xname)); 531 532 if (ifp->if_flags & IFF_UP) { 533 int rxmode; 534 535 s = spldma(); 536 if ((ifp->if_flags & IFF_RUNNING) == 0) 537 mb8795_reset(sc); 538 539 if (ifp->if_flags & IFF_PROMISC) 540 rxmode = MB8795_RXMODE_PROMISCUOUS; 541 else 542 rxmode = MB8795_RXMODE_NORMAL; 543 /* XXX add support for multicast */ 544 if (turbo) 545 rxmode |= MB8795_RXMODE_TEST; 546 547 /* switching mode probably borken now with turbo */ 548 MB_WRITE_REG(sc, MB8795_TXMODE, 549 turbo ? MB8795_TXMODE_TURBO1 : MB8795_TXMODE_LB_DISABLE); 550 MB_WRITE_REG(sc, MB8795_RXMODE, rxmode); 551 552 if ((ifp->if_flags & IFF_RUNNING) == 0) { 553 MBDMA_RX_SETUP(sc); 554 MBDMA_TX_SETUP(sc); 555 556 ifp->if_flags |= IFF_RUNNING; 557 ifp->if_flags &= ~IFF_OACTIVE; 558 ifp->if_timer = 0; 559 560 MBDMA_RX_GO(sc); 561 } 562 splx(s); 563 #if 0 564 s = spldma(); 565 if (! IF_IS_EMPTY(&sc->sc_tx_snd)) { 566 mb8795_start_dma(ifp); 567 } 568 splx(s); 569 #endif 570 } else { 571 mb8795_reset(sc); 572 } 573 } 574 575 void 576 mb8795_shutdown(void *arg) 577 { 578 struct mb8795_softc *sc = (struct mb8795_softc *)arg; 579 580 DPRINTF(("%s: mb8795_shutdown()\n",sc->sc_dev.dv_xname)); 581 582 mb8795_reset(sc); 583 } 584 585 /****************************************************************/ 586 int 587 mb8795_ioctl(struct ifnet *ifp, u_long cmd, void *data) 588 { 589 struct mb8795_softc *sc = ifp->if_softc; 590 struct ifaddr *ifa = (struct ifaddr *)data; 591 struct ifreq *ifr = (struct ifreq *)data; 592 int s, error = 0; 593 594 s = splnet(); 595 596 DPRINTF(("%s: mb8795_ioctl()\n",sc->sc_dev.dv_xname)); 597 598 switch (cmd) { 599 600 case SIOCINITIFADDR: 601 DPRINTF(("%s: mb8795_ioctl() SIOCINITIFADDR\n",sc->sc_dev.dv_xname)); 602 ifp->if_flags |= IFF_UP; 603 604 mb8795_init(sc); 605 switch (ifa->ifa_addr->sa_family) { 606 #ifdef INET 607 case AF_INET: 608 arp_ifinit(ifp, ifa); 609 break; 610 #endif 611 default: 612 break; 613 } 614 break; 615 616 617 case SIOCSIFFLAGS: 618 DPRINTF(("%s: mb8795_ioctl() SIOCSIFFLAGS\n",sc->sc_dev.dv_xname)); 619 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 620 break; 621 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 622 case IFF_RUNNING: 623 /* 624 * If interface is marked down and it is running, then 625 * stop it. 626 */ 627 /* ifp->if_flags &= ~IFF_RUNNING; */ 628 mb8795_reset(sc); 629 break; 630 case IFF_UP: 631 /* 632 * If interface is marked up and it is stopped, then 633 * start it. 634 */ 635 mb8795_init(sc); 636 break; 637 default: 638 /* 639 * Reset the interface to pick up changes in any other 640 * flags that affect hardware registers. 641 */ 642 mb8795_init(sc); 643 break; 644 } 645 #ifdef MB8795_DEBUG 646 if (ifp->if_flags & IFF_DEBUG) 647 sc->sc_debug = 1; 648 else 649 sc->sc_debug = 0; 650 #endif 651 break; 652 653 case SIOCADDMULTI: 654 case SIOCDELMULTI: 655 DPRINTF(("%s: mb8795_ioctl() SIOCADDMULTI\n", 656 sc->sc_dev.dv_xname)); 657 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 658 /* 659 * Multicast list has changed; set the hardware filter 660 * accordingly. 661 */ 662 if (ifp->if_flags & IFF_RUNNING) 663 mb8795_init(sc); 664 error = 0; 665 } 666 break; 667 668 case SIOCGIFMEDIA: 669 case SIOCSIFMEDIA: 670 DPRINTF(("%s: mb8795_ioctl() SIOCSIFMEDIA\n",sc->sc_dev.dv_xname)); 671 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd); 672 break; 673 674 default: 675 error = ether_ioctl(ifp, cmd, data); 676 break; 677 } 678 679 splx(s); 680 681 #if 0 682 DPRINTF(("DEBUG: mb8795_ioctl(0x%lx) returning %d\n", 683 cmd,error)); 684 #endif 685 686 return (error); 687 } 688 689 /* 690 * Setup output on interface. 691 * Get another datagram to send off of the interface queue, and map it to the 692 * interface before starting the output. 693 * Called only at splnet or interrupt level. 694 */ 695 void 696 mb8795_start(struct ifnet *ifp) 697 { 698 struct mb8795_softc *sc = ifp->if_softc; 699 struct mbuf *m; 700 int s; 701 702 DPRINTF(("%s: mb8795_start()\n",sc->sc_dev.dv_xname)); 703 704 #ifdef DIAGNOSTIC 705 IFQ_POLL(&ifp->if_snd, m); 706 if (m == 0) { 707 panic("%s: No packet to start", 708 sc->sc_dev.dv_xname); 709 } 710 #endif 711 712 while (1) { 713 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 714 return; 715 716 #if 0 717 return; /* @@@ Turn off xmit for debugging */ 718 #endif 719 720 ifp->if_flags |= IFF_OACTIVE; 721 722 IFQ_DEQUEUE(&ifp->if_snd, m); 723 if (m == 0) { 724 ifp->if_flags &= ~IFF_OACTIVE; 725 return; 726 } 727 728 #if NBPFILTER > 0 729 /* 730 * Pass packet to bpf if there is a listener. 731 */ 732 if (ifp->if_bpf) 733 bpf_mtap(ifp->if_bpf, m); 734 #endif 735 736 s = spldma(); 737 IF_ENQUEUE(&sc->sc_tx_snd, m); 738 if (!MBDMA_TX_ISACTIVE(sc)) 739 mb8795_start_dma(sc); 740 splx(s); 741 742 ifp->if_flags &= ~IFF_OACTIVE; 743 } 744 745 } 746 747 void 748 mb8795_start_dma(struct mb8795_softc *sc) 749 { 750 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 751 struct mbuf *m; 752 u_char txmask; 753 754 DPRINTF(("%s: mb8795_start_dma()\n",sc->sc_dev.dv_xname)); 755 756 #if (defined(DIAGNOSTIC)) 757 { 758 u_char txstat; 759 txstat = MB_READ_REG(sc, MB8795_TXSTAT); 760 if (!turbo && !(txstat & MB8795_TXSTAT_READY)) { 761 /* @@@ I used to panic here, but then it paniced once. 762 * Let's see if I can just reset instead. [ dbj 980706.1900 ] 763 */ 764 printf("%s: transmitter not ready\n", 765 sc->sc_dev.dv_xname); 766 ifp->if_flags &= ~IFF_RUNNING; 767 mb8795_init(sc); 768 return; 769 } 770 } 771 #endif 772 773 #if 0 774 return; /* @@@ Turn off xmit for debugging */ 775 #endif 776 777 IF_DEQUEUE(&sc->sc_tx_snd, m); 778 if (m == 0) { 779 #ifdef DIAGNOSTIC 780 panic("%s: No packet to start_dma", 781 sc->sc_dev.dv_xname); 782 #endif 783 return; 784 } 785 786 MB_WRITE_REG(sc, MB8795_TXSTAT, MB8795_TXSTAT_CLEAR); 787 txmask = MB_READ_REG(sc, MB8795_TXMASK); 788 /* MB_WRITE_REG(sc, MB8795_TXMASK, txmask | MB8795_TXMASK_READYIE); */ 789 /* MB_WRITE_REG(sc, MB8795_TXMASK, txmask | MB8795_TXMASK_TXRXIE); */ 790 791 ifp->if_timer = 5; 792 793 if (MBDMA_TX_MBUF(sc, m)) 794 return; 795 796 MBDMA_TX_GO(sc); 797 if (turbo) 798 MB_WRITE_REG(sc, MB8795_TXMODE, MB8795_TXMODE_TURBO1 | MB8795_TXMODE_TURBOSTART); 799 800 ifp->if_opackets++; 801 } 802 803 /****************************************************************/ 804