xref: /netbsd-src/sys/arch/next68k/dev/if_xe.c (revision afab4e300d3a9fb07dd8c80daf53d0feb3345706)
1 /*	$NetBSD: if_xe.c,v 1.28 2023/02/03 23:02:56 tsutsui Exp $	*/
2 /*
3  * Copyright (c) 1998 Darrin B. Jewell
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __KERNEL_RCSID(0, "$NetBSD: if_xe.c,v 1.28 2023/02/03 23:02:56 tsutsui Exp $");
29 
30 #include "opt_inet.h"
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/mbuf.h>
35 #include <sys/syslog.h>
36 #include <sys/socket.h>
37 #include <sys/device.h>
38 #include <sys/kmem.h>
39 
40 #include <net/if.h>
41 #include <net/if_ether.h>
42 #include <net/if_media.h>
43 
44 #ifdef INET
45 #include <netinet/in.h>
46 #include <netinet/if_inarp.h>
47 #endif
48 
49 #include <machine/autoconf.h>
50 #include <machine/cpu.h>
51 #include <machine/intr.h>
52 #include <machine/bus.h>
53 
54 #include <next68k/next68k/isr.h>
55 
56 #include <next68k/dev/mb8795reg.h>
57 #include <next68k/dev/mb8795var.h>
58 
59 #include <next68k/dev/bmapreg.h>
60 #include <next68k/dev/intiovar.h>
61 #include <next68k/dev/nextdmareg.h>
62 #include <next68k/dev/nextdmavar.h>
63 
64 #include <next68k/dev/if_xevar.h>
65 #include <next68k/dev/if_xereg.h>
66 
67 #ifdef DEBUG
68 #define XE_DEBUG
69 #endif
70 
71 #ifdef XE_DEBUG
72 int xe_debug = 0;
73 #define DPRINTF(x) if (xe_debug) printf x;
74 #else
75 #define DPRINTF(x)
76 #endif
77 #define PRINTF(x) printf x;
78 
79 extern int turbo;
80 
81 int	xe_match(device_t, cfdata_t, void *);
82 void	xe_attach(device_t, device_t, void *);
83 int	xe_tint(void *);
84 int	xe_rint(void *);
85 
86 struct mbuf *xe_dma_rxmap_load(struct mb8795_softc *, bus_dmamap_t);
87 
88 bus_dmamap_t xe_dma_rx_continue(void *);
89 void	xe_dma_rx_completed(bus_dmamap_t, void *);
90 bus_dmamap_t xe_dma_tx_continue(void *);
91 void	xe_dma_tx_completed(bus_dmamap_t, void *);
92 void	xe_dma_rx_shutdown(void *);
93 void	xe_dma_tx_shutdown(void *);
94 
95 static void findchannel_defer(device_t);
96 
97 CFATTACH_DECL_NEW(xe, sizeof(struct xe_softc),
98     xe_match, xe_attach, NULL, NULL);
99 
100 static int xe_dma_medias[] = {
101 	IFM_ETHER | IFM_AUTO,
102 	IFM_ETHER | IFM_10_T,
103 	IFM_ETHER | IFM_10_2,
104 };
105 static int nxe_dma_medias = __arraycount(xe_dma_medias);
106 
107 static int attached = 0;
108 
109 /*
110  * Functions and the switch for the MI code.
111  */
112 u_char		xe_read_reg(struct mb8795_softc *, int);
113 void		xe_write_reg(struct mb8795_softc *, int, u_char);
114 void		xe_dma_reset(struct mb8795_softc *);
115 void		xe_dma_rx_setup(struct mb8795_softc *);
116 void		xe_dma_rx_go(struct mb8795_softc *);
117 struct mbuf *	xe_dma_rx_mbuf(struct mb8795_softc *);
118 void		xe_dma_tx_setup(struct mb8795_softc *);
119 void		xe_dma_tx_go(struct mb8795_softc *);
120 int		xe_dma_tx_mbuf(struct mb8795_softc *, struct mbuf *);
121 int		xe_dma_tx_isactive(struct mb8795_softc *);
122 
123 struct mb8795_glue xe_glue = {
124 	xe_read_reg,
125 	xe_write_reg,
126 	xe_dma_reset,
127 	xe_dma_rx_setup,
128 	xe_dma_rx_go,
129 	xe_dma_rx_mbuf,
130 	xe_dma_tx_setup,
131 	xe_dma_tx_go,
132 	xe_dma_tx_mbuf,
133 	xe_dma_tx_isactive,
134 };
135 
136 int
137 xe_match(device_t parent, cfdata_t match, void *aux)
138 {
139 	struct intio_attach_args *ia = (struct intio_attach_args *)aux;
140 
141 	if (attached)
142 		return 0;
143 
144 	ia->ia_addr = (void *)NEXT_P_ENET;
145 
146 	return 1;
147 }
148 
149 static void
150 findchannel_defer(device_t self)
151 {
152 	struct xe_softc *xsc = device_private(self);
153 	struct mb8795_softc *sc = &xsc->sc_mb8795;
154 	int i, error;
155 
156 	if (!xsc->sc_txdma) {
157 		xsc->sc_txdma = nextdma_findchannel ("enetx");
158 		if (xsc->sc_txdma == NULL)
159 			panic("%s: can't find enetx DMA channel",
160 			       device_xname(sc->sc_dev));
161 	}
162 	if (!xsc->sc_rxdma) {
163 		xsc->sc_rxdma = nextdma_findchannel ("enetr");
164 		if (xsc->sc_rxdma == NULL)
165 			panic ("%s: can't find enetr DMA channel",
166 			       device_xname(sc->sc_dev));
167 	}
168 	aprint_normal_dev(sc->sc_dev, "using DMA channels %s %s\n",
169 		device_xname(xsc->sc_txdma->sc_dev),
170 		device_xname(xsc->sc_rxdma->sc_dev));
171 
172 	nextdma_setconf (xsc->sc_rxdma, continue_cb, xe_dma_rx_continue);
173 	nextdma_setconf (xsc->sc_rxdma, completed_cb, xe_dma_rx_completed);
174 	nextdma_setconf (xsc->sc_rxdma, shutdown_cb, xe_dma_rx_shutdown);
175 	nextdma_setconf (xsc->sc_rxdma, cb_arg, sc);
176 
177 	nextdma_setconf (xsc->sc_txdma, continue_cb, xe_dma_tx_continue);
178 	nextdma_setconf (xsc->sc_txdma, completed_cb, xe_dma_tx_completed);
179 	nextdma_setconf (xsc->sc_txdma, shutdown_cb, xe_dma_tx_shutdown);
180 	nextdma_setconf (xsc->sc_txdma, cb_arg, sc);
181 
182 	/* Initialize the DMA maps */
183 	error = bus_dmamap_create(xsc->sc_txdma->sc_dmat, MCLBYTES,
184 	    (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW,
185 	    &xsc->sc_tx_dmamap);
186 	if (error) {
187 		aprint_error_dev(sc->sc_dev,
188 		    "can't create tx DMA map, error = %d", error);
189 	}
190 
191 	for(i = 0; i < MB8795_NRXBUFS; i++) {
192 		error = bus_dmamap_create(xsc->sc_rxdma->sc_dmat, MCLBYTES,
193 		    (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW,
194 		    &xsc->sc_rx_dmamap[i]);
195 		if (error) {
196 			panic("%s: can't create rx DMA map, error = %d",
197 			      device_xname(sc->sc_dev), error);
198 		}
199 		xsc->sc_rx_mb_head[i] = NULL;
200 	}
201 	xsc->sc_rx_loaded_idx = 0;
202 	xsc->sc_rx_completed_idx = 0;
203 	xsc->sc_rx_handled_idx = 0;
204 
205 	/*
206 	 * @@@ more next hacks
207 	 * the  2000 covers at least a 1500 mtu + headers
208 	 * + DMA_BEGINALIGNMENT+ DMA_ENDALIGNMENT
209 	 */
210 	xsc->sc_txbuf = kmem_alloc(2000, KM_SLEEP);
211 	xsc->sc_tx_mb_head = NULL;
212 	xsc->sc_tx_loaded = 0;
213 
214 	mb8795_config(sc, xe_dma_medias, nxe_dma_medias, xe_dma_medias[0]);
215 
216 	isrlink_autovec(xe_tint, sc, NEXT_I_IPL(NEXT_I_ENETX), 1, NULL);
217 	INTR_ENABLE(NEXT_I_ENETX);
218 	isrlink_autovec(xe_rint, sc, NEXT_I_IPL(NEXT_I_ENETR), 1, NULL);
219 	INTR_ENABLE(NEXT_I_ENETR);
220 }
221 
222 void
223 xe_attach(device_t parent, device_t self, void *aux)
224 {
225 	struct intio_attach_args *ia = (struct intio_attach_args *)aux;
226 	struct xe_softc *xsc = device_private(self);
227 	struct mb8795_softc *sc = &xsc->sc_mb8795;
228 
229 	sc->sc_dev = self;
230 	DPRINTF(("%s: xe_attach()\n", device_xname(self)));
231 
232 	{
233 		/* kludge from machdep.c:next68k_bootargs() */
234 		extern u_char rom_enetaddr[6];
235 		int i;
236 
237 		for (i = 0; i < 6; i++)
238 			sc->sc_enaddr[i] = rom_enetaddr[i];
239 	}
240 
241 	printf("\n%s: MAC address %02x:%02x:%02x:%02x:%02x:%02x\n",
242 	       device_xname(self),
243 	       sc->sc_enaddr[0],sc->sc_enaddr[1],sc->sc_enaddr[2],
244 	       sc->sc_enaddr[3],sc->sc_enaddr[4],sc->sc_enaddr[5]);
245 
246 	xsc->sc_bst = ia->ia_bst;
247 	if (bus_space_map(xsc->sc_bst, NEXT_P_ENET,
248 			  XE_DEVICE_SIZE, 0, &xsc->sc_bsh)) {
249 		panic("\n%s: can't map mb8795 registers",
250 		      device_xname(self));
251 	}
252 
253 	sc->sc_bmap_bst = ia->ia_bst;
254 	if (bus_space_map(sc->sc_bmap_bst, NEXT_P_BMAP,
255 	    BMAP_SIZE, 0, &sc->sc_bmap_bsh))
256 		panic("\n%s: can't map bmap registers", device_xname(self));
257 
258 	/* Set up glue for MI code. */
259 	sc->sc_glue = &xe_glue;
260 
261 	xsc->sc_txdma = nextdma_findchannel("enetx");
262 	xsc->sc_rxdma = nextdma_findchannel("enetr");
263 	if (xsc->sc_rxdma && xsc->sc_txdma)
264 		findchannel_defer(self);
265 	else
266 		config_defer(self, findchannel_defer);
267 
268 	attached = 1;
269 }
270 
271 int
272 xe_tint(void *arg)
273 {
274 	if (!INTR_OCCURRED(NEXT_I_ENETX))
275 		return 0;
276 	mb8795_tint((struct mb8795_softc *)arg);
277 	return 1;
278 }
279 
280 int
281 xe_rint(void *arg)
282 {
283 	if (!INTR_OCCURRED(NEXT_I_ENETR))
284 		return 0;
285 	mb8795_rint((struct mb8795_softc *)arg);
286 	return 1;
287 }
288 
289 /*
290  * Glue functions.
291  */
292 
293 u_char
294 xe_read_reg(struct mb8795_softc *sc, int reg)
295 {
296 	struct xe_softc *xsc = (struct xe_softc *)sc;
297 
298 	return bus_space_read_1(xsc->sc_bst, xsc->sc_bsh, reg);
299 }
300 
301 void
302 xe_write_reg(struct mb8795_softc *sc, int reg, u_char val)
303 {
304 	struct xe_softc *xsc = (struct xe_softc *)sc;
305 
306 	bus_space_write_1(xsc->sc_bst, xsc->sc_bsh, reg, val);
307 }
308 
309 void
310 xe_dma_reset(struct mb8795_softc *sc)
311 {
312 	struct xe_softc *xsc = (struct xe_softc *)sc;
313 	int i;
314 
315 	DPRINTF(("xe DMA reset\n"));
316 
317 	nextdma_reset(xsc->sc_rxdma);
318 	nextdma_reset(xsc->sc_txdma);
319 
320 	if (xsc->sc_tx_loaded) {
321 		bus_dmamap_sync(xsc->sc_txdma->sc_dmat, xsc->sc_tx_dmamap,
322 		    0, xsc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_POSTWRITE);
323 		bus_dmamap_unload(xsc->sc_txdma->sc_dmat, xsc->sc_tx_dmamap);
324 		xsc->sc_tx_loaded = 0;
325 	}
326 	if (xsc->sc_tx_mb_head) {
327 		m_freem(xsc->sc_tx_mb_head);
328 		xsc->sc_tx_mb_head = NULL;
329 	}
330 
331 	for(i = 0; i < MB8795_NRXBUFS; i++) {
332 		if (xsc->sc_rx_mb_head[i]) {
333 			bus_dmamap_unload(xsc->sc_rxdma->sc_dmat,
334 			    xsc->sc_rx_dmamap[i]);
335 			m_freem(xsc->sc_rx_mb_head[i]);
336 			xsc->sc_rx_mb_head[i] = NULL;
337 		}
338 	}
339 }
340 
341 void
342 xe_dma_rx_setup(struct mb8795_softc *sc)
343 {
344 	struct xe_softc *xsc = (struct xe_softc *)sc;
345 	int i;
346 
347 	DPRINTF(("xe DMA rx setup\n"));
348 
349 	for(i = 0; i < MB8795_NRXBUFS; i++)
350 		xsc->sc_rx_mb_head[i] =
351 			xe_dma_rxmap_load(sc, xsc->sc_rx_dmamap[i]);
352 
353 	xsc->sc_rx_loaded_idx = 0;
354 	xsc->sc_rx_completed_idx = 0;
355 	xsc->sc_rx_handled_idx = 0;
356 
357 	nextdma_init(xsc->sc_rxdma);
358 }
359 
360 void
361 xe_dma_rx_go(struct mb8795_softc *sc)
362 {
363 	struct xe_softc *xsc = (struct xe_softc *)sc;
364 
365 	DPRINTF(("xe DMA rx go\n"));
366 
367 	nextdma_start(xsc->sc_rxdma, DMACSR_SETREAD);
368 }
369 
370 struct mbuf *
371 xe_dma_rx_mbuf(struct mb8795_softc *sc)
372 {
373 	struct xe_softc *xsc = (struct xe_softc *)sc;
374 	bus_dmamap_t map;
375 	struct mbuf *m;
376 
377 	m = NULL;
378 	if (xsc->sc_rx_handled_idx != xsc->sc_rx_completed_idx) {
379 		xsc->sc_rx_handled_idx++;
380 		xsc->sc_rx_handled_idx %= MB8795_NRXBUFS;
381 
382 		map = xsc->sc_rx_dmamap[xsc->sc_rx_handled_idx];
383 		m = xsc->sc_rx_mb_head[xsc->sc_rx_handled_idx];
384 
385 		m->m_len = map->dm_xfer_len;
386 
387 		bus_dmamap_sync(xsc->sc_rxdma->sc_dmat, map,
388 				0, map->dm_mapsize, BUS_DMASYNC_POSTREAD);
389 
390 		bus_dmamap_unload(xsc->sc_rxdma->sc_dmat, map);
391 
392 		/* Install a fresh mbuf for next packet */
393 
394 		xsc->sc_rx_mb_head[xsc->sc_rx_handled_idx] =
395 			xe_dma_rxmap_load(sc,map);
396 
397 		/* Punt runt packets
398 		 * DMA restarts create 0 length packets for example
399 		 */
400 		if (m->m_len < ETHER_MIN_LEN) {
401 			m_freem(m);
402 			m = NULL;
403 		}
404 	}
405 	return m;
406 }
407 
408 void
409 xe_dma_tx_setup(struct mb8795_softc *sc)
410 {
411 	struct xe_softc *xsc = (struct xe_softc *)sc;
412 
413 	DPRINTF(("xe DMA tx setup\n"));
414 
415 	nextdma_init(xsc->sc_txdma);
416 }
417 
418 void
419 xe_dma_tx_go(struct mb8795_softc *sc)
420 {
421 	struct xe_softc *xsc = (struct xe_softc *)sc;
422 
423 	DPRINTF(("xe DMA tx go\n"));
424 
425 	nextdma_start(xsc->sc_txdma, DMACSR_SETWRITE);
426 }
427 
428 int
429 xe_dma_tx_mbuf(struct mb8795_softc *sc, struct mbuf *m)
430 {
431 	struct xe_softc *xsc = (struct xe_softc *)sc;
432 	int error;
433 
434 	xsc->sc_tx_mb_head = m;
435 
436 /* The following is a next specific hack that should
437  * probably be moved out of MI code.
438  * This macro assumes it can move forward as needed
439  * in the buffer.  Perhaps it should zero the extra buffer.
440  */
441 #define REALIGN_DMABUF(s,l) \
442 	{ (s) = ((u_char *)(((unsigned)(s)+DMA_BEGINALIGNMENT-1) \
443 			&~(DMA_BEGINALIGNMENT-1))); \
444     (l) = ((u_char *)(((unsigned)((s)+(l))+DMA_ENDALIGNMENT-1) \
445 				&~(DMA_ENDALIGNMENT-1)))-(s);}
446 
447 #if 0
448 	error = bus_dmamap_load_mbuf(xsc->sc_txdma->sc_dmat,
449 	    xsc->sc_tx_dmamap, xsc->sc_tx_mb_head, BUS_DMA_NOWAIT);
450 #else
451 	{
452 		u_char *buf = xsc->sc_txbuf;
453 		int buflen = 0;
454 
455 		buflen = m->m_pkthdr.len;
456 
457 		{
458 			u_char *p = buf;
459 			for (m=xsc->sc_tx_mb_head; m; m = m->m_next) {
460 				if (m->m_len == 0) continue;
461 				memcpy(p, mtod(m, u_char *), m->m_len);
462 				p += m->m_len;
463 			}
464 			/* Fix runt packets */
465 			if (buflen < ETHER_MIN_LEN - ETHER_CRC_LEN) {
466 				memset(p, 0,
467 				    ETHER_MIN_LEN - ETHER_CRC_LEN - buflen);
468 				buflen = ETHER_MIN_LEN - ETHER_CRC_LEN;
469 			}
470 		}
471 
472 		error = bus_dmamap_load(xsc->sc_txdma->sc_dmat,
473 		    xsc->sc_tx_dmamap, buf, buflen, NULL, BUS_DMA_NOWAIT);
474 	}
475 #endif
476 	if (error) {
477 		aprint_error_dev(sc->sc_dev,
478 		    "can't load mbuf chain, error = %d\n", error);
479 		m_freem(xsc->sc_tx_mb_head);
480 		xsc->sc_tx_mb_head = NULL;
481 		return error;
482 	}
483 
484 #ifdef DIAGNOSTIC
485 	if (xsc->sc_tx_loaded != 0) {
486 		panic("%s: xsc->sc_tx_loaded is %d", device_xname(sc->sc_dev),
487 		      xsc->sc_tx_loaded);
488 	}
489 #endif
490 
491 	bus_dmamap_sync(xsc->sc_txdma->sc_dmat, xsc->sc_tx_dmamap, 0,
492 			xsc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE);
493 
494 	return 0;
495 }
496 
497 int
498 xe_dma_tx_isactive(struct mb8795_softc *sc)
499 {
500 	struct xe_softc *xsc = (struct xe_softc *)sc;
501 
502 	return (xsc->sc_tx_loaded != 0);
503 }
504 
505 /****************************************************************/
506 
507 void
508 xe_dma_tx_completed(bus_dmamap_t map, void *arg)
509 {
510 #if defined (XE_DEBUG) || defined (DIAGNOSTIC)
511 	struct mb8795_softc *sc = arg;
512 #endif
513 #ifdef DIAGNOSTIC
514 	struct xe_softc *xsc = (struct xe_softc *)sc;
515 #endif
516 
517 	DPRINTF(("%s: xe_dma_tx_completed()\n", device_xname(sc->sc_dev)));
518 
519 #ifdef DIAGNOSTIC
520 	if (!xsc->sc_tx_loaded)
521 		panic("%s: tx completed never loaded",
522 		    device_xname(sc->sc_dev));
523 
524 	if (map != xsc->sc_tx_dmamap)
525 		panic("%s: unexpected tx completed map",
526 		    device_xname(sc->sc_dev));
527 
528 #endif
529 }
530 
531 void
532 xe_dma_tx_shutdown(void *arg)
533 {
534 	struct mb8795_softc *sc = arg;
535 	struct xe_softc *xsc = (struct xe_softc *)sc;
536 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
537 
538 	DPRINTF(("%s: xe_dma_tx_shutdown()\n", device_xname(sc->sc_dev)));
539 
540 #ifdef DIAGNOSTIC
541 	if (!xsc->sc_tx_loaded)
542 		panic("%s: tx shutdown never loaded",
543 		    device_xname(sc->sc_dev));
544 #endif
545 
546 	if (turbo)
547 		MB_WRITE_REG(sc, MB8795_TXMODE, MB8795_TXMODE_TURBO1);
548 	if (xsc->sc_tx_loaded) {
549 		bus_dmamap_sync(xsc->sc_txdma->sc_dmat, xsc->sc_tx_dmamap,
550 		    0, xsc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_POSTWRITE);
551 		bus_dmamap_unload(xsc->sc_txdma->sc_dmat, xsc->sc_tx_dmamap);
552 		m_freem(xsc->sc_tx_mb_head);
553 		xsc->sc_tx_mb_head = NULL;
554 
555 		xsc->sc_tx_loaded--;
556 	}
557 
558 #ifdef DIAGNOSTIC
559 	if (xsc->sc_tx_loaded != 0)
560 		panic("%s: sc->sc_tx_loaded is %d", device_xname(sc->sc_dev),
561 		      xsc->sc_tx_loaded);
562 #endif
563 
564 	ifp->if_timer = 0;
565 
566 #if 1
567 	if ((ifp->if_flags & IFF_RUNNING) && !IF_IS_EMPTY(&sc->sc_tx_snd)) {
568 		void mb8795_start_dma(struct mb8795_softc *); /* XXXX */
569 		mb8795_start_dma(sc);
570 	}
571 #endif
572 
573 #if 0
574 	/* Enable ready interrupt */
575 	MB_WRITE_REG(sc, MB8795_TXMASK,
576 		     MB_READ_REG(sc, MB8795_TXMASK)
577 		     | MB8795_TXMASK_TXRXIE/* READYIE */);
578 #endif
579 }
580 
581 
582 void
583 xe_dma_rx_completed(bus_dmamap_t map, void *arg)
584 {
585 	struct mb8795_softc *sc = arg;
586 	struct xe_softc *xsc = (struct xe_softc *)sc;
587 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
588 
589 	if (ifp->if_flags & IFF_RUNNING) {
590 		xsc->sc_rx_completed_idx++;
591 		xsc->sc_rx_completed_idx %= MB8795_NRXBUFS;
592 
593 		DPRINTF(("%s: xe_dma_rx_completed(), "
594 			"sc->sc_rx_completed_idx = %d\n",
595 			 device_xname(sc->sc_dev), xsc->sc_rx_completed_idx));
596 
597 #if (defined(DIAGNOSTIC))
598 		if (map != xsc->sc_rx_dmamap[xsc->sc_rx_completed_idx])
599 			panic("%s: Unexpected rx dmamap completed",
600 			      device_xname(sc->sc_dev));
601 #endif
602 	}
603 #ifdef DIAGNOSTIC
604 	else
605 		DPRINTF(("%s: Unexpected rx dmamap completed while if not "
606 			"running\n", device_xname(sc->sc_dev)));
607 #endif
608 }
609 
610 void
611 xe_dma_rx_shutdown(void *arg)
612 {
613 	struct mb8795_softc *sc = arg;
614 	struct xe_softc *xsc = (struct xe_softc *)sc;
615 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
616 
617 	if (ifp->if_flags & IFF_RUNNING) {
618 		DPRINTF(("%s: xe_dma_rx_shutdown(), restarting.\n",
619 			 device_xname(sc->sc_dev)));
620 
621 		nextdma_start(xsc->sc_rxdma, DMACSR_SETREAD);
622 		if (turbo)
623 			MB_WRITE_REG(sc, MB8795_RXMODE,
624 			    MB8795_RXMODE_TEST | MB8795_RXMODE_MULTICAST);
625 	}
626 #ifdef DIAGNOSTIC
627 	else
628 		DPRINTF(("%s: Unexpected rx DMA shutdown while if not "
629 			"running\n", device_xname(sc->sc_dev)));
630 #endif
631 }
632 
633 /*
634  * load a dmamap with a freshly allocated mbuf
635  */
636 struct mbuf *
637 xe_dma_rxmap_load(struct mb8795_softc *sc, bus_dmamap_t map)
638 {
639 	struct xe_softc *xsc = (struct xe_softc *)sc;
640 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
641 	struct mbuf *m;
642 	int error;
643 
644 	MGETHDR(m, M_DONTWAIT, MT_DATA);
645 	if (m) {
646 		MCLGET(m, M_DONTWAIT);
647 		if ((m->m_flags & M_EXT) == 0) {
648 			m_freem(m);
649 			m = NULL;
650 		} else
651 			m->m_len = MCLBYTES;
652 	}
653 	if (!m) {
654 		/*
655 		 * @@@ Handle this gracefully by reusing a scratch buffer
656 		 * or something.
657 		 */
658 		panic("Unable to get memory for incoming ethernet");
659 	}
660 
661 	/*
662 	 * Align buffer, @@@ next specific.
663 	 * perhaps should be using M_ALIGN here instead?
664 	 * First we give us a little room to align with.
665 	 */
666 	{
667 		u_char *buf = m->m_data;
668 		int buflen = m->m_len;
669 		buflen -= DMA_ENDALIGNMENT+DMA_BEGINALIGNMENT;
670 		REALIGN_DMABUF(buf, buflen);
671 		m->m_data = buf;
672 		m->m_len = buflen;
673 	}
674 
675 	m_set_rcvif(m, ifp);
676 	m->m_pkthdr.len = m->m_len;
677 
678 	error = bus_dmamap_load_mbuf(xsc->sc_rxdma->sc_dmat,
679 			map, m, BUS_DMA_NOWAIT);
680 
681 	bus_dmamap_sync(xsc->sc_rxdma->sc_dmat, map, 0,
682 			map->dm_mapsize, BUS_DMASYNC_PREREAD);
683 
684 	if (error) {
685 		DPRINTF(("DEBUG: m->m_data = %p, m->m_len = %d\n",
686 				m->m_data, m->m_len));
687 		DPRINTF(("DEBUG: MCLBYTES = %d, map->_dm_size = %ld\n",
688 				MCLBYTES, map->_dm_size));
689 
690 		panic("%s: can't load rx mbuf chain, error = %d",
691 				device_xname(sc->sc_dev), error);
692 		m_freem(m);
693 		m = NULL;
694 	}
695 
696 	return m;
697 }
698 
699 bus_dmamap_t
700 xe_dma_rx_continue(void *arg)
701 {
702 	struct mb8795_softc *sc = arg;
703 	struct xe_softc *xsc = (struct xe_softc *)sc;
704 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
705 	bus_dmamap_t map = NULL;
706 
707 	if (ifp->if_flags & IFF_RUNNING) {
708 		if (((xsc->sc_rx_loaded_idx+1)%MB8795_NRXBUFS)
709 		    == xsc->sc_rx_handled_idx) {
710 			/* Make space for one packet by dropping one */
711 			struct mbuf *m;
712 			m = xe_dma_rx_mbuf (sc);
713 			if (m)
714 				m_freem(m);
715 #if (defined(DIAGNOSTIC))
716 			DPRINTF(("%s: out of receive DMA buffers\n",
717 				device_xname(sc->sc_dev)));
718 #endif
719 		}
720 		xsc->sc_rx_loaded_idx++;
721 		xsc->sc_rx_loaded_idx %= MB8795_NRXBUFS;
722 		map = xsc->sc_rx_dmamap[xsc->sc_rx_loaded_idx];
723 
724 		DPRINTF(("%s: xe_dma_rx_continue() xsc->sc_rx_loaded_idx "
725 			"= %d\n", device_xname(sc->sc_dev),
726 			xsc->sc_rx_loaded_idx));
727 	}
728 #ifdef DIAGNOSTIC
729 	else
730 		panic("%s: Unexpected rx DMA continue while if not running",
731 		      device_xname(sc->sc_dev));
732 #endif
733 
734 	return map;
735 }
736 
737 bus_dmamap_t
738 xe_dma_tx_continue(void *arg)
739 {
740 	struct mb8795_softc *sc = arg;
741 	struct xe_softc *xsc = (struct xe_softc *)sc;
742 	bus_dmamap_t map;
743 
744 	DPRINTF(("%s: xe_dma_tx_continue()\n", device_xname(sc->sc_dev)));
745 
746 	if (xsc->sc_tx_loaded)
747 		map = NULL;
748 	else {
749 		map = xsc->sc_tx_dmamap;
750 		xsc->sc_tx_loaded++;
751 	}
752 
753 #ifdef DIAGNOSTIC
754 	if (xsc->sc_tx_loaded != 1)
755 		panic("%s: sc->sc_tx_loaded is %d", device_xname(sc->sc_dev),
756 				xsc->sc_tx_loaded);
757 #endif
758 
759 	return map;
760 }
761