xref: /netbsd-src/sys/arch/next68k/dev/if_xe.c (revision 627f7eb200a4419d89b531d55fccd2ee3ffdcde0)
1 /*	$NetBSD: if_xe.c,v 1.27 2020/11/21 17:49:20 thorpej Exp $	*/
2 /*
3  * Copyright (c) 1998 Darrin B. Jewell
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __KERNEL_RCSID(0, "$NetBSD: if_xe.c,v 1.27 2020/11/21 17:49:20 thorpej Exp $");
29 
30 #include "opt_inet.h"
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/mbuf.h>
35 #include <sys/syslog.h>
36 #include <sys/socket.h>
37 #include <sys/device.h>
38 #include <sys/kmem.h>
39 
40 #include <net/if.h>
41 #include <net/if_ether.h>
42 #include <net/if_media.h>
43 
44 #ifdef INET
45 #include <netinet/in.h>
46 #include <netinet/if_inarp.h>
47 #endif
48 
49 #include <machine/autoconf.h>
50 #include <machine/cpu.h>
51 #include <machine/intr.h>
52 #include <machine/bus.h>
53 
54 #include <next68k/next68k/isr.h>
55 
56 #include <next68k/dev/mb8795reg.h>
57 #include <next68k/dev/mb8795var.h>
58 
59 #include <next68k/dev/bmapreg.h>
60 #include <next68k/dev/intiovar.h>
61 #include <next68k/dev/nextdmareg.h>
62 #include <next68k/dev/nextdmavar.h>
63 
64 #include <next68k/dev/if_xevar.h>
65 #include <next68k/dev/if_xereg.h>
66 
67 #ifdef DEBUG
68 #define XE_DEBUG
69 #endif
70 
71 #ifdef XE_DEBUG
72 int xe_debug = 0;
73 #define DPRINTF(x) if (xe_debug) printf x;
74 #else
75 #define DPRINTF(x)
76 #endif
77 #define PRINTF(x) printf x;
78 
79 extern int turbo;
80 
81 int	xe_match(device_t, cfdata_t, void *);
82 void	xe_attach(device_t, device_t, void *);
83 int	xe_tint(void *);
84 int	xe_rint(void *);
85 
86 struct mbuf *xe_dma_rxmap_load(struct mb8795_softc *, bus_dmamap_t);
87 
88 bus_dmamap_t xe_dma_rx_continue(void *);
89 void	xe_dma_rx_completed(bus_dmamap_t, void *);
90 bus_dmamap_t xe_dma_tx_continue(void *);
91 void	xe_dma_tx_completed(bus_dmamap_t, void *);
92 void	xe_dma_rx_shutdown(void *);
93 void	xe_dma_tx_shutdown(void *);
94 
95 static void findchannel_defer(device_t);
96 
97 CFATTACH_DECL_NEW(xe, sizeof(struct xe_softc),
98     xe_match, xe_attach, NULL, NULL);
99 
100 static int xe_dma_medias[] = {
101 	IFM_ETHER | IFM_AUTO,
102 	IFM_ETHER | IFM_10_T,
103 	IFM_ETHER | IFM_10_2,
104 };
105 static int nxe_dma_medias = __arraycount(xe_dma_medias);
106 
107 static int attached = 0;
108 
109 /*
110  * Functions and the switch for the MI code.
111  */
112 u_char		xe_read_reg(struct mb8795_softc *, int);
113 void		xe_write_reg(struct mb8795_softc *, int, u_char);
114 void		xe_dma_reset(struct mb8795_softc *);
115 void		xe_dma_rx_setup(struct mb8795_softc *);
116 void		xe_dma_rx_go(struct mb8795_softc *);
117 struct mbuf *	xe_dma_rx_mbuf(struct mb8795_softc *);
118 void		xe_dma_tx_setup(struct mb8795_softc *);
119 void		xe_dma_tx_go(struct mb8795_softc *);
120 int		xe_dma_tx_mbuf(struct mb8795_softc *, struct mbuf *);
121 int		xe_dma_tx_isactive(struct mb8795_softc *);
122 
123 struct mb8795_glue xe_glue = {
124 	xe_read_reg,
125 	xe_write_reg,
126 	xe_dma_reset,
127 	xe_dma_rx_setup,
128 	xe_dma_rx_go,
129 	xe_dma_rx_mbuf,
130 	xe_dma_tx_setup,
131 	xe_dma_tx_go,
132 	xe_dma_tx_mbuf,
133 	xe_dma_tx_isactive,
134 };
135 
136 int
137 xe_match(device_t parent, cfdata_t match, void *aux)
138 {
139 	struct intio_attach_args *ia = (struct intio_attach_args *)aux;
140 
141 	if (attached)
142 		return 0;
143 
144 	ia->ia_addr = (void *)NEXT_P_ENET;
145 
146 	return 1;
147 }
148 
149 static void
150 findchannel_defer(device_t self)
151 {
152 	struct xe_softc *xsc = device_private(self);
153 	struct mb8795_softc *sc = &xsc->sc_mb8795;
154 	int i, error;
155 
156 	if (!xsc->sc_txdma) {
157 		xsc->sc_txdma = nextdma_findchannel ("enetx");
158 		if (xsc->sc_txdma == NULL)
159 			panic("%s: can't find enetx DMA channel",
160 			       device_xname(sc->sc_dev));
161 	}
162 	if (!xsc->sc_rxdma) {
163 		xsc->sc_rxdma = nextdma_findchannel ("enetr");
164 		if (xsc->sc_rxdma == NULL)
165 			panic ("%s: can't find enetr DMA channel",
166 			       device_xname(sc->sc_dev));
167 	}
168 	aprint_normal_dev(sc->sc_dev, "using DMA channels %s %s\n",
169 		device_xname(xsc->sc_txdma->sc_dev),
170 		device_xname(xsc->sc_rxdma->sc_dev));
171 
172 	nextdma_setconf (xsc->sc_rxdma, continue_cb, xe_dma_rx_continue);
173 	nextdma_setconf (xsc->sc_rxdma, completed_cb, xe_dma_rx_completed);
174 	nextdma_setconf (xsc->sc_rxdma, shutdown_cb, xe_dma_rx_shutdown);
175 	nextdma_setconf (xsc->sc_rxdma, cb_arg, sc);
176 
177 	nextdma_setconf (xsc->sc_txdma, continue_cb, xe_dma_tx_continue);
178 	nextdma_setconf (xsc->sc_txdma, completed_cb, xe_dma_tx_completed);
179 	nextdma_setconf (xsc->sc_txdma, shutdown_cb, xe_dma_tx_shutdown);
180 	nextdma_setconf (xsc->sc_txdma, cb_arg, sc);
181 
182 	/* Initialize the DMA maps */
183 	error = bus_dmamap_create(xsc->sc_txdma->sc_dmat, MCLBYTES,
184 	    (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW,
185 	    &xsc->sc_tx_dmamap);
186 	if (error) {
187 		aprint_error_dev(sc->sc_dev,
188 		    "can't create tx DMA map, error = %d", error);
189 	}
190 
191 	for(i = 0; i < MB8795_NRXBUFS; i++) {
192 		error = bus_dmamap_create(xsc->sc_rxdma->sc_dmat, MCLBYTES,
193 		    (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW,
194 		    &xsc->sc_rx_dmamap[i]);
195 		if (error) {
196 			panic("%s: can't create rx DMA map, error = %d",
197 			      device_xname(sc->sc_dev), error);
198 		}
199 		xsc->sc_rx_mb_head[i] = NULL;
200 	}
201 	xsc->sc_rx_loaded_idx = 0;
202 	xsc->sc_rx_completed_idx = 0;
203 	xsc->sc_rx_handled_idx = 0;
204 
205 	/* @@@ more next hacks
206 	 * the  2000 covers at least a 1500 mtu + headers
207 	 * + DMA_BEGINALIGNMENT+ DMA_ENDALIGNMENT
208 	 */
209 	xsc->sc_txbuf = kmem_alloc(2000, KM_SLEEP);
210 	xsc->sc_tx_mb_head = NULL;
211 	xsc->sc_tx_loaded = 0;
212 
213 	mb8795_config(sc, xe_dma_medias, nxe_dma_medias, xe_dma_medias[0]);
214 
215 	isrlink_autovec(xe_tint, sc, NEXT_I_IPL(NEXT_I_ENETX), 1, NULL);
216 	INTR_ENABLE(NEXT_I_ENETX);
217 	isrlink_autovec(xe_rint, sc, NEXT_I_IPL(NEXT_I_ENETR), 1, NULL);
218 	INTR_ENABLE(NEXT_I_ENETR);
219 }
220 
221 void
222 xe_attach(device_t parent, device_t self, void *aux)
223 {
224 	struct intio_attach_args *ia = (struct intio_attach_args *)aux;
225 	struct xe_softc *xsc = device_private(self);
226 	struct mb8795_softc *sc = &xsc->sc_mb8795;
227 
228 	sc->sc_dev = self;
229 	DPRINTF(("%s: xe_attach()\n", device_xname(self)));
230 
231 	{
232 		/* kludge from machdep.c:next68k_bootargs() */
233 		extern u_char rom_enetaddr[6];
234 		int i;
235 
236 		for (i = 0; i < 6; i++)
237 			sc->sc_enaddr[i] = rom_enetaddr[i];
238 	}
239 
240 	printf("\n%s: MAC address %02x:%02x:%02x:%02x:%02x:%02x\n",
241 	       device_xname(self),
242 	       sc->sc_enaddr[0],sc->sc_enaddr[1],sc->sc_enaddr[2],
243 	       sc->sc_enaddr[3],sc->sc_enaddr[4],sc->sc_enaddr[5]);
244 
245 	xsc->sc_bst = ia->ia_bst;
246 	if (bus_space_map(xsc->sc_bst, NEXT_P_ENET,
247 			  XE_DEVICE_SIZE, 0, &xsc->sc_bsh)) {
248 		panic("\n%s: can't map mb8795 registers",
249 		      device_xname(self));
250 	}
251 
252 	sc->sc_bmap_bst = ia->ia_bst;
253 	if (bus_space_map(sc->sc_bmap_bst, NEXT_P_BMAP,
254 	    BMAP_SIZE, 0, &sc->sc_bmap_bsh))
255 		panic("\n%s: can't map bmap registers", device_xname(self));
256 
257 	/* Set up glue for MI code. */
258 	sc->sc_glue = &xe_glue;
259 
260 	xsc->sc_txdma = nextdma_findchannel("enetx");
261 	xsc->sc_rxdma = nextdma_findchannel("enetr");
262 	if (xsc->sc_rxdma && xsc->sc_txdma)
263 		findchannel_defer(self);
264 	else
265 		config_defer(self, findchannel_defer);
266 
267 	attached = 1;
268 }
269 
270 int
271 xe_tint(void *arg)
272 {
273 	if (!INTR_OCCURRED(NEXT_I_ENETX))
274 		return 0;
275 	mb8795_tint((struct mb8795_softc *)arg);
276 	return 1;
277 }
278 
279 int
280 xe_rint(void *arg)
281 {
282 	if (!INTR_OCCURRED(NEXT_I_ENETR))
283 		return 0;
284 	mb8795_rint((struct mb8795_softc *)arg);
285 	return 1;
286 }
287 
288 /*
289  * Glue functions.
290  */
291 
292 u_char
293 xe_read_reg(struct mb8795_softc *sc, int reg)
294 {
295 	struct xe_softc *xsc = (struct xe_softc *)sc;
296 
297 	return bus_space_read_1(xsc->sc_bst, xsc->sc_bsh, reg);
298 }
299 
300 void
301 xe_write_reg(struct mb8795_softc *sc, int reg, u_char val)
302 {
303 	struct xe_softc *xsc = (struct xe_softc *)sc;
304 
305 	bus_space_write_1(xsc->sc_bst, xsc->sc_bsh, reg, val);
306 }
307 
308 void
309 xe_dma_reset(struct mb8795_softc *sc)
310 {
311 	struct xe_softc *xsc = (struct xe_softc *)sc;
312 	int i;
313 
314 	DPRINTF(("xe DMA reset\n"));
315 
316 	nextdma_reset(xsc->sc_rxdma);
317 	nextdma_reset(xsc->sc_txdma);
318 
319 	if (xsc->sc_tx_loaded) {
320 		bus_dmamap_sync(xsc->sc_txdma->sc_dmat, xsc->sc_tx_dmamap,
321 		    0, xsc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_POSTWRITE);
322 		bus_dmamap_unload(xsc->sc_txdma->sc_dmat, xsc->sc_tx_dmamap);
323 		xsc->sc_tx_loaded = 0;
324 	}
325 	if (xsc->sc_tx_mb_head) {
326 		m_freem(xsc->sc_tx_mb_head);
327 		xsc->sc_tx_mb_head = NULL;
328 	}
329 
330 	for(i = 0; i < MB8795_NRXBUFS; i++) {
331 		if (xsc->sc_rx_mb_head[i]) {
332 			bus_dmamap_unload(xsc->sc_rxdma->sc_dmat,
333 			    xsc->sc_rx_dmamap[i]);
334 			m_freem(xsc->sc_rx_mb_head[i]);
335 			xsc->sc_rx_mb_head[i] = NULL;
336 		}
337 	}
338 }
339 
340 void
341 xe_dma_rx_setup(struct mb8795_softc *sc)
342 {
343 	struct xe_softc *xsc = (struct xe_softc *)sc;
344 	int i;
345 
346 	DPRINTF(("xe DMA rx setup\n"));
347 
348 	for(i = 0; i < MB8795_NRXBUFS; i++)
349 		xsc->sc_rx_mb_head[i] =
350 			xe_dma_rxmap_load(sc, xsc->sc_rx_dmamap[i]);
351 
352 	xsc->sc_rx_loaded_idx = 0;
353 	xsc->sc_rx_completed_idx = 0;
354 	xsc->sc_rx_handled_idx = 0;
355 
356 	nextdma_init(xsc->sc_rxdma);
357 }
358 
359 void
360 xe_dma_rx_go(struct mb8795_softc *sc)
361 {
362 	struct xe_softc *xsc = (struct xe_softc *)sc;
363 
364 	DPRINTF(("xe DMA rx go\n"));
365 
366 	nextdma_start(xsc->sc_rxdma, DMACSR_SETREAD);
367 }
368 
369 struct mbuf *
370 xe_dma_rx_mbuf(struct mb8795_softc *sc)
371 {
372 	struct xe_softc *xsc = (struct xe_softc *)sc;
373 	bus_dmamap_t map;
374 	struct mbuf *m;
375 
376 	m = NULL;
377 	if (xsc->sc_rx_handled_idx != xsc->sc_rx_completed_idx) {
378 		xsc->sc_rx_handled_idx++;
379 		xsc->sc_rx_handled_idx %= MB8795_NRXBUFS;
380 
381 		map = xsc->sc_rx_dmamap[xsc->sc_rx_handled_idx];
382 		m = xsc->sc_rx_mb_head[xsc->sc_rx_handled_idx];
383 
384 		m->m_len = map->dm_xfer_len;
385 
386 		bus_dmamap_sync(xsc->sc_rxdma->sc_dmat, map,
387 				0, map->dm_mapsize, BUS_DMASYNC_POSTREAD);
388 
389 		bus_dmamap_unload(xsc->sc_rxdma->sc_dmat, map);
390 
391 		/* Install a fresh mbuf for next packet */
392 
393 		xsc->sc_rx_mb_head[xsc->sc_rx_handled_idx] =
394 			xe_dma_rxmap_load(sc,map);
395 
396 		/* Punt runt packets
397 		 * DMA restarts create 0 length packets for example
398 		 */
399 		if (m->m_len < ETHER_MIN_LEN) {
400 			m_freem(m);
401 			m = NULL;
402 		}
403 	}
404 	return m;
405 }
406 
407 void
408 xe_dma_tx_setup(struct mb8795_softc *sc)
409 {
410 	struct xe_softc *xsc = (struct xe_softc *)sc;
411 
412 	DPRINTF(("xe DMA tx setup\n"));
413 
414 	nextdma_init(xsc->sc_txdma);
415 }
416 
417 void
418 xe_dma_tx_go(struct mb8795_softc *sc)
419 {
420 	struct xe_softc *xsc = (struct xe_softc *)sc;
421 
422 	DPRINTF(("xe DMA tx go\n"));
423 
424 	nextdma_start(xsc->sc_txdma, DMACSR_SETWRITE);
425 }
426 
427 int
428 xe_dma_tx_mbuf(struct mb8795_softc *sc, struct mbuf *m)
429 {
430 	struct xe_softc *xsc = (struct xe_softc *)sc;
431 	int error;
432 
433 	xsc->sc_tx_mb_head = m;
434 
435 /* The following is a next specific hack that should
436  * probably be moved out of MI code.
437  * This macro assumes it can move forward as needed
438  * in the buffer.  Perhaps it should zero the extra buffer.
439  */
440 #define REALIGN_DMABUF(s,l) \
441 	{ (s) = ((u_char *)(((unsigned)(s)+DMA_BEGINALIGNMENT-1) \
442 			&~(DMA_BEGINALIGNMENT-1))); \
443     (l) = ((u_char *)(((unsigned)((s)+(l))+DMA_ENDALIGNMENT-1) \
444 				&~(DMA_ENDALIGNMENT-1)))-(s);}
445 
446 #if 0
447 	error = bus_dmamap_load_mbuf(xsc->sc_txdma->sc_dmat,
448 	    xsc->sc_tx_dmamap, xsc->sc_tx_mb_head, BUS_DMA_NOWAIT);
449 #else
450 	{
451 		u_char *buf = xsc->sc_txbuf;
452 		int buflen = 0;
453 
454 		buflen = m->m_pkthdr.len;
455 
456 		{
457 			u_char *p = buf;
458 			for (m=xsc->sc_tx_mb_head; m; m = m->m_next) {
459 				if (m->m_len == 0) continue;
460 				memcpy(p, mtod(m, u_char *), m->m_len);
461 				p += m->m_len;
462 			}
463 			/* Fix runt packets */
464 			if (buflen < ETHER_MIN_LEN - ETHER_CRC_LEN) {
465 				memset(p, 0,
466 				    ETHER_MIN_LEN - ETHER_CRC_LEN - buflen);
467 				buflen = ETHER_MIN_LEN - ETHER_CRC_LEN;
468 			}
469 		}
470 
471 		error = bus_dmamap_load(xsc->sc_txdma->sc_dmat,
472 		    xsc->sc_tx_dmamap, buf, buflen, NULL, BUS_DMA_NOWAIT);
473 	}
474 #endif
475 	if (error) {
476 		aprint_error_dev(sc->sc_dev,
477 		    "can't load mbuf chain, error = %d\n", error);
478 		m_freem(xsc->sc_tx_mb_head);
479 		xsc->sc_tx_mb_head = NULL;
480 		return error;
481 	}
482 
483 #ifdef DIAGNOSTIC
484 	if (xsc->sc_tx_loaded != 0) {
485 		panic("%s: xsc->sc_tx_loaded is %d", device_xname(sc->sc_dev),
486 		      xsc->sc_tx_loaded);
487 	}
488 #endif
489 
490 	bus_dmamap_sync(xsc->sc_txdma->sc_dmat, xsc->sc_tx_dmamap, 0,
491 			xsc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE);
492 
493 	return 0;
494 }
495 
496 int
497 xe_dma_tx_isactive(struct mb8795_softc *sc)
498 {
499 	struct xe_softc *xsc = (struct xe_softc *)sc;
500 
501 	return (xsc->sc_tx_loaded != 0);
502 }
503 
504 /****************************************************************/
505 
506 void
507 xe_dma_tx_completed(bus_dmamap_t map, void *arg)
508 {
509 #if defined (XE_DEBUG) || defined (DIAGNOSTIC)
510 	struct mb8795_softc *sc = arg;
511 #endif
512 #ifdef DIAGNOSTIC
513 	struct xe_softc *xsc = (struct xe_softc *)sc;
514 #endif
515 
516 	DPRINTF(("%s: xe_dma_tx_completed()\n", device_xname(sc->sc_dev)));
517 
518 #ifdef DIAGNOSTIC
519 	if (!xsc->sc_tx_loaded)
520 		panic("%s: tx completed never loaded",
521 		    device_xname(sc->sc_dev));
522 
523 	if (map != xsc->sc_tx_dmamap)
524 		panic("%s: unexpected tx completed map",
525 		    device_xname(sc->sc_dev));
526 
527 #endif
528 }
529 
530 void
531 xe_dma_tx_shutdown(void *arg)
532 {
533 	struct mb8795_softc *sc = arg;
534 	struct xe_softc *xsc = (struct xe_softc *)sc;
535 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
536 
537 	DPRINTF(("%s: xe_dma_tx_shutdown()\n", device_xname(sc->sc_dev)));
538 
539 #ifdef DIAGNOSTIC
540 	if (!xsc->sc_tx_loaded)
541 		panic("%s: tx shutdown never loaded",
542 		    device_xname(sc->sc_dev));
543 #endif
544 
545 	if (turbo)
546 		MB_WRITE_REG(sc, MB8795_TXMODE, MB8795_TXMODE_TURBO1);
547 	if (xsc->sc_tx_loaded) {
548 		bus_dmamap_sync(xsc->sc_txdma->sc_dmat, xsc->sc_tx_dmamap,
549 		    0, xsc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_POSTWRITE);
550 		bus_dmamap_unload(xsc->sc_txdma->sc_dmat, xsc->sc_tx_dmamap);
551 		m_freem(xsc->sc_tx_mb_head);
552 		xsc->sc_tx_mb_head = NULL;
553 
554 		xsc->sc_tx_loaded--;
555 	}
556 
557 #ifdef DIAGNOSTIC
558 	if (xsc->sc_tx_loaded != 0)
559 		panic("%s: sc->sc_tx_loaded is %d", device_xname(sc->sc_dev),
560 		      xsc->sc_tx_loaded);
561 #endif
562 
563 	ifp->if_timer = 0;
564 
565 #if 1
566 	if ((ifp->if_flags & IFF_RUNNING) && !IF_IS_EMPTY(&sc->sc_tx_snd)) {
567 		void mb8795_start_dma(struct mb8795_softc *); /* XXXX */
568 		mb8795_start_dma(sc);
569 	}
570 #endif
571 
572 #if 0
573 	/* Enable ready interrupt */
574 	MB_WRITE_REG(sc, MB8795_TXMASK,
575 		     MB_READ_REG(sc, MB8795_TXMASK)
576 		     | MB8795_TXMASK_TXRXIE/* READYIE */);
577 #endif
578 }
579 
580 
581 void
582 xe_dma_rx_completed(bus_dmamap_t map, void *arg)
583 {
584 	struct mb8795_softc *sc = arg;
585 	struct xe_softc *xsc = (struct xe_softc *)sc;
586 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
587 
588 	if (ifp->if_flags & IFF_RUNNING) {
589 		xsc->sc_rx_completed_idx++;
590 		xsc->sc_rx_completed_idx %= MB8795_NRXBUFS;
591 
592 		DPRINTF(("%s: xe_dma_rx_completed(), "
593 			"sc->sc_rx_completed_idx = %d\n",
594 			 device_xname(sc->sc_dev), xsc->sc_rx_completed_idx));
595 
596 #if (defined(DIAGNOSTIC))
597 		if (map != xsc->sc_rx_dmamap[xsc->sc_rx_completed_idx])
598 			panic("%s: Unexpected rx dmamap completed",
599 			      device_xname(sc->sc_dev));
600 #endif
601 	}
602 #ifdef DIAGNOSTIC
603 	else
604 		DPRINTF(("%s: Unexpected rx dmamap completed while if not "
605 			"running\n", device_xname(sc->sc_dev)));
606 #endif
607 }
608 
609 void
610 xe_dma_rx_shutdown(void *arg)
611 {
612 	struct mb8795_softc *sc = arg;
613 	struct xe_softc *xsc = (struct xe_softc *)sc;
614 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
615 
616 	if (ifp->if_flags & IFF_RUNNING) {
617 		DPRINTF(("%s: xe_dma_rx_shutdown(), restarting.\n",
618 			 device_xname(sc->sc_dev)));
619 
620 		nextdma_start(xsc->sc_rxdma, DMACSR_SETREAD);
621 		if (turbo)
622 			MB_WRITE_REG(sc, MB8795_RXMODE,
623 			    MB8795_RXMODE_TEST | MB8795_RXMODE_MULTICAST);
624 	}
625 #ifdef DIAGNOSTIC
626 	else
627 		DPRINTF(("%s: Unexpected rx DMA shutdown while if not "
628 			"running\n", device_xname(sc->sc_dev)));
629 #endif
630 }
631 
632 /*
633  * load a dmamap with a freshly allocated mbuf
634  */
635 struct mbuf *
636 xe_dma_rxmap_load(struct mb8795_softc *sc, bus_dmamap_t map)
637 {
638 	struct xe_softc *xsc = (struct xe_softc *)sc;
639 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
640 	struct mbuf *m;
641 	int error;
642 
643 	MGETHDR(m, M_DONTWAIT, MT_DATA);
644 	if (m) {
645 		MCLGET(m, M_DONTWAIT);
646 		if ((m->m_flags & M_EXT) == 0) {
647 			m_freem(m);
648 			m = NULL;
649 		} else
650 			m->m_len = MCLBYTES;
651 	}
652 	if (!m) {
653 		/*
654 		 * @@@ Handle this gracefully by reusing a scratch buffer
655 		 * or something.
656 		 */
657 		panic("Unable to get memory for incoming ethernet");
658 	}
659 
660 	/*
661 	 * Align buffer, @@@ next specific.
662 	 * perhaps should be using M_ALIGN here instead?
663 	 * First we give us a little room to align with.
664 	 */
665 	{
666 		u_char *buf = m->m_data;
667 		int buflen = m->m_len;
668 		buflen -= DMA_ENDALIGNMENT+DMA_BEGINALIGNMENT;
669 		REALIGN_DMABUF(buf, buflen);
670 		m->m_data = buf;
671 		m->m_len = buflen;
672 	}
673 
674 	m_set_rcvif(m, ifp);
675 	m->m_pkthdr.len = m->m_len;
676 
677 	error = bus_dmamap_load_mbuf(xsc->sc_rxdma->sc_dmat,
678 			map, m, BUS_DMA_NOWAIT);
679 
680 	bus_dmamap_sync(xsc->sc_rxdma->sc_dmat, map, 0,
681 			map->dm_mapsize, BUS_DMASYNC_PREREAD);
682 
683 	if (error) {
684 		DPRINTF(("DEBUG: m->m_data = %p, m->m_len = %d\n",
685 				m->m_data, m->m_len));
686 		DPRINTF(("DEBUG: MCLBYTES = %d, map->_dm_size = %ld\n",
687 				MCLBYTES, map->_dm_size));
688 
689 		panic("%s: can't load rx mbuf chain, error = %d",
690 				device_xname(sc->sc_dev), error);
691 		m_freem(m);
692 		m = NULL;
693 	}
694 
695 	return m;
696 }
697 
698 bus_dmamap_t
699 xe_dma_rx_continue(void *arg)
700 {
701 	struct mb8795_softc *sc = arg;
702 	struct xe_softc *xsc = (struct xe_softc *)sc;
703 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
704 	bus_dmamap_t map = NULL;
705 
706 	if (ifp->if_flags & IFF_RUNNING) {
707 		if (((xsc->sc_rx_loaded_idx+1)%MB8795_NRXBUFS)
708 		    == xsc->sc_rx_handled_idx) {
709 			/* Make space for one packet by dropping one */
710 			struct mbuf *m;
711 			m = xe_dma_rx_mbuf (sc);
712 			if (m)
713 				m_freem(m);
714 #if (defined(DIAGNOSTIC))
715 			DPRINTF(("%s: out of receive DMA buffers\n",
716 				device_xname(sc->sc_dev)));
717 #endif
718 		}
719 		xsc->sc_rx_loaded_idx++;
720 		xsc->sc_rx_loaded_idx %= MB8795_NRXBUFS;
721 		map = xsc->sc_rx_dmamap[xsc->sc_rx_loaded_idx];
722 
723 		DPRINTF(("%s: xe_dma_rx_continue() xsc->sc_rx_loaded_idx "
724 			"= %d\n", device_xname(sc->sc_dev),
725 			xsc->sc_rx_loaded_idx));
726 	}
727 #ifdef DIAGNOSTIC
728 	else
729 		panic("%s: Unexpected rx DMA continue while if not running",
730 		      device_xname(sc->sc_dev));
731 #endif
732 
733 	return map;
734 }
735 
736 bus_dmamap_t
737 xe_dma_tx_continue(void *arg)
738 {
739 	struct mb8795_softc *sc = arg;
740 	struct xe_softc *xsc = (struct xe_softc *)sc;
741 	bus_dmamap_t map;
742 
743 	DPRINTF(("%s: xe_dma_tx_continue()\n", device_xname(sc->sc_dev)));
744 
745 	if (xsc->sc_tx_loaded)
746 		map = NULL;
747 	else {
748 		map = xsc->sc_tx_dmamap;
749 		xsc->sc_tx_loaded++;
750 	}
751 
752 #ifdef DIAGNOSTIC
753 	if (xsc->sc_tx_loaded != 1)
754 		panic("%s: sc->sc_tx_loaded is %d", device_xname(sc->sc_dev),
755 				xsc->sc_tx_loaded);
756 #endif
757 
758 	return map;
759 }
760