xref: /netbsd-src/sys/arch/newsmips/include/intr.h (revision 274254cdae52594c1aa480a736aef78313d15c9c)
1 /*	$NetBSD: intr.h,v 1.23 2008/04/28 20:23:30 martin Exp $	*/
2 
3 /*-
4  * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _MACHINE_INTR_H_
33 #define _MACHINE_INTR_H_
34 
35 #define IPL_NONE	0	/* disable only this interrupt */
36 #define IPL_SOFTCLOCK	1	/* clock software interrupts (SI 0) */
37 #define IPL_SOFTBIO	1	/* bio software interrupts (SI 0) */
38 #define IPL_SOFTNET	2	/* network software interrupts (SI 1) */
39 #define IPL_SOFTSERIAL	2	/* serial software interrupts (SI 1) */
40 #define	IPL_VM		3
41 #define IPL_SCHED	4	/* disable clock interrupts */
42 #define IPL_HIGH	4	/* disable all interrupts */
43 
44 #define _IPL_N		5
45 
46 #define _IPL_SI0_FIRST	IPL_SOFTCLOCK
47 #define _IPL_SI0_LAST	IPL_SOFTBIO
48 
49 #define _IPL_SI1_FIRST	IPL_SOFTNET
50 #define _IPL_SI1_LAST	IPL_SOFTSERIAL
51 
52 #ifdef _KERNEL
53 #ifndef _LOCORE
54 
55 #include <sys/device.h>
56 #include <mips/locore.h>
57 
58 extern const uint32_t ipl_sr_bits[_IPL_N];
59 
60 #define spl0()		(void)_spllower(0)
61 #define splx(s)		(void)_splset(s)
62 
63 #define splsoft()	_splraise(ipl_sr_bits[IPL_SOFT])
64 
65 typedef int ipl_t;
66 typedef struct {
67 	ipl_t _sr;
68 } ipl_cookie_t;
69 
70 static inline ipl_cookie_t
71 makeiplcookie(ipl_t ipl)
72 {
73 
74 	return (ipl_cookie_t){._sr = ipl_sr_bits[ipl]};
75 }
76 
77 static inline int
78 splraiseipl(ipl_cookie_t icookie)
79 {
80 
81 	return _splraise(icookie._sr);
82 }
83 
84 #include <sys/spl.h>
85 
86 struct newsmips_intrhand {
87 	LIST_ENTRY(newsmips_intrhand) ih_q;
88 	struct evcnt intr_count;
89 	int (*ih_func)(void *);
90 	void *ih_arg;
91 	u_int ih_level;
92 	u_int ih_mask;
93 	u_int ih_priority;
94 };
95 
96 struct newsmips_intr {
97 	LIST_HEAD(,newsmips_intrhand) intr_q;
98 };
99 
100 /*
101  * Index into intrcnt[], which is defined in locore
102  */
103 #define SERIAL0_INTR	0
104 #define SERIAL1_INTR	1
105 #define SERIAL2_INTR	2
106 #define LANCE_INTR	3
107 #define SCSI_INTR	4
108 #define ERROR_INTR	5
109 #define HARDCLOCK_INTR	6
110 #define FPU_INTR	7
111 #define SLOT1_INTR	8
112 #define SLOT2_INTR	9
113 #define SLOT3_INTR	10
114 #define FLOPPY_INTR	11
115 #define STRAY_INTR	12
116 
117 extern u_int intrcnt[];
118 
119 /* handle i/o device interrupts */
120 #ifdef news3400
121 void news3400_intr(uint32_t, uint32_t, uint32_t, uint32_t);
122 #endif
123 #ifdef news5000
124 void news5000_intr(uint32_t, uint32_t, uint32_t, uint32_t);
125 #endif
126 extern void (*hardware_intr)(uint32_t, uint32_t, uint32_t, uint32_t);
127 
128 extern void (*enable_intr)(void);
129 extern void (*disable_intr)(void);
130 extern void (*enable_timer)(void);
131 
132 #endif /* !_LOCORE */
133 #endif /* _KERNEL */
134 #endif /* _MACHINE_INTR_H_ */
135