xref: /netbsd-src/sys/arch/newsmips/dev/zs_hb.c (revision a5847cc334d9a7029f6352b847e9e8d71a0f9e0c)
1 /*	$NetBSD: zs_hb.c,v 1.26 2010/06/26 03:44:49 tsutsui Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Gordon W. Ross.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * Zilog Z8530 Dual UART driver (machine-dependent part)
34  *
35  * Runs two serial lines per chip using slave drivers.
36  * Plain tty/async lines use the zs_async slave.
37  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
38  */
39 
40 #include <sys/cdefs.h>
41 __KERNEL_RCSID(0, "$NetBSD: zs_hb.c,v 1.26 2010/06/26 03:44:49 tsutsui Exp $");
42 
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/device.h>
46 #include <sys/tty.h>
47 #include <sys/conf.h>
48 #include <sys/cpu.h>
49 #include <sys/intr.h>
50 
51 #include <machine/adrsmap.h>
52 #include <machine/z8530var.h>
53 
54 #include <dev/cons.h>
55 #include <dev/ic/z8530reg.h>
56 
57 #include <newsmips/dev/hbvar.h>
58 
59 #include "zsc.h"	/* NZSC */
60 #define NZS NZSC
61 
62 /* Make life easier for the initialized arrays here. */
63 #if NZS < 2
64 #undef  NZS
65 #define NZS 2
66 #endif
67 
68 #define ZSCFLAG_EX	0x01	/* expansion board */
69 
70 /*
71  * The news3400 provides a 4.9152 MHz clock to the ZS chips.
72  */
73 #define PCLK	(9600 * 512)	/* PCLK pin input clock rate */
74 #define PCLK_EX	(9600 * 384)
75 
76 /*
77  * Define interrupt levels.
78  */
79 #define ZSHARD_PRI 64
80 
81 #define ZS_DELAY() {(void)*(volatile char *)INTEN1; delay(2);}
82 
83 /* The layout of this is hardware-dependent (padding, order). */
84 struct zschan {
85 	volatile uint8_t zc_csr;	/* ctrl,status, and indirect access */
86 	volatile uint8_t zc_data;	/* data */
87 };
88 struct zsdevice {
89 	/* Yes, they are backwards. */
90 	struct	zschan zs_chan_b;
91 	struct	zschan zs_chan_a;
92 };
93 
94 extern int zs_def_cflag;
95 
96 static struct zsdevice *zsaddr[NZS];
97 
98 /* Flags from cninit() */
99 static int zs_hwflags[NZS][2];
100 
101 /* Default speed for all channels */
102 static int zs_defspeed = 9600;
103 
104 static uint8_t zs_init_reg[16] = {
105 	0,	/* 0: CMD (reset, etc.) */
106 	0,	/* 1: No interrupts yet. */
107 	ZSHARD_PRI,	/* IVECT */
108 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
109 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
110 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
111 	0,	/* 6: TXSYNC/SYNCLO */
112 	0,	/* 7: RXSYNC/SYNCHI */
113 	0,	/* 8: alias for data port */
114 	ZSWR9_MASTER_IE,
115 	0,	/*10: Misc. TX/RX control bits */
116 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
117 	((PCLK/32)/9600)-2,	/*12: BAUDLO (default=9600) */
118 	0,			/*13: BAUDHI (default=9600) */
119 	ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
120 	ZSWR15_BREAK_IE,
121 };
122 
123 static struct zschan * zs_get_chan_addr(int, int);
124 static void zs_hb_delay(void);
125 static int zshard_hb(void *);
126 static int zs_getc(void *);
127 static void zs_putc(void *, int);
128 
129 struct zschan *
130 zs_get_chan_addr(int zs_unit, int channel)
131 {
132 	struct zsdevice *addr;
133 	struct zschan *zc;
134 
135 	if (zs_unit >= NZS)
136 		return NULL;
137 	addr = zsaddr[zs_unit];
138 	if (addr == NULL)
139 		return NULL;
140 	if (channel == 0) {
141 		zc = &addr->zs_chan_a;
142 	} else {
143 		zc = &addr->zs_chan_b;
144 	}
145 	return zc;
146 }
147 
148 static void
149 zs_hb_delay(void)
150 {
151 
152 	ZS_DELAY();
153 }
154 
155 /****************************************************************
156  * Autoconfig
157  ****************************************************************/
158 
159 /* Definition of the driver for autoconfig. */
160 int zs_hb_match(device_t, cfdata_t, void *);
161 void zs_hb_attach(device_t, device_t, void *);
162 
163 CFATTACH_DECL_NEW(zsc_hb, sizeof(struct zsc_softc),
164     zs_hb_match, zs_hb_attach, NULL, NULL);
165 
166 /*
167  * Is the zs chip present?
168  */
169 int
170 zs_hb_match(device_t parent, cfdata_t cf, void *aux)
171 {
172 	struct hb_attach_args *ha = aux;
173 
174 	if (strcmp(ha->ha_name, "zsc"))
175 		return 0;
176 
177 	/* This returns -1 on a fault (bus error). */
178 	if (hb_badaddr((char *)ha->ha_addr, 1))
179 		return 0;
180 
181 	return 1;
182 }
183 
184 /*
185  * Attach a found zs.
186  *
187  * Match slave number to zs unit number, so that misconfiguration will
188  * not set up the keyboard as ttya, etc.
189  */
190 void
191 zs_hb_attach(device_t parent, device_t self, void *aux)
192 {
193 	struct zsc_softc *zsc = device_private(self);
194 	struct hb_attach_args *ha = aux;
195 	struct zsc_attach_args zsc_args;
196 	volatile struct zschan *zc;
197 	struct zs_chanstate *cs;
198 	int s, zs_unit, channel, intlevel;
199 
200 	zsc->zsc_dev = self;
201 	zs_unit = device_unit(self);
202 	intlevel = ha->ha_level;
203 	zsaddr[zs_unit] = (void *)ha->ha_addr;
204 
205 	if (intlevel == -1) {
206 #if 0
207 		aprint_error(": interrupt level not configured\n");
208 		return;
209 #else
210 		aprint_error(": interrupt level not configured; using");
211 		intlevel = 1;
212 #endif
213 	}
214 
215 	aprint_error(" level %d\n", intlevel);
216 
217 	zs_delay = zs_hb_delay;
218 
219 	/*
220 	 * Initialize software state for each channel.
221 	 */
222 	for (channel = 0; channel < 2; channel++) {
223 		zsc_args.channel = channel;
224 		zsc_args.hwflags = zs_hwflags[zs_unit][channel];
225 		cs = &zsc->zsc_cs_store[channel];
226 		zsc->zsc_cs[channel] = cs;
227 
228 		zs_lock_init(cs);
229 		cs->cs_channel = channel;
230 		cs->cs_private = NULL;
231 		cs->cs_ops = &zsops_null;
232 		if ((device_cfdata(self)->cf_flags & ZSCFLAG_EX) == 0)
233 			cs->cs_brg_clk = PCLK / 16;
234 		else
235 			cs->cs_brg_clk = PCLK_EX / 16;
236 
237 		zc = zs_get_chan_addr(zs_unit, channel);
238 		cs->cs_reg_csr  = &zc->zc_csr;
239 		cs->cs_reg_data = &zc->zc_data;
240 
241 		memcpy(cs->cs_creg, zs_init_reg, 16);
242 		memcpy(cs->cs_preg, zs_init_reg, 16);
243 
244 		/* XXX: Get these from the EEPROM instead? */
245 		/* XXX: See the mvme167 code.  Better. */
246 		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
247 			cs->cs_defspeed = zs_get_speed(cs);
248 		else
249 			cs->cs_defspeed = zs_defspeed;
250 		cs->cs_defcflag = zs_def_cflag;
251 
252 		/* Make these correspond to cs_defcflag (-crtscts) */
253 		cs->cs_rr0_dcd = ZSRR0_DCD;
254 		cs->cs_rr0_cts = 0;
255 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
256 		cs->cs_wr5_rts = 0;
257 
258 		/*
259 		 * Clear the master interrupt enable.
260 		 * The INTENA is common to both channels,
261 		 * so just do it on the A channel.
262 		 */
263 		if (channel == 0) {
264 			zs_write_reg(cs, 9, 0);
265 		}
266 
267 		/*
268 		 * Look for a child driver for this channel.
269 		 * The child attach will setup the hardware.
270 		 */
271 		if (!config_found(self, (void *)&zsc_args, zs_print)) {
272 			/* No sub-driver.  Just reset it. */
273 			uint8_t reset = (channel == 0) ?
274 			    ZSWR9_A_RESET : ZSWR9_B_RESET;
275 			s = splhigh();
276 			zs_write_reg(cs, 9, reset);
277 			splx(s);
278 		}
279 	}
280 
281 	/*
282 	 * Now safe to install interrupt handlers.  Note the arguments
283 	 * to the interrupt handlers aren't used.  Note, we only do this
284 	 * once since both SCCs interrupt at the same level and vector.
285 	 */
286 	zsc->zsc_si = softint_establish(SOFTINT_SERIAL,
287 	    (void (*)(void *))zsc_intr_soft, zsc);
288 	hb_intr_establish(intlevel, INTST1_SCC, IPL_SERIAL, zshard_hb, zsc);
289 	/* XXX; evcnt_attach() ? */
290 
291 	/*
292 	 * Set the master interrupt enable and interrupt vector.
293 	 * (common to both channels, do it on A)
294 	 */
295 	cs = zsc->zsc_cs[0];
296 	s = splhigh();
297 	/* interrupt vector */
298 	zs_write_reg(cs, 2, zs_init_reg[2]);
299 	/* master interrupt control (enable) */
300 	zs_write_reg(cs, 9, zs_init_reg[9]);
301 	splx(s);
302 }
303 
304 static int
305 zshard_hb(void *arg)
306 {
307 	int rv;
308 
309 	(void) *(volatile u_char *)SCCVECT;
310 	rv = zshard(arg);
311 
312 	/* XXX news3400 sometimes losts zs interrupt */
313 	if (rv)
314 		zshard(arg);
315 
316 	return rv;
317 }
318 
319 /*
320  * Polled input char.
321  */
322 int
323 zs_getc(void *arg)
324 {
325 	volatile struct zschan *zc = arg;
326 	int s, c, rr0;
327 
328 	s = splhigh();
329 	/* Wait for a character to arrive. */
330 	do {
331 		rr0 = zc->zc_csr;
332 		ZS_DELAY();
333 	} while ((rr0 & ZSRR0_RX_READY) == 0);
334 
335 	c = zc->zc_data;
336 	ZS_DELAY();
337 	splx(s);
338 
339 	/*
340 	 * This is used by the kd driver to read scan codes,
341 	 * so don't translate '\r' ==> '\n' here...
342 	 */
343 	return c;
344 }
345 
346 /*
347  * Polled output char.
348  */
349 void
350 zs_putc(void *arg, int c)
351 {
352 	volatile struct zschan *zc = arg;
353 	int s, rr0;
354 
355 	s = splhigh();
356 	/* Wait for transmitter to become ready. */
357 	do {
358 		rr0 = zc->zc_csr;
359 		ZS_DELAY();
360 	} while ((rr0 & ZSRR0_TX_READY) == 0);
361 
362 	zc->zc_data = c;
363 	ZS_DELAY();
364 	splx(s);
365 }
366 
367 /*****************************************************************/
368 
369 static void zscnprobe(struct consdev *);
370 static void zscninit(struct consdev *);
371 static int  zscngetc(dev_t);
372 static void zscnputc(dev_t, int);
373 
374 struct consdev consdev_zs = {
375 	zscnprobe,
376 	zscninit,
377 	zscngetc,
378 	zscnputc,
379 	nullcnpollc,
380 	NULL,
381 	NULL,
382 	NULL,
383 	NODEV,
384 	CN_DEAD
385 };
386 
387 static void
388 zscnprobe(struct consdev *cn)
389 {
390 }
391 
392 static void
393 zscninit(struct consdev *cn)
394 {
395 	extern const struct cdevsw zstty_cdevsw;
396 
397 	cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), 0);
398 	cn->cn_pri = CN_REMOTE;
399 	zs_hwflags[0][0] = ZS_HWFLAG_CONSOLE;
400 }
401 
402 static int
403 zscngetc(dev_t dev)
404 {
405 
406 	return zs_getc((void *)SCCPORT0A);
407 }
408 
409 static void
410 zscnputc(dev_t dev, int c)
411 {
412 
413 	zs_putc((void *)SCCPORT0A, c);
414 }
415