1 /* $NetBSD: apbus.c,v 1.22 2011/02/20 07:56:31 matt Exp $ */ 2 3 /*- 4 * Copyright (C) 1999 SHIMIZU Ryo. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: apbus.c,v 1.22 2011/02/20 07:56:31 matt Exp $"); 31 32 #define __INTR_PRIVATE 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/malloc.h> 37 #include <sys/device.h> 38 #include <sys/proc.h> 39 #include <sys/intr.h> 40 41 #include <uvm/uvm_extern.h> 42 43 #include <machine/adrsmap.h> 44 #include <machine/autoconf.h> 45 #define _NEWSMIPS_BUS_DMA_PRIVATE 46 #include <machine/bus.h> 47 #include <newsmips/apbus/apbusvar.h> 48 49 static int apbusmatch(device_t, cfdata_t, void *); 50 static void apbusattach(device_t, device_t, void *); 51 static int apbusprint(void *, const char *); 52 #if 0 53 static void *aptokseg0 (void *); 54 #endif 55 static void apbus_dma_unmapped(bus_dma_tag_t, bus_dmamap_t); 56 static int apbus_dma_mapalloc(bus_dma_tag_t, bus_dmamap_t, int); 57 static void apbus_dma_mapfree(bus_dma_tag_t, bus_dmamap_t); 58 static void apbus_dma_mapset(bus_dma_tag_t, bus_dmamap_t); 59 static int apbus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 60 bus_size_t, int, bus_dmamap_t *); 61 static void apbus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 62 static int apbus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, bus_size_t, 63 struct proc *, int); 64 static int apbus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *, 65 int); 66 static int apbus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, 67 int); 68 static int apbus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, 69 bus_dma_segment_t *, int, bus_size_t, int); 70 static void apbus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 71 bus_size_t, int); 72 73 #define MAXAPDEVNUM 32 74 75 CFATTACH_DECL_NEW(ap, 0, 76 apbusmatch, apbusattach, NULL, NULL); 77 78 #define NLEVEL 2 79 static struct newsmips_intr apintr_tab[NLEVEL]; 80 81 static int 82 apbusmatch(device_t parent, cfdata_t cf, void *aux) 83 { 84 struct confargs *ca = aux; 85 86 if (strcmp(ca->ca_name, "ap") != 0) 87 return 0; 88 89 return 1; 90 } 91 92 93 static void 94 apbusattach(device_t parent, device_t self, void *aux) 95 { 96 struct apbus_attach_args child; 97 struct apbus_dev *apdev; 98 struct apbus_ctl *apctl; 99 struct newsmips_intr *ip; 100 int i; 101 102 mips_set_wbflush(apbus_wbflush); 103 104 *(volatile uint32_t *)(NEWS5000_APBUS_INTST) = 0xffffffff; 105 *(volatile uint32_t *)(NEWS5000_APBUS_INTMSK) = 0xffffffff; 106 *(volatile uint32_t *)(NEWS5000_APBUS_CTRL) = 0x00000004; 107 *(volatile uint32_t *)(NEWS5000_APBUS_DMA) = 0xffffffff; 108 109 aprint_normal("\n"); 110 111 for (i = 0; i < NLEVEL; i++) { 112 ip = &apintr_tab[i]; 113 LIST_INIT(&ip->intr_q); 114 } 115 116 /* 117 * get first ap-device 118 */ 119 apdev = apbus_lookupdev(NULL); 120 121 /* 122 * trace device chain 123 */ 124 while (apdev) { 125 apctl = apdev->apbd_ctl; 126 127 /* 128 * probe physical device only 129 * (no pseudo device) 130 */ 131 if (apctl && apctl->apbc_hwbase) { 132 /* 133 * ... and, all units 134 */ 135 while (apctl) { 136 /* make apbus_attach_args for devices */ 137 child.apa_name = apdev->apbd_name; 138 child.apa_ctlnum = apctl->apbc_ctlno; 139 child.apa_slotno = apctl->apbc_sl; 140 child.apa_hwbase = apctl->apbc_hwbase; 141 142 config_found(self, &child, apbusprint); 143 144 apctl = apctl->apbc_link; 145 } 146 } 147 148 apdev = apdev->apbd_link; 149 } 150 } 151 152 int 153 apbusprint(void *aux, const char *pnp) 154 { 155 struct apbus_attach_args *a = aux; 156 157 if (pnp) 158 aprint_normal("%s at %s slot%d addr 0x%lx", 159 a->apa_name, pnp, a->apa_slotno, a->apa_hwbase); 160 161 return UNCONF; 162 } 163 164 #if 0 165 void * 166 aptokseg0(void *va) 167 { 168 vaddr_t addr = (vaddr_t)va; 169 170 if (addr >= 0xfff00000) { 171 addr -= 0xfff00000; 172 addr += physmem << PGSHIFT; 173 addr += 0x80000000; 174 va = (void *)addr; 175 } 176 return va; 177 } 178 #endif 179 180 void 181 apbus_wbflush(void) 182 { 183 volatile int32_t * const our_wbflush = (int32_t *)NEWS5000_WBFLUSH; 184 185 (*mips_locore_jumpvec.ljv_wbflush)(); 186 (void)*our_wbflush; 187 } 188 189 /* 190 * called by hardware interrupt routine 191 */ 192 int 193 apbus_intr_dispatch(int level, int stat) 194 { 195 struct newsmips_intr *ip; 196 struct newsmips_intrhand *ih; 197 int nintr; 198 199 ip = &apintr_tab[level]; 200 201 nintr = 0; 202 LIST_FOREACH(ih, &ip->intr_q, ih_q) { 203 if (ih->ih_mask & stat) 204 nintr += (*ih->ih_func)(ih->ih_arg); 205 } 206 return nintr; 207 } 208 209 /* 210 * register device interrupt routine 211 */ 212 void * 213 apbus_intr_establish(int level, int mask, int priority, int (*func)(void *), 214 void *arg, const char *name, int ctlno) 215 { 216 struct newsmips_intr *ip; 217 struct newsmips_intrhand *ih, *curih; 218 volatile uint32_t *inten0, *inten1; 219 220 ip = &apintr_tab[level]; 221 222 ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT); 223 if (ih == NULL) 224 panic("%s: can't malloc handler info", __func__); 225 ih->ih_mask = mask; 226 ih->ih_priority = priority; 227 ih->ih_func = func; 228 ih->ih_arg = arg; 229 230 if (LIST_EMPTY(&ip->intr_q)) { 231 LIST_INSERT_HEAD(&ip->intr_q, ih, ih_q); 232 goto done; 233 } 234 235 for (curih = LIST_FIRST(&ip->intr_q); 236 LIST_NEXT(curih, ih_q) != NULL; 237 curih = LIST_NEXT(curih, ih_q)) { 238 if (ih->ih_priority > curih->ih_priority) { 239 LIST_INSERT_BEFORE(curih, ih, ih_q); 240 goto done; 241 } 242 } 243 244 LIST_INSERT_AFTER(curih, ih, ih_q); 245 246 done: 247 switch (level) { 248 case 0: 249 inten0 = (volatile uint32_t *)NEWS5000_INTEN0; 250 *inten0 |= mask; 251 break; 252 case 1: 253 inten1 = (volatile uint32_t *)NEWS5000_INTEN1; 254 *inten1 |= mask; 255 break; 256 } 257 258 return (void *)ih; 259 } 260 261 static void 262 apbus_dma_unmapped(bus_dma_tag_t t, bus_dmamap_t map) 263 { 264 int seg; 265 266 for (seg = 0; seg < map->dm_nsegs; seg++) { 267 /* 268 * set MSB to indicate unmapped DMA. 269 * also need bit 30 for memory over 256MB. 270 */ 271 if ((map->dm_segs[seg].ds_addr & 0x30000000) == 0) 272 map->dm_segs[seg].ds_addr |= 0x80000000; 273 else 274 map->dm_segs[seg].ds_addr |= 0xc0000000; 275 } 276 } 277 278 #define APBUS_NDMAMAP (NEWS5000_APBUS_MAPSIZE / NEWS5000_APBUS_MAPENT) 279 #define APBUS_MAPTBL(n, v) \ 280 (*(volatile uint32_t *)(NEWS5000_APBUS_DMAMAP + \ 281 NEWS5000_APBUS_MAPENT * (n) + 1) = (v)) 282 static uint8_t apbus_dma_maptbl[APBUS_NDMAMAP]; 283 284 static int 285 apbus_dma_mapalloc(bus_dma_tag_t t, bus_dmamap_t map, int flags) 286 { 287 int i, j, cnt; 288 289 cnt = round_page(map->_dm_size) / PAGE_SIZE; 290 291 again: 292 for (i = 0; i < APBUS_NDMAMAP; i += j + 1) { 293 for (j = 0; j < cnt; j++) { 294 if (apbus_dma_maptbl[i + j]) 295 break; 296 } 297 if (j == cnt) { 298 for (j = 0; j < cnt; j++) 299 apbus_dma_maptbl[i + j] = 1; 300 map->_dm_maptbl = i; 301 map->_dm_maptblcnt = cnt; 302 return 0; 303 } 304 } 305 if ((flags & BUS_DMA_NOWAIT) == 0) { 306 tsleep(&apbus_dma_maptbl, PRIBIO, "apdmat", 0); 307 goto again; 308 } 309 return ENOMEM; 310 } 311 312 static void 313 apbus_dma_mapfree(bus_dma_tag_t t, bus_dmamap_t map) 314 { 315 int i, n; 316 317 if (map->_dm_maptblcnt > 0) { 318 n = map->_dm_maptbl; 319 for (i = 0; i < map->_dm_maptblcnt; i++, n++) { 320 #ifdef DIAGNOSTIC 321 if (apbus_dma_maptbl[n] == 0) 322 panic("freeing free DMA map"); 323 APBUS_MAPTBL(n, 0xffffffff); /* causes DMA error */ 324 #endif 325 apbus_dma_maptbl[n] = 0; 326 } 327 wakeup(&apbus_dma_maptbl); 328 map->_dm_maptblcnt = 0; 329 } 330 } 331 332 static void 333 apbus_dma_mapset(bus_dma_tag_t t, bus_dmamap_t map) 334 { 335 int i; 336 bus_addr_t addr, eaddr; 337 int seg; 338 bus_dma_segment_t *segs; 339 340 i = 0; 341 for (seg = 0; seg < map->dm_nsegs; seg++) { 342 segs = &map->dm_segs[seg]; 343 for (addr = segs->ds_addr, eaddr = addr + segs->ds_len; 344 addr < eaddr; addr += PAGE_SIZE, i++) { 345 #ifdef DIAGNOSTIC 346 if (i >= map->_dm_maptblcnt) 347 panic("DMA map table overflow"); 348 #endif 349 APBUS_MAPTBL(map->_dm_maptbl + i, 350 NEWS5000_APBUS_MAP_VALID | 351 NEWS5000_APBUS_MAP_COHERENT | 352 (addr >> PGSHIFT)); 353 } 354 } 355 map->dm_segs[0].ds_addr = map->_dm_maptbl << PGSHIFT; 356 map->dm_segs[0].ds_len = map->dm_mapsize; 357 map->dm_nsegs = 1; 358 } 359 360 static int 361 apbus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments, 362 bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp) 363 { 364 int error; 365 366 if (flags & NEWSMIPS_DMAMAP_MAPTBL) 367 nsegments = round_page(size) / PAGE_SIZE; 368 error = _bus_dmamap_create(t, size, nsegments, maxsegsz, boundary, 369 flags, dmamp); 370 if (error == 0 && (flags & NEWSMIPS_DMAMAP_MAPTBL)) { 371 error = apbus_dma_mapalloc(t, *dmamp, flags); 372 if (error) { 373 _bus_dmamap_destroy(t, *dmamp); 374 *dmamp = NULL; 375 } 376 } 377 return error; 378 } 379 380 static void 381 apbus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map) 382 { 383 384 if (map->_dm_flags & NEWSMIPS_DMAMAP_MAPTBL) 385 apbus_dma_mapfree(t, map); 386 _bus_dmamap_destroy(t, map); 387 } 388 389 static int 390 apbus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf, 391 bus_size_t buflen, struct proc *p, int flags) 392 { 393 int error; 394 395 error = _bus_dmamap_load(t, map, buf, buflen, p, flags); 396 if (error == 0) { 397 if (map->_dm_flags & NEWSMIPS_DMAMAP_MAPTBL) 398 apbus_dma_mapset(t, map); 399 else 400 apbus_dma_unmapped(t, map); 401 } 402 return error; 403 } 404 405 static int 406 apbus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0, 407 int flags) 408 { 409 int error; 410 411 error = _bus_dmamap_load_mbuf(t, map, m0, flags); 412 if (error == 0) { 413 if (map->_dm_flags & NEWSMIPS_DMAMAP_MAPTBL) 414 apbus_dma_mapset(t, map); 415 else 416 apbus_dma_unmapped(t, map); 417 } 418 return error; 419 } 420 421 static int 422 apbus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio, 423 int flags) 424 { 425 int error; 426 427 error = _bus_dmamap_load_uio(t, map, uio, flags); 428 if (error == 0) { 429 if (map->_dm_flags & NEWSMIPS_DMAMAP_MAPTBL) 430 apbus_dma_mapset(t, map); 431 else 432 apbus_dma_unmapped(t, map); 433 } 434 return error; 435 } 436 437 static int 438 apbus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map, 439 bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags) 440 { 441 int error; 442 443 error = _bus_dmamap_load_raw(t, map, segs, nsegs, size, flags); 444 if (error == 0) { 445 if (map->_dm_flags & NEWSMIPS_DMAMAP_MAPTBL) 446 apbus_dma_mapset(t, map); 447 else 448 apbus_dma_unmapped(t, map); 449 } 450 return error; 451 } 452 453 static void 454 apbus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset, 455 bus_size_t len, int ops) 456 { 457 458 /* 459 * Flush DMA cache by issuing IO read for the AProm of specified slot. 460 */ 461 bus_space_read_4(t->_slotbaset, t->_slotbaseh, 0); 462 463 bus_dmamap_sync(&newsmips_default_bus_dma_tag, map, offset, len, ops); 464 } 465 466 struct newsmips_bus_dma_tag apbus_dma_tag = { 467 apbus_dmamap_create, 468 apbus_dmamap_destroy, 469 apbus_dmamap_load, 470 apbus_dmamap_load_mbuf, 471 apbus_dmamap_load_uio, 472 apbus_dmamap_load_raw, 473 _bus_dmamap_unload, 474 apbus_dmamap_sync, 475 _bus_dmamem_alloc, 476 _bus_dmamem_free, 477 _bus_dmamem_map, 478 _bus_dmamem_unmap, 479 _bus_dmamem_mmap, 480 }; 481 482 struct newsmips_bus_dma_tag * 483 apbus_dmatag_init(struct apbus_attach_args *apa) 484 { 485 struct newsmips_bus_dma_tag *dmat; 486 487 dmat = malloc(sizeof(*dmat), M_DEVBUF, M_NOWAIT); 488 if (dmat != NULL) { 489 memcpy(dmat, &apbus_dma_tag, sizeof(*dmat)); 490 dmat->_slotno = apa->apa_slotno; 491 dmat->_slotbaset = 0; 492 dmat->_slotbaseh = apa->apa_hwbase; 493 } 494 return dmat; 495 } 496