xref: /netbsd-src/sys/arch/news68k/include/cpu.h (revision 274254cdae52594c1aa480a736aef78313d15c9c)
1 /*	$NetBSD: cpu.h,v 1.33 2008/02/27 18:26:16 xtraeme Exp $	*/
2 
3 /*
4  * Copyright (c) 1982, 1990, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * the Systems Programming Group of the University of Utah Computer
9  * Science Department.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. Neither the name of the University nor the names of its contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
36  *
37  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
38  */
39 /*
40  * Copyright (c) 1988 University of Utah.
41  *
42  * This code is derived from software contributed to Berkeley by
43  * the Systems Programming Group of the University of Utah Computer
44  * Science Department.
45  *
46  * Redistribution and use in source and binary forms, with or without
47  * modification, are permitted provided that the following conditions
48  * are met:
49  * 1. Redistributions of source code must retain the above copyright
50  *    notice, this list of conditions and the following disclaimer.
51  * 2. Redistributions in binary form must reproduce the above copyright
52  *    notice, this list of conditions and the following disclaimer in the
53  *    documentation and/or other materials provided with the distribution.
54  * 3. All advertising materials mentioning features or use of this software
55  *    must display the following acknowledgement:
56  *	This product includes software developed by the University of
57  *	California, Berkeley and its contributors.
58  * 4. Neither the name of the University nor the names of its contributors
59  *    may be used to endorse or promote products derived from this software
60  *    without specific prior written permission.
61  *
62  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
63  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
64  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
65  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
66  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
67  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
68  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
69  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
70  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
71  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
72  * SUCH DAMAGE.
73  *
74  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
75  *
76  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
77  */
78 
79 #ifndef _NEWS68K_CPU_H_
80 #define _NEWS68K_CPU_H_
81 
82 #if defined(_KERNEL)
83 
84 /*
85  * Exported definitions unique to news68k cpu support.
86  */
87 
88 #if defined(_KERNEL_OPT)
89 #include "opt_lockdebug.h"
90 #endif
91 
92 /*
93  * Get common m68k CPU definitions.
94  */
95 #include <m68k/cpu.h>
96 
97 /*
98  * XXX news1700 L2 cache would be corrupted with DC_BE and IC_BE...
99  * XXX Should these be defined in machine/cpu.h?
100  */
101 #undef CACHE_ON
102 #undef CACHE_CLR
103 #undef IC_CLEAR
104 #undef DC_CLEAR
105 #define CACHE_ON	(DC_WA|DC_CLR|DC_ENABLE|IC_CLR|IC_ENABLE)
106 #define CACHE_CLR	CACHE_ON
107 #define IC_CLEAR	(DC_WA|DC_ENABLE|IC_CLR|IC_ENABLE)
108 #define DC_CLEAR	(DC_WA|DC_CLR|DC_ENABLE|IC_ENABLE)
109 
110 #define DCIC_CLR	(DC_CLR|IC_CLR)
111 #define CACHE_BE	(DC_BE|IC_BE)
112 
113 /*
114  * Get interrupt glue.
115  */
116 #include <machine/intr.h>
117 
118 #include <sys/cpu_data.h>
119 struct cpu_info {
120 	struct cpu_data ci_data;	/* MI per-cpu data */
121 	cpuid_t	ci_cpuid;
122 	int	ci_mtx_count;
123 	int	ci_mtx_oldspl;
124 	int	ci_want_resched;
125 };
126 
127 extern struct cpu_info cpu_info_store;
128 
129 #define	curcpu()			(&cpu_info_store)
130 
131 /*
132  * definitions of cpu-dependent requirements
133  * referenced in generic code
134  */
135 #define cpu_swapin(p)			/* nothing */
136 #define cpu_swapout(p)			/* nothing */
137 #define cpu_number()			0
138 
139 void	cpu_proc_fork(struct proc *, struct proc *);
140 
141 /*
142  * Arguments to hardclock and gatherstats encapsulate the previous
143  * machine state in an opaque clockframe.  One the hp300, we use
144  * what the hardware pushes on an interrupt (frame format 0).
145  */
146 struct clockframe {
147 	u_short	sr;		/* sr at time of interrupt */
148 	u_long	pc;		/* pc at time of interrupt */
149 	u_short	vo;		/* vector offset (4-word frame) */
150 };
151 
152 #define CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
153 #define CLKF_PC(framep)		((framep)->pc)
154 #if 0
155 /* We would like to do it this way... */
156 #define CLKF_INTR(framep)	(((framep)->sr & PSL_M) == 0)
157 #else
158 /* but until we start using PSL_M, we have to do this instead */
159 #include <machine/intr.h>
160 #define CLKF_INTR(framep)	(idepth > 1)	/* XXX */
161 #endif
162 
163 
164 /*
165  * Preempt the current process if in interrupt from user mode,
166  * or after the current trap/syscall if in system mode.
167  */
168 #define cpu_need_resched(ci, flags)	\
169 	do { ci->ci_want_resched = 1; aston(); } while (/* CONSTCOND */0)
170 
171 /*
172  * Give a profiling tick to the current process when the user profiling
173  * buffer pages are invalid.  On the hp300, request an ast to send us
174  * through trap, marking the proc as needing a profiling tick.
175  */
176 #define cpu_need_proftick(l)	\
177 	do { (l)->l_flag |= LP_OWEUPC; aston(); } while (/* CONSTCOND */0)
178 
179 /*
180  * Notify the current process (p) that it has a signal pending,
181  * process as soon as possible.
182  */
183 #define cpu_signotify(l)	aston()
184 
185 extern int astpending;		/* need to trap before returning to user mode */
186 extern volatile u_char *ctrl_ast;
187 #define aston()		\
188 	do { astpending++; *ctrl_ast = 0xff; } while (/* CONSTCOND */0)
189 
190 #endif /* _KERNEL */
191 
192 /*
193  * CTL_MACHDEP definitions.
194  */
195 #define CPU_CONSDEV		1	/* dev_t: console terminal device */
196 #define CPU_MAXID		2	/* number of valid machdep ids */
197 
198 #ifdef _KERNEL
199 
200 #if defined(news1700) || defined(news1200)
201 #ifndef M68030
202 #define M68030
203 #endif
204 #define M68K_MMU_MOTOROLA
205 #endif
206 
207 #if defined(news1700)
208 #define CACHE_HAVE_PAC
209 #endif
210 
211 #endif
212 
213 #ifdef _KERNEL
214 extern int systype;
215 #define NEWS1700	0
216 #define NEWS1200	1
217 
218 extern int cpuspeed;
219 extern char *intiobase, *intiolimit, *extiobase;
220 extern u_int intiobase_phys, intiotop_phys;
221 extern u_int extiobase_phys, extiotop_phys;
222 extern u_int intrcnt[];
223 
224 extern void (*vectab[])(void);
225 
226 struct frame;
227 struct fpframe;
228 
229 /* locore.s functions */
230 void m68881_save(struct fpframe *);
231 void m68881_restore(struct fpframe *);
232 
233 int suline(void *, void *);
234 void loadustp(int);
235 void badtrap(void);
236 void intrhand_vectored(void);
237 int getsr(void);
238 
239 
240 void doboot(int)
241 	__attribute__((__noreturn__));
242 void nmihand(struct frame *);
243 void ecacheon(void);
244 void ecacheoff(void);
245 
246 /* machdep.c functions */
247 int badaddr(void *, int);
248 int badbaddr(void *);
249 
250 #endif
251 
252 /* physical memory sections */
253 #define ROMBASE		0xe0000000
254 
255 #define INTIOBASE1700	0xe0c00000
256 #define INTIOTOP1700	0xe1d00000 /* XXX */
257 #define EXTIOBASE1700	0xf0f00000
258 #define EXTIOTOP1700	0xf1000000 /* XXX */
259 #define CTRL_POWER1700	0xe1380000
260 #define CTRL_LED1700	0xe0dc0000
261 
262 #define INTIOBASE1200	0xe1000000
263 #define INTIOTOP1200	0xe1d00000 /* XXX */
264 #define EXTIOBASE1200	0xe4000000
265 #define EXTIOTOP1200	0xe4020000 /* XXX */
266 #define CTRL_POWER1200	0xe1000000
267 #define CTRL_LED1200	0xe1500001
268 
269 #define MAXADDR		0xfffff000
270 
271 /*
272  * Internal IO space:
273  *
274  * Internal IO space is mapped in the kernel from ``intiobase'' to
275  * ``intiolimit'' (defined in locore.s).  Since it is always mapped,
276  * conversion between physical and kernel virtual addresses is easy.
277  */
278 #define ISIIOVA(va) \
279 	((char *)(va) >= intiobase && (char *)(va) < intiolimit)
280 #define IIOV(pa)	(((u_int)(pa) - intiobase_phys) + (u_int)intiobase)
281 #define ISIIOPA(pa) \
282 	((u_int)(pa) >= intiobase_phys && (u_int)(pa) < intiotop_phys)
283 #define IIOP(va)	(((u_int)(va) - (u_int)intiobase) + intiobase_phys)
284 #define IIOPOFF(pa)	((u_int)(pa) - intiobase_phys)
285 
286 /* XXX EIO space mapping should be modified like hp300 XXX */
287 #define	EIOSIZE		(extiotop_phys - extiobase_phys)
288 #define ISEIOVA(va) \
289 	((char *)(va) >= extiobase && (char *)(va) < (char *)EIOSIZE)
290 #define EIOV(pa)	(((u_int)(pa) - extiobase_phys) + (u_int)extiobase)
291 
292 #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
293 #define M68K_CACHEOPS_MACHDEP
294 #endif
295 
296 #ifdef CACHE_HAVE_PAC
297 #define M68K_CACHEOPS_MACHDEP_PCIA
298 #endif
299 
300 #ifdef CACHE_HAVE_VAC
301 #define M68K_CACHEOPS_MACHDEP_DCIA
302 #define M68K_CACHEOPS_MACHDEP_DCIS
303 #define M68K_CACHEOPS_MACHDEP_DCIU
304 #endif
305 
306 #endif /* !_NEWS68K_CPU_H_ */
307