xref: /netbsd-src/sys/arch/mvme68k/include/cpu.h (revision c2f76ff004a2cb67efe5b12d97bd3ef7fe89e18d)
1 /*	$NetBSD: cpu.h,v 1.45 2010/12/22 02:42:28 matt Exp $	*/
2 
3 /*
4  * Copyright (c) 1982, 1990, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * the Systems Programming Group of the University of Utah Computer
9  * Science Department.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. Neither the name of the University nor the names of its contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
36  *
37  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
38  */
39 /*
40  * Copyright (c) 1988 University of Utah.
41  *
42  * This code is derived from software contributed to Berkeley by
43  * the Systems Programming Group of the University of Utah Computer
44  * Science Department.
45  *
46  * Redistribution and use in source and binary forms, with or without
47  * modification, are permitted provided that the following conditions
48  * are met:
49  * 1. Redistributions of source code must retain the above copyright
50  *    notice, this list of conditions and the following disclaimer.
51  * 2. Redistributions in binary form must reproduce the above copyright
52  *    notice, this list of conditions and the following disclaimer in the
53  *    documentation and/or other materials provided with the distribution.
54  * 3. All advertising materials mentioning features or use of this software
55  *    must display the following acknowledgement:
56  *	This product includes software developed by the University of
57  *	California, Berkeley and its contributors.
58  * 4. Neither the name of the University nor the names of its contributors
59  *    may be used to endorse or promote products derived from this software
60  *    without specific prior written permission.
61  *
62  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
63  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
64  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
65  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
66  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
67  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
68  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
69  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
70  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
71  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
72  * SUCH DAMAGE.
73  *
74  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
75  *
76  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
77  */
78 
79 #ifndef _MACHINE_CPU_H_
80 #define _MACHINE_CPU_H_
81 
82 #if defined(_KERNEL)
83 
84 /*
85  * Exported definitions unique to mvme68k/68k cpu support.
86  */
87 
88 #if defined(_KERNEL_OPT)
89 #include "opt_lockdebug.h"
90 #include "opt_m68k_arch.h"
91 #endif
92 
93 /*
94  * Get common m68k CPU definitions.
95  */
96 #include <m68k/cpu.h>
97 #define	M68K_MMU_MOTOROLA
98 
99 /*
100  * Arguments to hardclock and gatherstats encapsulate the previous
101  * machine state in an opaque clockframe.  One the mvme68k, we use
102  * what the hardware pushes on an interrupt (frame format 0).
103  */
104 struct clockframe {
105 	u_short	sr;		/* sr at time of interrupt */
106 	u_long	pc;		/* pc at time of interrupt */
107 	u_short	fmt:4,
108 		vec:12;		/* vector offset (4-word frame) */
109 } __attribute__((packed));
110 
111 #define	CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
112 #define	CLKF_PC(framep)		((framep)->pc)
113 
114 /*
115  * The clock interrupt handler can determine if it's a nested
116  * interrupt by checking for interrupt_depth > 1.
117  * (Remember, the clock interrupt handler itself will cause the
118  * depth counter to be incremented).
119  */
120 extern volatile unsigned int interrupt_depth;
121 #define	CLKF_INTR(framep)	(interrupt_depth > 1)
122 
123 
124 /*
125  * Preempt the current process if in interrupt from user mode,
126  * or after the current trap/syscall if in system mode.
127  */
128 #define	cpu_need_resched(ci, flags)	\
129 	do { ci->ci_want_resched++; aston(); } while (/* CONSTCOND */0)
130 
131 /*
132  * Give a profiling tick to the current process when the user profiling
133  * buffer pages are invalid.  On the hp300, request an ast to send us
134  * through trap, marking the proc as needing a profiling tick.
135  */
136 #define	cpu_need_proftick(l)	\
137 	do { (l)->l_pflag |= LP_OWEUPC; aston(); } while (/* CONSTCOND */0)
138 
139 /*
140  * Notify the current process (p) that it has a signal pending,
141  * process as soon as possible.
142  */
143 #define	cpu_signotify(l)	aston()
144 
145 extern int astpending;		/* need to trap before returning to user mode */
146 #define aston() (astpending++)
147 
148 #endif /* _KERNEL */
149 
150 /*
151  * CTL_MACHDEP definitions.
152  */
153 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
154 #define	CPU_MAXID		2	/* number of valid machdep ids */
155 
156 #ifdef _KERNEL
157 /*
158  * Associate MVME models with CPU types.
159  */
160 #define	MVME68K		1
161 
162 /*
163  * MVME-147; 68030 CPU
164  */
165 #if defined(MVME147) && !defined(M68030)
166 #define M68030
167 #endif
168 
169 /*
170  * MVME-162/166/167; 68040 CPU
171  */
172 #if (defined(MVME162) || defined(MVME167)) && !defined(M68040)
173 #define M68040
174 #endif
175 
176 /*
177  * MVME-172/177; 68060 CPU
178  */
179 #if (defined(MVME172) || defined(MVME177)) && !defined(M68060)
180 #define M68060
181 #endif
182 #endif /* _KERNEL */
183 
184 /*
185  * Values for machineid; these match the Bug's values.
186  */
187 #define	MVME_147	0x147
188 #define	MVME_162	0x162
189 #define	MVME_166	0x166
190 #define	MVME_167	0x167
191 #define	MVME_172	0x172
192 #define	MVME_177	0x177
193 
194 #ifdef _KERNEL
195 extern	int machineid;
196 extern	int cpuspeed;
197 extern	char *intiobase, *intiolimit;
198 extern	u_int intiobase_phys, intiotop_phys;
199 extern	u_long ether_data_buff_size;
200 extern	u_char mvme_ea[6];
201 
202 void	doboot(int)
203 	__attribute__((__noreturn__));
204 int	nmihand(void *);
205 void	mvme68k_abort(const char *);
206 void	*iomap(u_long, size_t);
207 void	iounmap(void *, size_t);
208 void	loadustp(paddr_t);
209 
210 /* physical memory addresses where mvme147's onboard devices live */
211 #define	INTIOBASE147	(0xfffe0000u)
212 #define	INTIOTOP147	(0xfffe5000u)
213 
214 /* ditto for mvme1[67][27] */
215 #define	INTIOBASE1xx	(0xfff40000u)
216 #define	INTIOTOP1xx	(0xfffd0000u)
217 
218 #endif /* _KERNEL */
219 
220 #endif /* _MACHINE_CPU_H_ */
221