xref: /netbsd-src/sys/arch/mvme68k/dev/zsvar.h (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /*	$NetBSD: zsvar.h,v 1.12 2008/04/28 20:23:29 martin Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * Non-exported definitons common to the different attachment
34  * types for the SCC on the Motorola MVME series of computers.
35  */
36 
37 /*
38  * The MVME-147 provides a 5 MHz clock to the SCC chips.
39  */
40 #define PCLK_147	5000000		/* PCLK pin input clock rate */
41 
42 /*
43  * The MVME-162 provides a 10 MHz clock to the SCC chips.
44  */
45 #define PCLK_162	10000000	/* PCLK pin input clock rate */
46 
47 /*
48  * SCC should interrupt host at level 4.
49  */
50 #define ZSHARD_PRI	4
51 
52 /*
53  * No delay needed when writing SCC registers.
54  */
55 #define ZS_DELAY()
56 
57 /*
58  * XXX Make cnprobe a little easier.
59  */
60 #define NZSC	2
61 
62 /*
63  * The layout of this is hardware-dependent (padding, order).
64  */
65 struct zschan {
66 	volatile u_char *zc_csr;	/* ctrl,status, and indirect access */
67 	volatile u_char *zc_data;	/* data */
68 };
69 
70 struct zsdevice {
71 	/* Yes, they are backwards. */
72 	struct	zschan zs_chan_b;
73 	struct	zschan zs_chan_a;
74 };
75 
76 /* Globals exported from zs.c */
77 extern	u_char zs_init_reg[];
78 
79 /* Functions exported to ASIC-specific drivers. */
80 void	zs_config(struct zsc_softc *, struct zsdevice *, int, int);
81 void	zs_cnconfig(int, int, struct zsdevice *, int);
82 #ifdef MVME147
83 int	zshard_shared(void *);
84 #endif
85 #if defined(MVME162) || defined(MVME172)
86 int	zshard_unshared(void *);
87 #endif
88