1 /* $NetBSD: vme_pcc.c,v 1.17 2002/10/02 05:28:15 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1996-2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe and Steve C. Woodford. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * VME support specific to the Type 1 VMEchip found on the 41 * MVME-147. 42 * 43 * For a manual on the MVME-147, call: 408.991.8634. (Yes, this 44 * is the Sunnyvale sales office.) 45 */ 46 47 #include <sys/param.h> 48 #include <sys/kernel.h> 49 #include <sys/systm.h> 50 #include <sys/device.h> 51 #include <sys/malloc.h> 52 #include <sys/kcore.h> 53 54 #include <machine/cpu.h> 55 #include <machine/bus.h> 56 57 #include <dev/vme/vmereg.h> 58 #include <dev/vme/vmevar.h> 59 60 #include <mvme68k/dev/pccreg.h> 61 #include <mvme68k/dev/pccvar.h> 62 63 #include <dev/mvme/mvmebus.h> 64 #include <mvme68k/dev/vme_pccreg.h> 65 #include <mvme68k/dev/vme_pccvar.h> 66 67 68 int vme_pcc_match(struct device *, struct cfdata *, void *); 69 void vme_pcc_attach(struct device *, struct device *, void *); 70 71 CFATTACH_DECL(vmepcc, sizeof(struct vme_pcc_softc), 72 vme_pcc_match, vme_pcc_attach, NULL, NULL); 73 74 extern struct cfdriver vmepcc_cd; 75 76 extern phys_ram_seg_t mem_clusters[]; 77 static int vme_pcc_attached; 78 79 void vme_pcc_intr_establish(void *, int, int, int, int, 80 int (*)(void *), void *, struct evcnt *); 81 void vme_pcc_intr_disestablish(void *, int, int, int, struct evcnt *); 82 83 84 static struct mvmebus_range vme_pcc_masters[] = { 85 {VME_AM_A24 | 86 MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG | 87 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 88 VME_D32 | VME_D16 | VME_D8, 89 VME1_A24D32_LOC_START, 90 VME1_A24_MASK, 91 VME1_A24D32_START, 92 VME1_A24D32_END}, 93 94 {VME_AM_A32 | 95 MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG | 96 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 97 VME_D32 | VME_D16 | VME_D8, 98 VME1_A32D32_LOC_START, 99 VME1_A32_MASK, 100 VME1_A32D32_START, 101 VME1_A32D32_END}, 102 103 {VME_AM_A24 | 104 MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG | 105 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 106 VME_D16 | VME_D8, 107 VME1_A24D16_LOC_START, 108 VME1_A24_MASK, 109 VME1_A24D16_START, 110 VME1_A24D16_END}, 111 112 {VME_AM_A32 | 113 MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG | 114 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 115 VME_D16 | VME_D8, 116 VME1_A32D16_LOC_START, 117 VME1_A32_MASK, 118 VME1_A32D16_START, 119 VME1_A32D16_END}, 120 121 {VME_AM_A16 | 122 MVMEBUS_AM_CAP_DATA | 123 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 124 VME_D16 | VME_D8, 125 VME1_A16D16_LOC_START, 126 VME1_A16_MASK, 127 VME1_A16D16_START, 128 VME1_A16D16_END} 129 }; 130 #define VME1_NMASTERS (sizeof(vme_pcc_masters)/sizeof(struct mvmebus_range)) 131 132 133 /* ARGSUSED */ 134 int 135 vme_pcc_match(parent, cf, aux) 136 struct device *parent; 137 struct cfdata *cf; 138 void *aux; 139 { 140 struct pcc_attach_args *pa; 141 142 pa = aux; 143 144 /* Only one VME chip, please. */ 145 if (vme_pcc_attached) 146 return (0); 147 148 if (strcmp(pa->pa_name, vmepcc_cd.cd_name)) 149 return (0); 150 151 return (1); 152 } 153 154 void 155 vme_pcc_attach(parent, self, aux) 156 struct device *parent; 157 struct device *self; 158 void *aux; 159 { 160 struct pcc_attach_args *pa; 161 struct vme_pcc_softc *sc; 162 vme_am_t am; 163 u_int8_t reg; 164 165 sc = (struct vme_pcc_softc *) self; 166 pa = aux; 167 168 /* Map the VMEchip's registers */ 169 bus_space_map(pa->pa_bust, pa->pa_offset, VME1REG_SIZE, 0, 170 &sc->sc_bush); 171 172 /* Initialise stuff used by the mvme68k common VMEbus front-end */ 173 sc->sc_mvmebus.sc_bust = pa->pa_bust; 174 sc->sc_mvmebus.sc_dmat = pa->pa_dmat; 175 sc->sc_mvmebus.sc_chip = sc; 176 sc->sc_mvmebus.sc_nmasters = VME1_NMASTERS; 177 sc->sc_mvmebus.sc_masters = &vme_pcc_masters[0]; 178 sc->sc_mvmebus.sc_nslaves = VME1_NSLAVES; 179 sc->sc_mvmebus.sc_slaves = &sc->sc_slave[0]; 180 sc->sc_mvmebus.sc_intr_establish = vme_pcc_intr_establish; 181 sc->sc_mvmebus.sc_intr_disestablish = vme_pcc_intr_disestablish; 182 183 /* Initialize the chip. */ 184 reg = vme1_reg_read(sc, VME1REG_SCON) & ~VME1_SCON_SYSFAIL; 185 vme1_reg_write(sc, VME1REG_SCON, reg); 186 187 printf(": Type 1 VMEchip, scon jumper %s\n", 188 (reg & VME1_SCON_SWITCH) ? "enabled" : "disabled"); 189 190 /* 191 * Adjust the start address of the first range in vme_pcc_masters[] 192 * according to how much onboard memory exists. Disable the first 193 * range if onboard memory >= 16Mb, and adjust the start of the 194 * second range (A32D32). 195 */ 196 vme_pcc_masters[0].vr_vmestart = (vme_addr_t) mem_clusters[0].size; 197 if (mem_clusters[0].size >= 0x01000000) { 198 vme_pcc_masters[0].vr_am = MVMEBUS_AM_DISABLED; 199 vme_pcc_masters[1].vr_vmestart += 200 (vme_addr_t) (mem_clusters[0].size - 0x01000000); 201 } 202 203 am = 0; 204 reg = vme1_reg_read(sc, VME1REG_SLADDRMOD); 205 if ((reg & VME1_SLMOD_DATA) != 0) 206 am |= MVMEBUS_AM_CAP_DATA; 207 if ((reg & VME1_SLMOD_PRGRM) != 0) 208 am |= MVMEBUS_AM_CAP_PROG; 209 if ((reg & VME1_SLMOD_SUPER) != 0) 210 am |= MVMEBUS_AM_CAP_SUPER; 211 if ((reg & VME1_SLMOD_USER) != 0) 212 am |= MVMEBUS_AM_CAP_USER; 213 if ((reg & VME1_SLMOD_BLOCK) != 0) 214 am |= MVMEBUS_AM_CAP_BLK; 215 216 #ifdef notyet 217 if ((reg & VME1_SLMOD_SHORT) != 0) { 218 sc->sc_slave[VME1_SLAVE_A16].vr_am = am | VME_AM_A16; 219 sc->sc_slave[VME1_SLAVE_A16].vr_mask = 0xffffu; 220 } else 221 #endif 222 sc->sc_slave[VME1_SLAVE_A16].vr_am = MVMEBUS_AM_DISABLED; 223 224 if (pcc_slave_base_addr < 0x01000000u && (reg & VME1_SLMOD_STND) != 0) { 225 sc->sc_slave[VME1_SLAVE_A24].vr_am = am | VME_AM_A24; 226 sc->sc_slave[VME1_SLAVE_A24].vr_datasize = VME_D32 | 227 VME_D16 | VME_D8; 228 sc->sc_slave[VME1_SLAVE_A24].vr_mask = 0xffffffu; 229 sc->sc_slave[VME1_SLAVE_A24].vr_locstart = 0; 230 sc->sc_slave[VME1_SLAVE_A24].vr_vmestart = pcc_slave_base_addr; 231 sc->sc_slave[VME1_SLAVE_A24].vr_vmeend = (pcc_slave_base_addr + 232 mem_clusters[0].size - 1) & 0x00ffffffu; 233 } else 234 sc->sc_slave[VME1_SLAVE_A24].vr_am = MVMEBUS_AM_DISABLED; 235 236 if ((reg & VME1_SLMOD_EXTED) != 0) { 237 sc->sc_slave[VME1_SLAVE_A32].vr_am = am | VME_AM_A32; 238 sc->sc_slave[VME1_SLAVE_A32].vr_datasize = VME_D32 | 239 VME_D16 | VME_D8; 240 sc->sc_slave[VME1_SLAVE_A32].vr_mask = 0xffffffffu; 241 sc->sc_slave[VME1_SLAVE_A32].vr_locstart = 0; 242 sc->sc_slave[VME1_SLAVE_A32].vr_vmestart = pcc_slave_base_addr; 243 sc->sc_slave[VME1_SLAVE_A32].vr_vmeend = 244 pcc_slave_base_addr + mem_clusters[0].size - 1; 245 } else 246 sc->sc_slave[VME1_SLAVE_A32].vr_am = MVMEBUS_AM_DISABLED; 247 248 vme_pcc_attached = 1; 249 250 mvmebus_attach(&sc->sc_mvmebus); 251 } 252 253 void 254 vme_pcc_intr_establish(csc, prior, level, vector, first, func, arg, evcnt) 255 void *csc; 256 int prior, level, vector, first; 257 int (*func)(void *); 258 void *arg; 259 struct evcnt *evcnt; 260 { 261 struct vme_pcc_softc *sc = csc; 262 263 if (prior != level) 264 panic("vme_pcc_intr_establish: cpu priority != VMEbus irq level"); 265 266 isrlink_vectored(func, arg, prior, vector, evcnt); 267 268 if (first) { 269 evcnt_attach_dynamic(evcnt, EVCNT_TYPE_INTR, 270 isrlink_evcnt(prior), sc->sc_mvmebus.sc_dev.dv_xname, 271 mvmebus_irq_name[level]); 272 273 /* 274 * There had better not be another VMEbus master responding 275 * to this interrupt level... 276 */ 277 vme1_reg_write(sc, VME1REG_IRQEN, 278 vme1_reg_read(sc, VME1REG_IRQEN) | VME1_IRQ_VME(level)); 279 } 280 } 281 282 void 283 vme_pcc_intr_disestablish(csc, level, vector, last, evcnt) 284 void *csc; 285 int level, vector, last; 286 struct evcnt *evcnt; 287 { 288 struct vme_pcc_softc *sc = csc; 289 290 isrunlink_vectored(vector); 291 292 if (last) { 293 vme1_reg_write(sc, VME1REG_IRQEN, 294 vme1_reg_read(sc, VME1REG_IRQEN) & ~VME1_IRQ_VME(level)); 295 evcnt_detach(evcnt); 296 } 297 } 298