xref: /netbsd-src/sys/arch/mvme68k/dev/pcc.c (revision 274254cdae52594c1aa480a736aef78313d15c9c)
1 /*	$NetBSD: pcc.c,v 1.30 2008/04/28 20:23:29 martin Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe and Steve C. Woodford.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * Copyright (c) 1995 Charles D. Cranor
34  * All rights reserved.
35  *
36  * Redistribution and use in source and binary forms, with or without
37  * modification, are permitted provided that the following conditions
38  * are met:
39  * 1. Redistributions of source code must retain the above copyright
40  *    notice, this list of conditions and the following disclaimer.
41  * 2. Redistributions in binary form must reproduce the above copyright
42  *    notice, this list of conditions and the following disclaimer in the
43  *    documentation and/or other materials provided with the distribution.
44  * 3. All advertising materials mentioning features or use of this software
45  *    must display the following acknowledgement:
46  *      This product includes software developed by Charles D. Cranor.
47  * 4. The name of the author may not be used to endorse or promote products
48  *    derived from this software without specific prior written permission.
49  *
50  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
51  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
52  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
53  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
54  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
55  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
56  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
57  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
58  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
59  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
60  */
61 
62 /*
63  * peripheral channel controller
64  */
65 
66 #include <sys/cdefs.h>
67 __KERNEL_RCSID(0, "$NetBSD: pcc.c,v 1.30 2008/04/28 20:23:29 martin Exp $");
68 
69 #include <sys/param.h>
70 #include <sys/kernel.h>
71 #include <sys/systm.h>
72 #include <sys/device.h>
73 #include <sys/kcore.h>
74 
75 #include <machine/cpu.h>
76 #include <machine/bus.h>
77 
78 #include <mvme68k/dev/mainbus.h>
79 #include <mvme68k/dev/pccreg.h>
80 #include <mvme68k/dev/pccvar.h>
81 
82 #include "ioconf.h"
83 
84 /*
85  * Autoconfiguration stuff for the PCC chip on mvme147
86  */
87 
88 void pccattach(struct device *, struct device *, void *);
89 int pccmatch(struct device *, struct cfdata *, void *);
90 int pccprint(void *, const char *);
91 
92 CFATTACH_DECL(pcc, sizeof(struct pcc_softc),
93     pccmatch, pccattach, NULL, NULL);
94 
95 static int pccintr(void *);
96 static int pccsoftintr(void *);
97 #ifdef notyet
98 static void pccsoftintrassert(void);
99 #endif
100 
101 /*
102  * Structure used to describe a device for autoconfiguration purposes.
103  */
104 struct pcc_device {
105 	const char *pcc_name;	/* name of device (e.g. "clock") */
106 	bus_addr_t pcc_offset;	/* offset from PCC base */
107 };
108 
109 /*
110  * Devices that live on the PCC, attached in this order.
111  */
112 static const struct pcc_device pcc_devices[] = {
113 	{"clock", 0},
114 	{"zsc", PCC_ZS0_OFF},
115 	{"zsc", PCC_ZS1_OFF},
116 	{"le", PCC_LE_OFF},
117 	{"wdsc", PCC_WDSC_OFF},
118 	{"lpt", PCC_LPT_OFF},
119 	{"vmepcc", PCC_VME_OFF},
120 	{NULL, 0},
121 };
122 
123 static int pcc_vec2intctrl[] = {
124 	PCCREG_ACFAIL_INTR_CTRL,/* PCCV_ACFAIL */
125 	PCCREG_BUSERR_INTR_CTRL,/* PCCV_BERR */
126 	PCCREG_ABORT_INTR_CTRL,	/* PCCV_ABORT */
127 	PCCREG_SERIAL_INTR_CTRL,/* PCCV_ZS */
128 	PCCREG_LANCE_INTR_CTRL,	/* PCCV_LE */
129 	PCCREG_SCSI_INTR_CTRL,	/* PCCV_SCSI */
130 	PCCREG_DMA_INTR_CTRL,	/* PCCV_DMA */
131 	PCCREG_PRNT_INTR_CTRL,	/* PCCV_PRINTER */
132 	PCCREG_TMR1_INTR_CTRL,	/* PCCV_TIMER1 */
133 	PCCREG_TMR2_INTR_CTRL,	/* PCCV_TIMER2 */
134 	PCCREG_SOFT1_INTR_CTRL,	/* PCCV_SOFT1 */
135 	PCCREG_SOFT2_INTR_CTRL	/* PCCV_SOFT2 */
136 };
137 
138 extern phys_ram_seg_t mem_clusters[];
139 struct pcc_softc *sys_pcc;
140 
141 /* The base address of the MVME147 from the VMEbus */
142 bus_addr_t pcc_slave_base_addr;
143 
144 
145 /* ARGSUSED */
146 int
147 pccmatch(struct device *parent, struct cfdata *cf, void *args)
148 {
149 	struct mainbus_attach_args *ma;
150 
151 	ma = args;
152 
153 	/* Only attach one PCC. */
154 	if (sys_pcc)
155 		return 0;
156 
157 	return strcmp(ma->ma_name, pcc_cd.cd_name) == 0;
158 }
159 
160 /* ARGSUSED */
161 void
162 pccattach(struct device *parent, struct device *self, void *args)
163 {
164 	struct mainbus_attach_args *ma;
165 	struct pcc_attach_args npa;
166 	struct pcc_softc *sc;
167 	uint8_t reg;
168 	int i;
169 
170 	ma = args;
171 	sc = sys_pcc = (struct pcc_softc *)self;
172 
173 	/* Get a handle to the PCC's registers. */
174 	sc->sc_bust = ma->ma_bust;
175 	bus_space_map(sc->sc_bust, ma->ma_offset, PCCREG_SIZE, 0, &sc->sc_bush);
176 
177 	/* Tell the chip the base interrupt vector */
178 	pcc_reg_write(sc, PCCREG_VECTOR_BASE, PCC_VECBASE);
179 
180 	printf(": Peripheral Channel Controller, "
181 	    "rev %d, vecbase 0x%x\n", pcc_reg_read(sc, PCCREG_REVISION),
182 	    pcc_reg_read(sc, PCCREG_VECTOR_BASE));
183 
184 	evcnt_attach_dynamic(&sc->sc_evcnt, EVCNT_TYPE_INTR,
185 	    isrlink_evcnt(7), "nmi", "abort sw");
186 
187 	/* Hook up interrupt handler for abort button, and enable it */
188 	pccintr_establish(PCCV_ABORT, pccintr, 7, NULL, &sc->sc_evcnt);
189 	pcc_reg_write(sc, PCCREG_ABORT_INTR_CTRL,
190 	    PCC_ABORT_IEN | PCC_ABORT_ACK);
191 
192 	/*
193 	 * Install a handler for Software Interrupt 1
194 	 * and arrange to schedule soft interrupts on demand.
195 	 */
196 	pccintr_establish(PCCV_SOFT1, pccsoftintr, 1, sc, &sc->sc_evcnt);
197 #ifdef notyet
198 	_softintr_chipset_assert = pccsoftintrassert;
199 #endif
200 
201 	/* Make sure the global interrupt line is hot. */
202 	reg = pcc_reg_read(sc, PCCREG_GENERAL_CONTROL) | PCC_GENCR_IEN;
203 	pcc_reg_write(sc, PCCREG_GENERAL_CONTROL, reg);
204 
205 	/*
206 	 * Calculate the board's VMEbus slave base address, for the
207 	 * benefit of the VMEchip driver.
208 	 * (Weird that this register is in the PCC ...)
209 	 */
210 	reg = pcc_reg_read(sc, PCCREG_SLAVE_BASE_ADDR) & PCC_SLAVE_BASE_MASK;
211 	pcc_slave_base_addr = (bus_addr_t)reg * mem_clusters[0].size;
212 
213 	/*
214 	 * Attach configured children.
215 	 */
216 	npa._pa_base = ma->ma_offset;
217 	for (i = 0; pcc_devices[i].pcc_name != NULL; ++i) {
218 		/*
219 		 * Note that IPL is filled in by match function.
220 		 */
221 		npa.pa_name = pcc_devices[i].pcc_name;
222 		npa.pa_ipl = -1;
223 		npa.pa_dmat = ma->ma_dmat;
224 		npa.pa_bust = ma->ma_bust;
225 		npa.pa_offset = pcc_devices[i].pcc_offset + ma->ma_offset;
226 
227 		/* Attach the device if configured. */
228 		(void)config_found(self, &npa, pccprint);
229 	}
230 }
231 
232 int
233 pccprint(void *aux, const char *cp)
234 {
235 	struct pcc_attach_args *pa;
236 
237 	pa = aux;
238 
239 	if (cp)
240 		aprint_normal("%s at %s", pa->pa_name, cp);
241 
242 	aprint_normal(" offset 0x%lx", pa->pa_offset - pa->_pa_base);
243 	if (pa->pa_ipl != -1)
244 		aprint_normal(" ipl %d", pa->pa_ipl);
245 
246 	return UNCONF;
247 }
248 
249 /*
250  * pccintr_establish: establish pcc interrupt
251  */
252 void
253 pccintr_establish(int pccvec, int (*hand)(void *), int lvl, void *arg,
254     struct evcnt *evcnt)
255 {
256 
257 #ifdef DEBUG
258 	if (pccvec < 0 || pccvec >= PCC_NVEC) {
259 		printf("pcc: illegal vector offset: 0x%x\n", pccvec);
260 		panic("pccintr_establish");
261 	}
262 	if (lvl < 1 || lvl > 7) {
263 		printf("pcc: illegal interrupt level: %d\n", lvl);
264 		panic("pccintr_establish");
265 	}
266 #endif
267 
268 	isrlink_vectored(hand, arg, lvl, pccvec + PCC_VECBASE, evcnt);
269 }
270 
271 void
272 pccintr_disestablish(int pccvec)
273 {
274 
275 #ifdef DEBUG
276 	if (pccvec < 0 || pccvec >= PCC_NVEC) {
277 		printf("pcc: illegal vector offset: 0x%x\n", pccvec);
278 		panic("pccintr_disestablish");
279 	}
280 #endif
281 
282 	/* Disable the interrupt */
283 	pcc_reg_write(sys_pcc, pcc_vec2intctrl[pccvec], PCC_ICLEAR);
284 	isrunlink_vectored(pccvec + PCC_VECBASE);
285 }
286 
287 /*
288  * Handle NMI from abort switch.
289  */
290 static int
291 pccintr(void *frame)
292 {
293 
294 	/* XXX wait until button pops out */
295 	pcc_reg_write(sys_pcc, PCCREG_ABORT_INTR_CTRL,
296 	    PCC_ABORT_IEN | PCC_ABORT_ACK);
297 
298 	return nmihand(frame);
299 }
300 
301 #ifdef notyet
302 static void
303 pccsoftintrassert(void)
304 {
305 
306 	/* Request a software interrupt at ipl 1 */
307 	pcc_reg_write(sys_pcc, PCCREG_SOFT1_INTR_CTRL, 1 | PCC_IENABLE);
308 }
309 #endif
310 
311 /*
312  * Handle PCC soft interrupt #1
313  */
314 static int
315 pccsoftintr(void *arg)
316 {
317 	struct pcc_softc *sc = arg;
318 
319 	/* Clear the interrupt */
320 	pcc_reg_write(sc, PCCREG_SOFT1_INTR_CTRL, 0);
321 
322 #ifdef notyet
323 	/* Call the soft interrupt dispatcher */
324 	softintr_dispatch();
325 #endif
326 
327 	return 1;
328 }
329