1 /* $NetBSD: clock_pcc.c,v 1.6 2000/03/18 22:33:02 scw Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Glue for the Peripheral Channel Controller timers and the 41 * Mostek clock chip found on the MVME-147. 42 */ 43 44 #include <sys/param.h> 45 #include <sys/kernel.h> 46 #include <sys/systm.h> 47 #include <sys/device.h> 48 49 #include <machine/psl.h> 50 #include <machine/bus.h> 51 52 #include <mvme68k/mvme68k/clockreg.h> 53 #include <mvme68k/mvme68k/clockvar.h> 54 #include <mvme68k/dev/pccreg.h> 55 #include <mvme68k/dev/pccvar.h> 56 57 int clock_pcc_match __P((struct device *, struct cfdata *, void *)); 58 void clock_pcc_attach __P((struct device *, struct device *, void *)); 59 60 struct clock_pcc_softc { 61 struct device sc_dev; 62 struct clock_attach_args sc_clock_args; 63 u_char sc_clock_lvl; 64 }; 65 66 struct cfattach clock_pcc_ca = { 67 sizeof(struct clock_pcc_softc), clock_pcc_match, clock_pcc_attach 68 }; 69 70 extern struct cfdriver clock_cd; 71 72 73 static int clock_pcc_profintr __P((void *)); 74 static int clock_pcc_statintr __P((void *)); 75 static void clock_pcc_initclocks __P((void *, int, int)); 76 static void clock_pcc_shutdown __P((void *)); 77 78 static struct clock_pcc_softc *clock_pcc_sc; 79 80 /* ARGSUSED */ 81 int 82 clock_pcc_match(parent, cf, aux) 83 struct device *parent; 84 struct cfdata *cf; 85 void *aux; 86 { 87 struct pcc_attach_args *pa; 88 89 pa = aux; 90 91 /* Only one clock, please. */ 92 if (clock_pcc_sc) 93 return (0); 94 95 if (strcmp(pa->pa_name, clock_cd.cd_name)) 96 return (0); 97 98 pa->pa_ipl = cf->pcccf_ipl; 99 100 return (1); 101 } 102 103 /* ARGSUSED */ 104 void 105 clock_pcc_attach(parent, self, aux) 106 struct device *parent; 107 struct device *self; 108 void *aux; 109 { 110 struct pcc_attach_args *pa; 111 struct clock_pcc_softc *sc; 112 113 sc = (struct clock_pcc_softc *) self; 114 pa = aux; 115 116 if (pa->pa_ipl != CLOCK_LEVEL) 117 panic("clock_pcc_attach: wrong interrupt level"); 118 119 clock_pcc_sc = sc; 120 121 /* Map the RTC's registers */ 122 sc->sc_clock_args.ca_bust = pa->pa_bust; 123 bus_space_map(pa->pa_bust, pa->pa_offset, 124 MK48T_REGSIZE, 0, &sc->sc_clock_args.ca_bush); 125 126 sc->sc_clock_args.ca_arg = sc; 127 sc->sc_clock_args.ca_initfunc = clock_pcc_initclocks; 128 129 /* Do common portions of clock config. */ 130 clock_config(self, &sc->sc_clock_args); 131 132 /* Ensure our interrupts get disabled at shutdown time. */ 133 (void) shutdownhook_establish(clock_pcc_shutdown, NULL); 134 135 /* Attach the interrupt handlers. */ 136 pccintr_establish(PCCV_TIMER1, clock_pcc_profintr, pa->pa_ipl, NULL); 137 pccintr_establish(PCCV_TIMER2, clock_pcc_statintr, pa->pa_ipl, NULL); 138 sc->sc_clock_lvl = pa->pa_ipl | PCC_IENABLE | PCC_TIMERACK; 139 } 140 141 void 142 clock_pcc_initclocks(arg, proftick, stattick) 143 void *arg; 144 int proftick; 145 int stattick; 146 { 147 struct clock_pcc_softc *sc = arg; 148 149 pcc_reg_write16(sys_pcc, PCCREG_TMR1_PRELOAD, 150 pcc_timer_us2lim(proftick)); 151 pcc_reg_write(sys_pcc, PCCREG_TMR1_CONTROL, PCC_TIMERCLEAR); 152 pcc_reg_write(sys_pcc, PCCREG_TMR1_CONTROL, PCC_TIMERSTART); 153 pcc_reg_write(sys_pcc, PCCREG_TMR1_INTR_CTRL, sc->sc_clock_lvl); 154 155 pcc_reg_write16(sys_pcc, PCCREG_TMR2_PRELOAD, 156 pcc_timer_us2lim(stattick)); 157 pcc_reg_write(sys_pcc, PCCREG_TMR2_CONTROL, PCC_TIMERCLEAR); 158 pcc_reg_write(sys_pcc, PCCREG_TMR2_CONTROL, PCC_TIMERSTART); 159 pcc_reg_write(sys_pcc, PCCREG_TMR2_INTR_CTRL, sc->sc_clock_lvl); 160 } 161 162 int 163 clock_pcc_profintr(frame) 164 void *frame; 165 { 166 167 pcc_reg_write(sys_pcc, PCCREG_TMR1_INTR_CTRL, 168 clock_pcc_sc->sc_clock_lvl); 169 hardclock(frame); 170 clock_profcnt.ev_count++; 171 return (1); 172 } 173 174 int 175 clock_pcc_statintr(frame) 176 void *frame; 177 { 178 179 /* Disable the timer interrupt while we handle it. */ 180 pcc_reg_write(sys_pcc, PCCREG_TMR2_INTR_CTRL, 0); 181 182 statclock((struct clockframe *) frame); 183 184 pcc_reg_write16(sys_pcc, PCCREG_TMR2_PRELOAD, 185 pcc_timer_us2lim(CLOCK_NEWINT(clock_statvar, clock_statmin))); 186 pcc_reg_write(sys_pcc, PCCREG_TMR2_CONTROL, PCC_TIMERCLEAR); 187 pcc_reg_write(sys_pcc, PCCREG_TMR2_CONTROL, PCC_TIMERSTART); 188 189 pcc_reg_write(sys_pcc, PCCREG_TMR2_INTR_CTRL, 190 clock_pcc_sc->sc_clock_lvl); 191 192 clock_statcnt.ev_count++; 193 return (1); 194 } 195 196 /* ARGSUSED */ 197 void 198 clock_pcc_shutdown(arg) 199 void *arg; 200 { 201 202 /* Make sure the timer interrupts are turned off. */ 203 pcc_reg_write(sys_pcc, PCCREG_TMR1_CONTROL, PCC_TIMERCLEAR); 204 pcc_reg_write(sys_pcc, PCCREG_TMR1_INTR_CTRL, 0); 205 pcc_reg_write(sys_pcc, PCCREG_TMR2_CONTROL, PCC_TIMERCLEAR); 206 pcc_reg_write(sys_pcc, PCCREG_TMR2_INTR_CTRL, 0); 207 } 208