1 /* $NetBSD: clock_pcc.c,v 1.10 2001/08/12 18:33:13 scw Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Glue for the Peripheral Channel Controller timers and the 41 * Mostek clock chip found on the MVME-147. 42 */ 43 44 #include <sys/param.h> 45 #include <sys/kernel.h> 46 #include <sys/systm.h> 47 #include <sys/device.h> 48 49 #include <machine/psl.h> 50 #include <machine/bus.h> 51 52 #include <mvme68k/mvme68k/clockvar.h> 53 #include <mvme68k/dev/pccreg.h> 54 #include <mvme68k/dev/pccvar.h> 55 56 int clock_pcc_match __P((struct device *, struct cfdata *, void *)); 57 void clock_pcc_attach __P((struct device *, struct device *, void *)); 58 59 struct clock_pcc_softc { 60 struct device sc_dev; 61 struct clock_attach_args sc_clock_args; 62 u_char sc_clock_lvl; 63 }; 64 65 struct cfattach clock_pcc_ca = { 66 sizeof(struct clock_pcc_softc), clock_pcc_match, clock_pcc_attach 67 }; 68 69 extern struct cfdriver clock_cd; 70 71 72 static int clock_pcc_profintr __P((void *)); 73 static int clock_pcc_statintr __P((void *)); 74 static void clock_pcc_initclocks __P((void *, int, int)); 75 static long clock_pcc_microtime __P((void *)); 76 static void clock_pcc_shutdown __P((void *)); 77 78 static struct clock_pcc_softc *clock_pcc_sc; 79 80 /* ARGSUSED */ 81 int 82 clock_pcc_match(parent, cf, aux) 83 struct device *parent; 84 struct cfdata *cf; 85 void *aux; 86 { 87 struct pcc_attach_args *pa; 88 89 pa = aux; 90 91 /* Only one clock, please. */ 92 if (clock_pcc_sc) 93 return (0); 94 95 if (strcmp(pa->pa_name, clock_cd.cd_name)) 96 return (0); 97 98 pa->pa_ipl = cf->pcccf_ipl; 99 100 return (1); 101 } 102 103 /* ARGSUSED */ 104 void 105 clock_pcc_attach(parent, self, aux) 106 struct device *parent; 107 struct device *self; 108 void *aux; 109 { 110 struct pcc_attach_args *pa; 111 struct clock_pcc_softc *sc; 112 113 sc = (struct clock_pcc_softc *) self; 114 pa = aux; 115 116 if (pa->pa_ipl != CLOCK_LEVEL) 117 panic("clock_pcc_attach: wrong interrupt level"); 118 119 clock_pcc_sc = sc; 120 sc->sc_clock_args.ca_arg = sc; 121 sc->sc_clock_args.ca_initfunc = clock_pcc_initclocks; 122 sc->sc_clock_args.ca_microtime = clock_pcc_microtime; 123 124 /* Do common portions of clock config. */ 125 clock_config(self, &sc->sc_clock_args, pccintr_evcnt(pa->pa_ipl)); 126 127 /* Ensure our interrupts get disabled at shutdown time. */ 128 (void) shutdownhook_establish(clock_pcc_shutdown, NULL); 129 130 /* Attach the interrupt handlers. */ 131 pccintr_establish(PCCV_TIMER1, clock_pcc_profintr, pa->pa_ipl, 132 NULL, &clock_profcnt); 133 pccintr_establish(PCCV_TIMER2, clock_pcc_statintr, pa->pa_ipl, 134 NULL, &clock_statcnt); 135 sc->sc_clock_lvl = pa->pa_ipl | PCC_IENABLE | PCC_TIMERACK; 136 } 137 138 void 139 clock_pcc_initclocks(arg, proftick, stattick) 140 void *arg; 141 int proftick; 142 int stattick; 143 { 144 struct clock_pcc_softc *sc = arg; 145 146 pcc_reg_write16(sys_pcc, PCCREG_TMR1_PRELOAD, 147 pcc_timer_us2lim(proftick)); 148 pcc_reg_write(sys_pcc, PCCREG_TMR1_CONTROL, PCC_TIMERCLEAR); 149 pcc_reg_write(sys_pcc, PCCREG_TMR1_CONTROL, PCC_TIMERSTART); 150 pcc_reg_write(sys_pcc, PCCREG_TMR1_INTR_CTRL, sc->sc_clock_lvl); 151 152 pcc_reg_write16(sys_pcc, PCCREG_TMR2_PRELOAD, 153 pcc_timer_us2lim(stattick)); 154 pcc_reg_write(sys_pcc, PCCREG_TMR2_CONTROL, PCC_TIMERCLEAR); 155 pcc_reg_write(sys_pcc, PCCREG_TMR2_CONTROL, PCC_TIMERSTART); 156 pcc_reg_write(sys_pcc, PCCREG_TMR2_INTR_CTRL, sc->sc_clock_lvl); 157 } 158 159 /* ARGSUSED */ 160 long 161 clock_pcc_microtime(arg) 162 void *arg; 163 { 164 static int ovfl_adj[] = { 165 0, 10000, 20000, 30000, 166 40000, 50000, 60000, 70000, 167 80000, 90000, 100000, 110000, 168 120000, 130000, 140000, 150000}; 169 u_int8_t cr; 170 u_int16_t tc, tc2; 171 172 /* 173 * There's no way to latch the counter and overflow registers 174 * without pausing the clock, so compensate for the possible 175 * race by checking for counter wrap-around and re-reading the 176 * overflow counter if necessary. 177 * 178 * Note: This only works because we're called at splhigh(). 179 */ 180 tc = pcc_reg_read16(sys_pcc, PCCREG_TMR1_COUNT); 181 cr = pcc_reg_read(sys_pcc, PCCREG_TMR1_CONTROL); 182 if (tc > (tc2 = pcc_reg_read16(sys_pcc, PCCREG_TMR1_COUNT))) { 183 cr = pcc_reg_read(sys_pcc, PCCREG_TMR1_CONTROL); 184 tc = tc2; 185 } 186 187 return ((long) pcc_timer_cnt2us(tc) + ovfl_adj[cr>>PCC_TIMEROVFLSHIFT]); 188 } 189 190 int 191 clock_pcc_profintr(frame) 192 void *frame; 193 { 194 u_int8_t cr; 195 u_int16_t tc; 196 int s; 197 198 s = splhigh(); 199 tc = pcc_reg_read16(sys_pcc, PCCREG_TMR1_COUNT); 200 cr = pcc_reg_read(sys_pcc, PCCREG_TMR1_CONTROL); 201 if (tc > pcc_reg_read16(sys_pcc, PCCREG_TMR1_COUNT)) 202 cr = pcc_reg_read(sys_pcc, PCCREG_TMR1_CONTROL); 203 pcc_reg_write(sys_pcc, PCCREG_TMR1_CONTROL, PCC_TIMERSTART); 204 pcc_reg_write(sys_pcc, PCCREG_TMR1_INTR_CTRL, 205 clock_pcc_sc->sc_clock_lvl); 206 splx(s); 207 208 for (cr >>= PCC_TIMEROVFLSHIFT; cr; cr--) 209 hardclock(frame); 210 211 return (1); 212 } 213 214 int 215 clock_pcc_statintr(frame) 216 void *frame; 217 { 218 219 /* Disable the timer interrupt while we handle it. */ 220 pcc_reg_write(sys_pcc, PCCREG_TMR2_INTR_CTRL, 0); 221 222 statclock((struct clockframe *) frame); 223 224 pcc_reg_write16(sys_pcc, PCCREG_TMR2_PRELOAD, 225 pcc_timer_us2lim(CLOCK_NEWINT(clock_statvar, clock_statmin))); 226 pcc_reg_write(sys_pcc, PCCREG_TMR2_CONTROL, PCC_TIMERCLEAR); 227 pcc_reg_write(sys_pcc, PCCREG_TMR2_CONTROL, PCC_TIMERSTART); 228 229 pcc_reg_write(sys_pcc, PCCREG_TMR2_INTR_CTRL, 230 clock_pcc_sc->sc_clock_lvl); 231 232 return (1); 233 } 234 235 /* ARGSUSED */ 236 void 237 clock_pcc_shutdown(arg) 238 void *arg; 239 { 240 241 /* Make sure the timer interrupts are turned off. */ 242 pcc_reg_write(sys_pcc, PCCREG_TMR1_CONTROL, PCC_TIMERCLEAR); 243 pcc_reg_write(sys_pcc, PCCREG_TMR1_INTR_CTRL, 0); 244 pcc_reg_write(sys_pcc, PCCREG_TMR2_CONTROL, PCC_TIMERCLEAR); 245 pcc_reg_write(sys_pcc, PCCREG_TMR2_INTR_CTRL, 0); 246 } 247