xref: /netbsd-src/sys/arch/mmeye/mmeye/locore.S (revision 122b5006ee1bd67145794b4cde92f4fe4781a5ec)
1/*	$NetBSD: locore.S,v 1.11 2011/02/19 10:46:29 kiyohara Exp $	*/
2
3/*-
4 * Copyright (c) 1990 The Regents of the University of California.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * William Jolitz.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 * 3. Neither the name of the University nor the names of its contributors
19 *    may be used to endorse or promote products derived from this software
20 *    without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 *	@(#)locore.s	7.3 (Berkeley) 5/13/91
35 */
36
37/*-
38 * Copyright (c) 1993, 1994, 1995, 1997
39 *	Charles M. Hannum.  All rights reserved.
40 *
41 * This code is derived from software contributed to Berkeley by
42 * William Jolitz.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 *    notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 *    notice, this list of conditions and the following disclaimer in the
51 *    documentation and/or other materials provided with the distribution.
52 * 3. All advertising materials mentioning features or use of this software
53 *    must display the following acknowledgement:
54 *	This product includes software developed by the University of
55 *	California, Berkeley and its contributors.
56 * 4. Neither the name of the University nor the names of its contributors
57 *    may be used to endorse or promote products derived from this software
58 *    without specific prior written permission.
59 *
60 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
61 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
62 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
63 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
64 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
65 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
66 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
67 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
68 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
69 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
70 * SUCH DAMAGE.
71 *
72 *	@(#)locore.s	7.3 (Berkeley) 5/13/91
73 */
74
75#include "opt_cputype.h"
76#include "opt_memsize.h"
77#include "assym.h"
78
79#if defined(SH3) && defined(SH4)
80#error "mmeye port don't support SH3,SH4 common kernel."
81#endif
82
83#include <sh3/asm.h>
84#include <sh3/locore.h>
85#include <sh3/exception.h>
86#include <sh3/cache_sh3.h>
87#include <sh3/cache_sh4.h>
88#include <sh3/mmu_sh3.h>
89#include <sh3/mmu_sh4.h>
90
91#define	INIT_STACK							\
92	((IOM_RAM_BEGIN + IOM_RAM_SIZE - 0x00001000) | 0x80000000)
93
94NENTRY(start)
95ALTENTRY(kernel_text)
96	mov	r5, r6	/* args move to r5,6. */
97	mov	r4, r5	/* stand/boot calls here with BOOTINFO_MAGIC, btinfo */
98
99	/* Set SP to initial position */
100	mov.l	XLtmpstk, r15
101
102	__INTR_MASK(r0, r1)
103
104	/* Set Register Bank to Bank 0 */
105	mov.l	SR_init, r0
106	ldc	r0, sr
107
108	xor	r0, r0
109	MOV	(MMUCR, r2)
110	mov.l	r0, @r2		/* MMU OFF */
111
112	bra	start1
113	nop
114	.align	2
115SR_init:	.long	0x500000F0
116REG_SYMBOL(MMUCR)
117start1:
118
119#ifdef ROMIMAGE
120	/* Initialize BUS State Control Regs. */
121	mov.l	_ROM_START, r3
122	mov.l	_C_LABEL(ram_start), r4
123	sub	r3, r4
124	/* Set Bus State Controller */
125	mov.l	XLInitializeBsc, r0
126	sub	r4, r0
127	jsr	@r0
128	nop
129
130	/* Move kernel image from ROM area to RAM area */
131	mov.l	___end, r0
132	mov.l	___start, r1
133	mov.l	_KERNBASE, r2
134	sub	r2, r0
135	sub	r2, r1
136	sub	r1, r0
137	add	#4, r0		/* size of bytes to be copied */
138	shlr2	r0		/* number of long word */
139	mov.l	_ROM_START, r3
140	add	r3, r1		/* src address */
141	mov.l	___start, r3
142	sub	r2, r3
143	mov.l	_C_LABEL(ram_start), r4
144	add	r4, r3		/* dest address */
1451:
146	mov.l	@r1+, r4
147	mov.l	r4, @r3
148	add	#4, r3
149	dt	r0		/* decrement and Test */
150	bf	1b
151	/* kernel image copy end */
152
153	mov.l	LXstart_in_RAM, r0
154	jmp	@r0		/* jump to RAM area */
155	nop
156
157	.align	2
158LXstart_in_RAM:
159	.long	start_in_RAM
160#else /* ROMIMAGE */
161	/* Set Bus State Controller */
162	mov.l	XLInitializeBsc, r0
163	jsr	@r0
164	nop
165#endif /* ROMIMAGE */
166
167start_in_RAM:
168	mova	1f, r0
169	mov	r0, r4
170	mov.l	XLinitSH3, r0
171	jsr	@r0		/* call initSH3() */
172	nop
173
174	.align	2
1751:
176
177	mov.l	XLmain, r0
178	jsr	@r0		/* call main() */
179	nop
180
181		.align	2
182
183XLInitializeBsc:.long	_C_LABEL(InitializeBsc)
184___start:	.long	start
185___etext:	.long	_etext
186___end:		.long	_end
187XLtmpstk:	.long	INIT_STACK
188_KERNBASE:	.long	0x8c000000
189_ROM_START:	.long	IOM_ROM_BEGIN
190XLinitSH3:	.long	_C_LABEL(initSH3)
191XLmain:		.long	_C_LABEL(main)
192
193load_and_reset:
194	mov.l	XL_start_address, r0
195	mov	r0, r8
196	mov.l	@r4+, r1	/* r1 = osimage size */
197	mov.l	@r4+, r2	/* r2 = check sum */
198	shlr2	r1		/* r1 = osimage size in dword */
1991:
200	mov.l	@r4+, r3
201	mov.l	r3, @r0
202	add	#4, r0
203	dt	r1
204	bf	1b
205
206	jmp	@r8		/* jump to start address */
207	nop
208
209	.align	2
210XL_start_address:
211	.long	IOM_RAM_BEGIN + 0x00010000
212load_and_reset_end:
213
214ENTRY(XLoadAndReset)
215	__INTR_MASK(r0, r1)
216	/* copy trampoline code to RAM area top */
217	mov.l	XL_load_and_reset, r0
218	mov.l	XL_load_and_reset_end, r1
219	mov.l	XL_load_trampoline_addr, r2
220	mov	r2, r8
221	sub	r0, r1		/* r1 = bytes to be copied */
2221:	mov.b	@r0+, r3
223	mov.b	r3, @r2
224	add	#1, r2
225	dt	r1
226	bf	1b
227
228	jmp	@r8		/* jump to trampoline code */
229	nop
230
231	.align	2
232XL_load_trampoline_addr:
233	.long	IOM_RAM_BEGIN + 0x00008000
234XL_load_and_reset:
235	.long	load_and_reset
236XL_load_and_reset_end:
237	.long	load_and_reset_end
238