1 /* $NetBSD: intr.h,v 1.5 2002/03/24 18:21:22 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the NetBSD 18 * Foundation, Inc. and its contributors. 19 * 4. Neither the name of The NetBSD Foundation nor the names of its 20 * contributors may be used to endorse or promote products derived 21 * from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 #ifndef _MMEYE_INTR_H_ 37 #define _MMEYE_INTR_H_ 38 39 #include <sh3/intr.h> 40 41 /* 42 * Number of interrupt source 43 * TMU0, TMU1, TMU2 44 * MMEYE(com * 2 + mmeyepcmcia(controller + card) * 2) 45 */ 46 #define _INTR_N 9 47 48 /* Interrupt priority levels */ 49 #define IPL_BIO 9 /* block I/O */ 50 #define IPL_NET 11 /* network */ 51 #define IPL_TTY 12 /* terminal */ 52 #define IPL_SERIAL 12 /* serial */ 53 #define IPL_CLOCK 14 /* clock */ 54 #define IPL_HIGH 15 /* everything */ 55 56 #define splsoftclock() _cpu_intr_raise(IPL_SOFTCLOCK << 4) 57 #define splsoftnet() _cpu_intr_raise(IPL_SOFTNET << 4) 58 #define splsoftserial() _cpu_intr_raise(IPL_SOFTSERIAL << 4) 59 #define splbio() _cpu_intr_raise(IPL_BIO << 4) 60 #define splnet() _cpu_intr_raise(IPL_NET << 4) 61 #define spltty() _cpu_intr_raise(IPL_TTY << 4) 62 #define splvm() spltty() 63 #define splserial() _cpu_intr_raise(IPL_SERIAL << 4) 64 #define splclock() _cpu_intr_raise(IPL_CLOCK << 4) 65 #define splstatclock() splclock() 66 #define splsched() splclock() 67 #define splhigh() _cpu_intr_raise(IPL_HIGH << 4) 68 #define spllock() splhigh() 69 70 #define spl0() _cpu_intr_resume(0) 71 #define splx(x) _cpu_intr_resume(x) 72 73 #define spllowersoftclock() _cpu_intr_resume(IPL_SOFTCLOCK << 4) 74 75 #endif /* !_MMEYE_INTR_H_ */ 76