xref: /netbsd-src/sys/arch/mipsco/include/intr.h (revision 7fa608457b817eca6e0977b37f758ae064f3c99c)
1 /*	$NetBSD: intr.h,v 1.15 2007/10/17 19:55:46 garbled Exp $	*/
2 
3 /*
4  * Copyright (c) 1998 Jonathan Stone.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *	This product includes software developed by Jonathan Stone for
17  *      the NetBSD Project.
18  * 4. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #ifndef _MACHINE_INTR_H_
34 #define _MACHINE_INTR_H_
35 
36 #define	IPL_NONE	0	/* disable only this interrupt */
37 #define	IPL_SOFT	1	/* generic software interrupts */
38 #define	IPL_SOFTCLOCK	2	/* clock software interrupts */
39 #define	IPL_SOFTNET	3	/* network software interrupts */
40 #define	IPL_SOFTSERIAL	4	/* serial software interrupts */
41 #define	IPL_BIO		5	/* disable block I/O interrupts */
42 #define	IPL_NET		6	/* disable network interrupts */
43 #define	IPL_TTY		7	/* disable terminal interrupts */
44 #define	IPL_SERIAL	IPL_TTY
45 #define	IPL_LPT		IPL_TTY
46 #define	IPL_VM		IPL_TTY
47 #define	IPL_CLOCK	8	/* disable clock interrupts */
48 #define	IPL_STATCLOCK	9	/* disable profiling interrupts */
49 #define	IPL_SCHED	IPL_CLOCK
50 #define	IPL_HIGH	10	/* disable all interrupts */
51 #define	IPL_LOCK	IPL_HIGH
52 
53 #define	IPL_N		11
54 
55 /* Interrupt sharing types. */
56 #define IST_NONE	0	/* none */
57 #define IST_PULSE	1	/* pulsed */
58 #define IST_EDGE	2	/* edge-triggered */
59 #define IST_LEVEL	3	/* level-triggered */
60 
61 #define	SI_SOFT		0
62 #define	SI_SOFTCLOCK	1
63 #define	SI_SOFTNET	2
64 #define	SI_SOFTSERIAL	3
65 
66 #define	SI_NQUEUES	4
67 
68 #define	SI_QUEUENAMES {							\
69 	"misc",								\
70 	"clock",							\
71 	"net",								\
72 	"serial",							\
73 }
74 
75 #ifdef _KERNEL
76 #ifndef _LOCORE
77 #include <sys/types.h>
78 #include <sys/device.h>
79 #include <sys/queue.h>
80 #include <mips/locore.h>
81 
82 /*
83  * software simulated interrupt
84  */
85 #define setsoft(x)	do {			\
86 	extern u_int ssir;			\
87 	int _s;					\
88 						\
89 	_s = splhigh();				\
90 	ssir |= 1 << (x);			\
91 	_setsoftintr(MIPS_SOFT_INT_MASK_1);	\
92 	splx(_s);				\
93 } while (0)
94 
95 #define softintr_schedule(arg)						\
96 do {									\
97 	struct mipsco_intrhand *__ih = (arg);				\
98 	__ih->ih_pending = 1;						\
99 	setsoft(__ih->ih_intrhead->intr_siq);				\
100 } while (0)
101 
102 extern struct mipsco_intrhand *softnet_intrhand;
103 
104 #define	setsoftnet()	softintr_schedule(softnet_intrhand)
105 
106 /*
107  * nesting interrupt masks.
108  */
109 #define MIPS_INT_MASK_SPL_SOFT0	MIPS_SOFT_INT_MASK_0
110 #define MIPS_INT_MASK_SPL_SOFT1	(MIPS_SOFT_INT_MASK_1|MIPS_INT_MASK_SPL_SOFT0)
111 #define MIPS_INT_MASK_SPL0	(MIPS_INT_MASK_0|MIPS_INT_MASK_SPL_SOFT1)
112 #define MIPS_INT_MASK_SPL1	(MIPS_INT_MASK_1|MIPS_INT_MASK_SPL0)
113 #define MIPS_INT_MASK_SPL2	(MIPS_INT_MASK_2|MIPS_INT_MASK_SPL1)
114 #define MIPS_INT_MASK_SPL3	(MIPS_INT_MASK_3|MIPS_INT_MASK_SPL2)
115 #define MIPS_INT_MASK_SPL4	(MIPS_INT_MASK_4|MIPS_INT_MASK_SPL3)
116 #define MIPS_INT_MASK_SPL5	(MIPS_INT_MASK_5|MIPS_INT_MASK_SPL4)
117 
118 #define spl0()		(void)_spllower(0)
119 #define splx(s)		(void)_splset(s)
120 #define splbio()	_splraise(MIPS_INT_MASK_SPL1)
121 #define splnet()	_splraise(MIPS_INT_MASK_SPL0)
122 #define spltty()	_splraise(MIPS_INT_MASK_SPL0)
123 #define splvm()		_splraise(MIPS_INT_MASK_SPL2)
124 #define splclock()	_splraise(MIPS_INT_MASK_SPL2)
125 #define splstatclock()	_splraise(MIPS_INT_MASK_SPL2)
126 #define splhigh()	_splraise(MIPS_INT_MASK_SPL2)
127 #define	splsched()	splhigh()
128 #define	spllock()	splhigh()
129 #define splserial()	spltty()
130 #define spllpt()	spltty()
131 
132 #define splsoft()	_splraise(MIPS_INT_MASK_SPL_SOFT1)
133 #define splsoftclock()	_splraise(MIPS_INT_MASK_SPL_SOFT0)
134 #define	splsoftnet()	splsoft()
135 #define	splsoftserial()	splsoft()
136 
137 typedef int ipl_t;
138 typedef struct {
139 	int _sr;
140 } ipl_cookie_t;
141 
142 ipl_cookie_t makeiplcookie(ipl_t ipl);
143 
144 static inline int
145 splraiseipl(ipl_cookie_t icookie)
146 {
147 
148 	return _splraise(icookie._sr);
149 }
150 
151 struct mipsco_intrhand {
152 	LIST_ENTRY(mipsco_intrhand)
153 		ih_q;
154 	int	(*ih_fun) __P((void *));
155 	void	 *ih_arg;
156 	struct	mipsco_intr *ih_intrhead;
157 	int	ih_pending;
158 };
159 
160 struct mipsco_intr {
161 	LIST_HEAD(,mipsco_intrhand)
162 		intr_q;
163 	struct	evcnt ih_evcnt;
164 	unsigned long intr_siq;
165 };
166 
167 
168 extern struct mipsco_intrhand intrtab[];
169 
170 #define SYS_INTR_LEVEL0	0
171 #define SYS_INTR_LEVEL1	1
172 #define SYS_INTR_LEVEL2	2
173 #define SYS_INTR_LEVEL3	3
174 #define SYS_INTR_LEVEL4	4
175 #define SYS_INTR_LEVEL5	5
176 #define SYS_INTR_SCSI	6
177 #define SYS_INTR_TIMER	7
178 #define SYS_INTR_ETHER	8
179 #define SYS_INTR_SCC0	9
180 #define SYS_INTR_FDC	10
181 #define SYS_INTR_ATBUS	11
182 
183 #define MAX_INTR_COOKIES 16
184 
185 #define	CALL_INTR(lev)	((*intrtab[lev].ih_fun)(intrtab[lev].ih_arg))
186 
187 void	*softintr_establish(int, void (*)(void *), void *);
188 void	softintr_disestablish(void *);
189 void	softintr_init(void);
190 void	softintr_dispatch(void);
191 
192 #endif /* !_LOCORE */
193 #endif /* _KERNEL */
194 #endif /* _MACHINE_INTR_H_ */
195