1 /* $NetBSD: intr.h,v 1.4 2000/08/22 19:46:31 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Jonathan Stone. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Jonathan Stone for 17 * the NetBSD Project. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #ifndef _MACHINE_INTR_H_ 34 #define _MACHINE_INTR_H_ 35 36 #define IPL_NONE 0 /* disable only this interrupt */ 37 #define IPL_BIO 1 /* disable block I/O interrupts */ 38 #define IPL_NET 2 /* disable network interrupts */ 39 #define IPL_TTY 3 /* disable terminal interrupts */ 40 #define IPL_CLOCK 4 /* disable clock interrupts */ 41 #define IPL_STATCLOCK 5 /* disable profiling interrupts */ 42 #define IPL_SERIAL 6 /* disable serial hardware interrupts */ 43 #define IPL_HIGH 7 /* disable all interrupts */ 44 45 #define IPL_SOFTSERIAL 0 /* serial software interrupts */ 46 #define IPL_SOFTNET 1 /* network software interrupts */ 47 #define IPL_SOFTCLOCK 2 /* clock software interrupts */ 48 #define IPL_NSOFT 3 49 50 #define IPL_SOFTNAMES { \ 51 "serial", \ 52 "net", \ 53 "clock", \ 54 } 55 56 #ifdef _KERNEL 57 #ifndef _LOCORE 58 #include <mips/cpuregs.h> 59 60 extern int _splraise __P((int)); 61 extern int _spllower __P((int)); 62 extern int _splset __P((int)); 63 extern int _splget __P((void)); 64 extern void _splnone __P((void)); 65 extern void _setsoftintr __P((int)); 66 extern void _clrsoftintr __P((int)); 67 68 /* 69 * software simulated interrupt 70 */ 71 #define SIR_NET 0x01 72 #define SIR_SERIAL 0x02 73 74 #define setsoft(x) do { \ 75 extern u_int ssir; \ 76 int s; \ 77 \ 78 s = splhigh(); \ 79 ssir |= (x); \ 80 _setsoftintr(MIPS_SOFT_INT_MASK_1); \ 81 splx(s); \ 82 } while (0) 83 84 #define setsoftclock() _setsoftintr(MIPS_SOFT_INT_MASK_0) 85 #define setsoftnet() setsoft(SIR_NET) 86 #define setsoftserial() setsoft(SIR_SERIAL) 87 88 /* 89 * nesting interrupt masks. 90 */ 91 #define MIPS_INT_MASK_SPL_SOFT0 MIPS_SOFT_INT_MASK_0 92 #define MIPS_INT_MASK_SPL_SOFT1 (MIPS_SOFT_INT_MASK_1|MIPS_INT_MASK_SPL_SOFT0) 93 #define MIPS_INT_MASK_SPL0 (MIPS_INT_MASK_0|MIPS_INT_MASK_SPL_SOFT1) 94 #define MIPS_INT_MASK_SPL1 (MIPS_INT_MASK_1|MIPS_INT_MASK_SPL0) 95 #define MIPS_INT_MASK_SPL2 (MIPS_INT_MASK_2|MIPS_INT_MASK_SPL1) 96 #define MIPS_INT_MASK_SPL3 (MIPS_INT_MASK_3|MIPS_INT_MASK_SPL2) 97 #define MIPS_INT_MASK_SPL4 (MIPS_INT_MASK_4|MIPS_INT_MASK_SPL3) 98 #define MIPS_INT_MASK_SPL5 (MIPS_INT_MASK_5|MIPS_INT_MASK_SPL4) 99 100 #define spl0() (void)_spllower(0) 101 #define splx(s) (void)_splset(s) 102 #define splbio() _splraise(MIPS_INT_MASK_SPL1) 103 #define splnet() _splraise(MIPS_INT_MASK_SPL0) 104 #define spltty() _splraise(MIPS_INT_MASK_SPL0) 105 #define splimp() _splraise(MIPS_INT_MASK_SPL0) 106 #define splclock() _splraise(MIPS_INT_MASK_SPL2) 107 #define splstatclock() _splraise(MIPS_INT_MASK_SPL2) 108 #define splhigh() _splraise(MIPS_INT_MASK_SPL2) 109 #define splsched() splhigh() 110 #define spllock() splhigh() 111 112 #define splsoftclock() _splraise(MIPS_INT_MASK_SPL_SOFT0) 113 #define splsoftnet() _splraise(MIPS_INT_MASK_SPL_SOFT1) 114 #define spllowersoftclock() _spllower(MIPS_INT_MASK_SPL_SOFT0) 115 116 struct intrhandler { 117 int (*func) __P((void *)); 118 void *arg; 119 }; 120 extern struct intrhandler intrtab[]; 121 122 #define SYS_INTR_LEVEL0 0 123 #define SYS_INTR_LEVEL1 1 124 #define SYS_INTR_LEVEL2 2 125 #define SYS_INTR_LEVEL3 3 126 #define SYS_INTR_LEVEL4 4 127 #define SYS_INTR_LEVEL5 5 128 #define SYS_INTR_SCSI 6 129 #define SYS_INTR_TIMER 7 130 #define SYS_INTR_ETHER 8 131 #define SYS_INTR_SCC0 9 132 #define SYS_INTR_FDC 10 133 134 #define MAX_INTR_COOKIES 16 135 136 #define CALL_INTR(lev) ((*intrtab[lev].func)(intrtab[lev].arg)) 137 138 #endif /* !_LOCORE */ 139 #endif /* _KERNEL */ 140 #endif /* _MACHINE_INTR_H_ */ 141