1 /* $NetBSD: rmixlvar.h,v 1.2 2009/12/14 00:46:08 matt Exp $ */ 2 3 /* 4 * Copyright 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #ifndef _MIPS_RMI_RMIXLVAR_H_ 39 #define _MIPS_RMI_RMIXLVAR_H_ 40 41 #include <mips/cpu.h> 42 #include <dev/pci/pcivar.h> 43 #include <machine/bus.h> 44 45 static inline bool 46 cpu_rmixl(const struct pridtab *ct) 47 { 48 if (ct->cpu_cid == MIPS_PRID_CID_RMI) 49 return true; 50 return false; 51 } 52 53 static inline bool 54 cpu_rmixlr(const struct pridtab *ct) 55 { 56 u_int type = ct->cpu_cidflags & MIPS_CIDFL_RMI_TYPE; 57 if (cpu_rmixl(ct) && type == CIDFL_RMI_TYPE_XLR) 58 return true; 59 return false; 60 } 61 62 static inline bool 63 cpu_rmixls(const struct pridtab *ct) 64 { 65 u_int type = ct->cpu_cidflags & MIPS_CIDFL_RMI_TYPE; 66 if (cpu_rmixl(ct) && type == CIDFL_RMI_TYPE_XLS) 67 return true; 68 return false; 69 } 70 71 static inline bool 72 cpu_rmixlp(const struct pridtab *ct) 73 { 74 u_int type = ct->cpu_cidflags & MIPS_CIDFL_RMI_TYPE; 75 if (cpu_rmixl(ct) && type == CIDFL_RMI_TYPE_XLP) 76 return true; 77 return false; 78 } 79 80 81 typedef enum { 82 RMIXL_INTR_EDGE=0, 83 RMIXL_INTR_LEVEL, 84 } rmixl_intr_trigger_t; 85 86 typedef enum { 87 RMIXL_INTR_RISING=0, 88 RMIXL_INTR_HIGH, 89 RMIXL_INTR_FALLING, 90 RMIXL_INTR_LOW, 91 } rmixl_intr_polarity_t; 92 93 struct rmixl_config { 94 uint64_t rc_io_pbase; 95 bus_addr_t rc_pcie_cfg_pbase; 96 bus_size_t rc_pcie_cfg_size; 97 bus_addr_t rc_pcie_ecfg_pbase; 98 bus_size_t rc_pcie_ecfg_size; 99 bus_addr_t rc_pci_mem_pbase; 100 bus_size_t rc_pci_mem_size; 101 bus_addr_t rc_pci_io_pbase; 102 bus_size_t rc_pci_io_size; 103 struct mips_bus_space rc_obio_memt; /* DEVIO */ 104 struct mips_bus_space rc_pcie_cfg_memt; /* PCI CFG */ 105 struct mips_bus_space rc_pcie_ecfg_memt; /* PCI ECFG */ 106 struct mips_bus_space rc_pci_memt; /* PCI MEM */ 107 struct mips_bus_space rc_pci_iot; /* PCI IO */ 108 struct mips_bus_dma_tag rc_29bit_dmat; 109 struct mips_bus_dma_tag rc_32bit_dmat; 110 struct mips_bus_dma_tag rc_64bit_dmat; 111 struct extent *rc_phys_ex; /* Note: MB units */ 112 struct extent *rc_obio_ex; 113 struct extent *rc_pcie_cfg_ex; 114 struct extent *rc_pcie_ecfg_ex; 115 struct extent *rc_pcie_mem_ex; 116 struct extent *rc_pcie_io_ex; 117 int rc_mallocsafe; 118 }; 119 120 extern struct rmixl_config rmixl_configuration; 121 122 extern void rmixl_obio_bus_mem_init(bus_space_tag_t, void *); 123 extern void rmixl_pcie_cfg_bus_mem_init(bus_space_tag_t, void *); 124 extern void rmixl_pcie_ecfg_bus_mem_init(bus_space_tag_t, void *); 125 extern void rmixl_pcie_bus_mem_init(bus_space_tag_t, void *); 126 extern void rmixl_pcie_bus_io_init(bus_space_tag_t, void *); 127 128 extern const char *rmixl_intr_string(int); 129 extern void *rmixl_intr_establish(int, int, 130 rmixl_intr_trigger_t, rmixl_intr_polarity_t, 131 int (*)(void *), void *); 132 extern void rmixl_intr_disestablish(void *); 133 134 extern void rmixl_addr_error_init(void); 135 extern int rmixl_addr_error_check(void); 136 137 extern uint64_t rmixl_mfcr(u_int); 138 extern void rmixl_mtcr(uint64_t, u_int); 139 140 #endif /* _MIPS_RMI_RMIXLVAR_H_ */ 141