1 /* $NetBSD: rmixl_obio.c,v 1.5 2011/07/10 23:13:22 matt Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * On-board device autoconfiguration support for RMI {XLP, XLR, XLS} chips 40 */ 41 42 #include <sys/cdefs.h> 43 __KERNEL_RCSID(0, "$NetBSD: rmixl_obio.c,v 1.5 2011/07/10 23:13:22 matt Exp $"); 44 45 #include "locators.h" 46 #include "pci.h" 47 #define _MIPS_BUS_DMA_PRIVATE 48 49 #include <sys/param.h> 50 #include <sys/bus.h> 51 #include <sys/device.h> 52 #include <sys/extent.h> 53 #include <sys/malloc.h> 54 #include <sys/systm.h> 55 56 #include <mips/int_fmtio.h> 57 58 #include <mips/rmi/rmixlreg.h> 59 #include <mips/rmi/rmixlvar.h> 60 #include <mips/rmi/rmixl_intr.h> 61 #include <mips/rmi/rmixl_obiovar.h> 62 #include <mips/rmi/rmixl_pcievar.h> 63 64 #include <evbmips/rmixl/autoconf.h> 65 66 #ifdef OBIO_DEBUG 67 int obio_rmixl_debug = OBIO_DEBUG; 68 # define DPRINTF(x) do { if (obio_rmixl_debug) printf x ; } while (0) 69 #else 70 # define DPRINTF(x) 71 #endif 72 73 static int obio_match(device_t, cfdata_t, void *); 74 static void obio_attach(device_t, device_t, void *); 75 static int obio_print(void *, const char *); 76 static int obio_search(device_t, cfdata_t, const int *, void *); 77 static void obio_bus_init(struct obio_softc *); 78 static void obio_dma_init_64(bus_dma_tag_t); 79 static int rmixl_addr_error_intr(void *); 80 81 82 CFATTACH_DECL_NEW(obio_rmixl, sizeof(struct obio_softc), 83 obio_match, obio_attach, NULL, NULL); 84 85 int obio_found; 86 87 static int 88 obio_match(device_t parent, cfdata_t cf, void *aux) 89 { 90 struct mainbus_attach_args *aa = aux; 91 92 if (obio_found == 0) 93 if (strncmp(aa->ma_name, cf->cf_name, strlen(cf->cf_name)) == 0) 94 return 1; 95 96 return 0; 97 } 98 99 static void 100 obio_attach(device_t parent, device_t self, void *aux) 101 { 102 struct obio_softc *sc = device_private(self); 103 bus_addr_t ba; 104 105 obio_found = 1; 106 sc->sc_dev = self; 107 108 ba = (bus_addr_t)rmixl_configuration.rc_io_pbase; 109 KASSERT(ba != 0); 110 111 obio_bus_init(sc); 112 113 aprint_normal(" addr %#"PRIxBUSADDR" size %#"PRIxBUSSIZE"\n", 114 ba, (bus_size_t)RMIXL_IO_DEV_SIZE); 115 aprint_naive("\n"); 116 117 /* 118 * Attach on-board devices as specified in the kernel config file. 119 */ 120 config_search_ia(obio_search, self, "obio", NULL); 121 122 } 123 124 static int 125 obio_print(void *aux, const char *pnp) 126 { 127 struct obio_attach_args *obio = aux; 128 129 if (obio->obio_addr != OBIOCF_ADDR_DEFAULT) { 130 aprint_normal(" addr %#"PRIxBUSADDR, obio->obio_addr); 131 if (obio->obio_size != OBIOCF_SIZE_DEFAULT) 132 aprint_normal("-%#"PRIxBUSADDR, 133 obio->obio_addr + (obio->obio_size - 1)); 134 } 135 if (obio->obio_mult != OBIOCF_MULT_DEFAULT) 136 aprint_normal(" mult %d", obio->obio_mult); 137 if (obio->obio_intr != OBIOCF_INTR_DEFAULT) 138 aprint_normal(" intr %d", obio->obio_intr); 139 if (obio->obio_tmsk != OBIOCF_TMSK_DEFAULT) 140 aprint_normal(" tmsk %d", obio->obio_tmsk); 141 142 return (UNCONF); 143 } 144 145 static int 146 obio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux) 147 { 148 struct obio_softc *sc = device_private(parent); 149 struct obio_attach_args obio; 150 151 obio.obio_eb_bst = sc->sc_eb_bst; 152 obio.obio_el_bst = sc->sc_el_bst; 153 obio.obio_addr = cf->cf_loc[OBIOCF_ADDR]; 154 obio.obio_size = cf->cf_loc[OBIOCF_SIZE]; 155 obio.obio_mult = cf->cf_loc[OBIOCF_MULT]; 156 obio.obio_intr = cf->cf_loc[OBIOCF_INTR]; 157 obio.obio_tmsk = cf->cf_loc[OBIOCF_TMSK]; 158 obio.obio_29bit_dmat = sc->sc_29bit_dmat; 159 obio.obio_32bit_dmat = sc->sc_32bit_dmat; 160 obio.obio_64bit_dmat = sc->sc_64bit_dmat; 161 162 if (config_match(parent, cf, &obio) > 0) 163 config_attach(parent, cf, &obio, obio_print); 164 165 return 0; 166 } 167 168 static void 169 obio_bus_init(struct obio_softc *sc) 170 { 171 struct rmixl_config *rcp = &rmixl_configuration; 172 static int done = 0; 173 int error; 174 175 if (done) 176 return; 177 done = 1; 178 179 /* obio (devio) space, Big Endian */ 180 if (rcp->rc_obio_eb_memt.bs_cookie == 0) 181 rmixl_obio_eb_bus_mem_init(&rcp->rc_obio_eb_memt, rcp); 182 183 /* obio (devio) space, Little Endian */ 184 if (rcp->rc_obio_el_memt.bs_cookie == 0) 185 rmixl_obio_el_bus_mem_init(&rcp->rc_obio_el_memt, rcp); 186 187 /* dma space for all memory, including >= 4GB */ 188 if (rcp->rc_dma_tag._cookie == 0) 189 obio_dma_init_64(&rcp->rc_dma_tag); 190 rcp->rc_64bit_dmat = &rcp->rc_dma_tag; 191 192 /* dma space for addr < 4GB */ 193 if (rcp->rc_32bit_dmat == NULL) { 194 error = bus_dmatag_subregion(rcp->rc_64bit_dmat, 195 0, (bus_addr_t)1 << 32, &rcp->rc_32bit_dmat, 0); 196 if (error) 197 panic("%s: failed to create 32bit dma tag: %d", 198 __func__, error); 199 } 200 201 /* dma space for addr < 512MB */ 202 if (rcp->rc_29bit_dmat == NULL) { 203 error = bus_dmatag_subregion(rcp->rc_32bit_dmat, 204 0, (bus_addr_t)1 << 29, &rcp->rc_29bit_dmat, 0); 205 if (error) 206 panic("%s: failed to create 29bit dma tag: %d", 207 __func__, error); 208 } 209 210 sc->sc_base = (bus_addr_t)rcp->rc_io_pbase; 211 sc->sc_size = (bus_size_t)RMIXL_IO_DEV_SIZE; 212 sc->sc_eb_bst = (bus_space_tag_t)&rcp->rc_obio_eb_memt; 213 sc->sc_el_bst = (bus_space_tag_t)&rcp->rc_obio_el_memt; 214 sc->sc_29bit_dmat = rcp->rc_29bit_dmat; 215 sc->sc_32bit_dmat = rcp->rc_32bit_dmat; 216 sc->sc_64bit_dmat = rcp->rc_64bit_dmat; 217 } 218 219 static void 220 obio_dma_init_64(bus_dma_tag_t t) 221 { 222 t->_cookie = t; 223 t->_wbase = 0; 224 t->_bounce_alloc_lo = 0; 225 t->_bounce_alloc_hi = 0; 226 t->_dmamap_ops = mips_bus_dmamap_ops; 227 t->_dmamem_ops = mips_bus_dmamem_ops; 228 t->_dmatag_ops = mips_bus_dmatag_ops; 229 } 230 231 void 232 rmixl_addr_error_init(void) 233 { 234 uint32_t r; 235 236 /* 237 * activate error addr detection on all (configurable) devices 238 * preserve reserved bit fields 239 * note some of these bits are read-only (writes are ignored) 240 */ 241 r = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_DEVICE_MASK); 242 r |= ~(__BITS(19,16) | __BITS(10,9) | __BITS(7,5)); 243 RMIXL_IOREG_WRITE(RMIXL_ADDR_ERR_DEVICE_MASK, r); 244 245 /* 246 * enable the address error interrupts 247 * "upgrade" cache and CPU errors to A1 248 */ 249 #define _ADDR_ERR_DEVSTAT_A1 (__BIT(8) | __BIT(1) | __BIT(0)) 250 #define _ADDR_ERR_RESV \ 251 (__BITS(31,21) | __BITS(15,14) | __BITS(10,9) | __BITS(7,2)) 252 #define _BITERR_INT_EN_RESV (__BITS(31,8) | __BIT(4)) 253 254 r = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR0_EN); 255 r &= _ADDR_ERR_RESV; 256 r |= ~_ADDR_ERR_RESV; 257 RMIXL_IOREG_WRITE(RMIXL_ADDR_ERR_AERR0_EN, r); 258 259 r = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR0_UPG); 260 r &= _ADDR_ERR_RESV; 261 r |= _ADDR_ERR_DEVSTAT_A1; 262 RMIXL_IOREG_WRITE(RMIXL_ADDR_ERR_AERR0_UPG, r); 263 264 /* 265 * clear the log regs and the dev stat (interrupt status) regs 266 * "Write any value to bit[0] to clear" 267 */ 268 r = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR1_CLEAR); 269 RMIXL_IOREG_WRITE(RMIXL_ADDR_ERR_AERR1_CLEAR, r); 270 271 /* 272 * enable the double bit error interrupts 273 * (assume reserved bits, which are read-only, are ignored) 274 */ 275 r = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_BITERR_INT_EN); 276 r &= _BITERR_INT_EN_RESV; 277 r |= __BITS(7,5); 278 RMIXL_IOREG_WRITE(RMIXL_ADDR_ERR_BITERR_INT_EN, r); 279 280 /* 281 * establish address error ISR 282 * XXX assuming "int 16 (bridge_tb)" is our irq 283 * XXX is true for XLS family only 284 */ 285 if (cpu_rmixls(mips_options.mips_cpu)) 286 rmixl_intr_establish(16, 1, IPL_HIGH, 287 RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH, 288 rmixl_addr_error_intr, NULL, false); 289 } 290 291 int 292 rmixl_addr_error_check(void) 293 { 294 uint32_t aerr0_devstat; 295 uint32_t aerr0_log1; 296 uint32_t aerr0_log2; 297 uint32_t aerr0_log3; 298 uint32_t aerr1_devstat; 299 uint32_t aerr1_log1; 300 uint32_t aerr1_log2; 301 uint32_t aerr1_log3; 302 uint32_t sbe_counts; 303 uint32_t dbe_counts; 304 305 aerr0_devstat = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR0_DEVSTAT); 306 aerr0_log1 = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR0_LOG1); 307 aerr0_log2 = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR0_LOG2); 308 aerr0_log3 = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR0_LOG3); 309 310 aerr1_devstat = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR1_DEVSTAT); 311 aerr1_log1 = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR1_LOG1); 312 aerr1_log2 = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR1_LOG2); 313 aerr1_log3 = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_AERR1_LOG3); 314 315 sbe_counts = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_SBE_COUNTS); 316 dbe_counts = RMIXL_IOREG_READ(RMIXL_ADDR_ERR_DBE_COUNTS); 317 318 if (aerr0_log1|aerr0_log2|aerr0_log3 319 |aerr1_log1|aerr1_log2|aerr1_log3 320 |dbe_counts) { 321 printf("aerr0: stat %#x, logs: %#x, %#x, %#x\n", 322 aerr0_devstat, aerr0_log1, aerr0_log2, aerr0_log2); 323 printf("aerr1: stat %#x, logs: %#x, %#x, %#x\n", 324 aerr1_devstat, aerr1_log1, aerr1_log2, aerr1_log2); 325 printf("1-bit errors: %#x, 2-bit errors: %#x\n", 326 sbe_counts, dbe_counts); 327 return 1; 328 } 329 return 0; 330 } 331 332 static int 333 rmixl_addr_error_intr(void *arg) 334 { 335 int err; 336 337 err = rmixl_addr_error_check(); 338 if (err != 0) { 339 #if DDB 340 printf("%s\n", __func__); 341 Debugger(); 342 #endif 343 panic("Address Error"); 344 } 345 return 1; 346 } 347