1 /* $NetBSD: mips_softint.c,v 1.4 2011/04/06 05:23:59 matt Exp $ */ 2 3 /*- 4 * Copyright (c) 2009, 2010 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas <matt@3am-software.com>. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: mips_softint.c,v 1.4 2011/04/06 05:23:59 matt Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/cpu.h> 37 #include <sys/proc.h> 38 #include <sys/lwp.h> 39 #include <sys/intr.h> 40 #include <sys/atomic.h> 41 42 #include <uvm/uvm_extern.h> 43 44 #include <machine/intr.h> 45 #include <mips/locore.h> 46 47 #ifdef __HAVE_FAST_SOFTINTS 48 49 #define SOFTINT_BIO_MASK (1 << SOFTINT_BIO) 50 #define SOFTINT_CLOCK_MASK (1 << SOFTINT_CLOCK) 51 #define SOFTINT_NET_MASK (1 << SOFTINT_NET) 52 #define SOFTINT_SERIAL_MASK (1 << SOFTINT_SERIAL) 53 54 /* 55 * This is more complex than usual since we want the fast softint threads 56 * to have stacks that are direct-mapped and avoid the TLB. This means we 57 * can avoid changing the TLB entry that maps the current lwp's kernel stack. 58 * 59 * This is a very big win so it's worth going through this effort. 60 */ 61 void 62 softint_init_md(lwp_t *l, u_int si_level, uintptr_t *machdep) 63 { 64 struct cpu_info * const ci = l->l_cpu; 65 66 *machdep = si_level; 67 ci->ci_softlwps[si_level] = l; 68 } 69 70 void 71 softint_trigger(uintptr_t si) 72 { 73 /* 74 * Set the appropriate cause bit. serial & net are 1 bit higher than 75 * clock & bio. This avoid a branch and is fast. 76 */ 77 const uint32_t int_mask = MIPS_SOFT_INT_MASK_0 78 << (((SOFTINT_NET_MASK | SOFTINT_SERIAL_MASK) >> si) & 1); 79 80 /* 81 * Use atomic_or since it's faster than splhigh/splx 82 */ 83 atomic_or_uint(&curcpu()->ci_softints, 1 << si); 84 85 /* 86 * Now update cause. 87 */ 88 _setsoftintr(int_mask); 89 } 90 91 #define SOFTINT_MASK_1 (SOFTINT_SERIAL_MASK | SOFTINT_NET_MASK) 92 #define SOFTINT_MASK_0 (SOFTINT_CLOCK_MASK | SOFTINT_BIO_MASK) 93 94 /* 95 * Helper macro. 96 * 97 * Dispatch a softint and then restart the loop so that higher 98 * priority softints are always done first. 99 */ 100 #define DOSOFTINT(level) \ 101 if (softints & SOFTINT_##level## _MASK) { \ 102 ci->ci_softints ^= SOFTINT_##level##_MASK; \ 103 softint_fast_dispatch(ci->ci_softlwps[SOFTINT_##level], \ 104 IPL_SOFT##level); \ 105 KASSERT(ci->ci_softlwps[SOFTINT_##level]->l_ctxswtch == 0); \ 106 KASSERTMSG(ci->ci_cpl == IPL_HIGH, ("cpl (%d) != HIGH", ci->ci_cpl)); \ 107 continue; \ 108 } 109 110 void 111 softint_process(uint32_t ipending) 112 { 113 struct cpu_info * const ci = curcpu(); 114 u_int mask; 115 116 KASSERT((ipending & MIPS_SOFT_INT_MASK) != 0); 117 KASSERT((ipending & ~MIPS_SOFT_INT_MASK) == 0); 118 KASSERT(ci->ci_cpl == IPL_HIGH); 119 KASSERTMSG(ci->ci_mtx_count == 0, 120 ("%s: cpu%u (%p): ci_mtx_count (%d) != 0", 121 __func__, cpu_index(ci), ci, ci->ci_mtx_count)); 122 123 if (ipending & MIPS_SOFT_INT_MASK_0) { 124 /* 125 * Since we run at splhigh, 126 */ 127 mask = SOFTINT_MASK_1 | SOFTINT_MASK_0; 128 ipending |= MIPS_SOFT_INT_MASK_1; 129 } else { 130 KASSERT(ipending & MIPS_SOFT_INT_MASK_1); 131 mask = SOFTINT_MASK_1; 132 } 133 134 for (;;) { 135 u_int softints = ci->ci_softints & mask; 136 if (softints == 0) 137 break; 138 139 DOSOFTINT(SERIAL); 140 DOSOFTINT(NET); 141 DOSOFTINT(BIO); 142 DOSOFTINT(CLOCK); 143 } 144 145 KASSERT(ci->ci_mtx_count == 0); 146 147 _clrsoftintr(ipending); 148 } 149 150 #endif /* __HAVE_FAST_SOFTINTS */ 151