1 /* $NetBSD: mips_softint.c,v 1.3 2011/02/20 16:38:13 rmind Exp $ */ 2 3 /*- 4 * Copyright (c) 2009, 2010 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas <matt@3am-software.com>. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: mips_softint.c,v 1.3 2011/02/20 16:38:13 rmind Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/proc.h> 37 #include <sys/lwp.h> 38 #include <sys/intr.h> 39 #include <sys/atomic.h> 40 41 #include <uvm/uvm_extern.h> 42 43 #include <machine/intr.h> 44 #include <mips/locore.h> 45 46 #ifdef __HAVE_FAST_SOFTINTS 47 48 #define SOFTINT_BIO_MASK (1 << SOFTINT_BIO) 49 #define SOFTINT_CLOCK_MASK (1 << SOFTINT_CLOCK) 50 #define SOFTINT_NET_MASK (1 << SOFTINT_NET) 51 #define SOFTINT_SERIAL_MASK (1 << SOFTINT_SERIAL) 52 53 /* 54 * This is more complex than usual since we want the fast softint threads 55 * to have stacks that are direct-mapped and avoid the TLB. This means we 56 * can avoid changing the TLB entry that maps the current lwp's kernel stack. 57 * 58 * This is a very big win so it's worth going through this effort. 59 */ 60 void 61 softint_init_md(lwp_t *l, u_int si_level, uintptr_t *machdep) 62 { 63 struct cpu_info * const ci = l->l_cpu; 64 65 *machdep = si_level; 66 ci->ci_softlwps[si_level] = l; 67 } 68 69 void 70 softint_trigger(uintptr_t si) 71 { 72 /* 73 * Set the appropriate cause bit. serial & net are 1 bit higher than 74 * clock & bio. This avoid a branch and is fast. 75 */ 76 const uint32_t int_mask = MIPS_SOFT_INT_MASK_0 77 << (((SOFTINT_NET_MASK | SOFTINT_SERIAL_MASK) >> si) & 1); 78 79 /* 80 * Use atomic_or since it's faster than splhigh/splx 81 */ 82 atomic_or_uint(&curcpu()->ci_softints, 1 << si); 83 84 /* 85 * Now update cause. 86 */ 87 _setsoftintr(int_mask); 88 } 89 90 #define SOFTINT_MASK_1 (SOFTINT_SERIAL_MASK | SOFTINT_NET_MASK) 91 #define SOFTINT_MASK_0 (SOFTINT_CLOCK_MASK | SOFTINT_BIO_MASK) 92 93 /* 94 * Helper macro. 95 * 96 * Dispatch a softint and then restart the loop so that higher 97 * priority softints are always done first. 98 */ 99 #define DOSOFTINT(level) \ 100 if (softints & SOFTINT_##level## _MASK) { \ 101 ci->ci_softints ^= SOFTINT_##level##_MASK; \ 102 softint_fast_dispatch(ci->ci_softlwps[SOFTINT_##level], \ 103 IPL_SOFT##level); \ 104 KASSERT(ci->ci_softlwps[SOFTINT_##level]->l_ctxswtch == 0); \ 105 KASSERTMSG(ci->ci_cpl == IPL_HIGH, ("cpl (%d) != HIGH", ci->ci_cpl)); \ 106 continue; \ 107 } 108 109 void 110 softint_process(uint32_t ipending) 111 { 112 struct cpu_info * const ci = curcpu(); 113 u_int mask; 114 115 KASSERT((ipending & MIPS_SOFT_INT_MASK) != 0); 116 KASSERT((ipending & ~MIPS_SOFT_INT_MASK) == 0); 117 KASSERT(ci->ci_cpl == IPL_HIGH); 118 KASSERT(ci->ci_mtx_count == 0); 119 120 if (ipending & MIPS_SOFT_INT_MASK_0) { 121 /* 122 * Since we run at splhigh, 123 */ 124 mask = SOFTINT_MASK_1 | SOFTINT_MASK_0; 125 ipending |= MIPS_SOFT_INT_MASK_1; 126 } else { 127 KASSERT(ipending & MIPS_SOFT_INT_MASK_1); 128 mask = SOFTINT_MASK_1; 129 } 130 131 for (;;) { 132 u_int softints = ci->ci_softints & mask; 133 if (softints == 0) 134 break; 135 136 DOSOFTINT(SERIAL); 137 DOSOFTINT(NET); 138 DOSOFTINT(BIO); 139 DOSOFTINT(CLOCK); 140 } 141 142 KASSERT(ci->ci_mtx_count == 0); 143 144 _clrsoftintr(ipending); 145 } 146 147 #endif /* __HAVE_FAST_SOFTINTS */ 148