xref: /netbsd-src/sys/arch/mips/include/db_machdep.h (revision 6a493d6bc668897c91594964a732d38505b70cbb)
1 /* $NetBSD: db_machdep.h,v 1.28 2011/07/09 16:58:05 matt Exp $ */
2 
3 /*
4  * Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author)
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *      This product includes software developed by Jonathan Stone for
18  *      the NetBSD Project.
19  * 4. The name of the author may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  */
34 #ifndef	_MIPS_DB_MACHDEP_H_
35 #define	_MIPS_DB_MACHDEP_H_
36 
37 #include <uvm/uvm_param.h>		/* XXX  boolean_t */
38 #include <mips/trap.h>			/* T_BREAK */
39 #include <mips/reg.h>			/* register state */
40 #include <mips/regnum.h>		/* symbolic register indices */
41 #include <mips/pcb.h>
42 
43 #define	DB_ELF_SYMBOLS
44 #ifndef DB_ELFSIZE
45 #define	DB_ELFSIZE	32
46 #endif
47 
48 typedef	vaddr_t		db_addr_t;	/* address - unsigned */
49 #define	DDB_EXPR_FMT	"l"		/* expression is long */
50 typedef	long		db_expr_t;	/* expression - signed */
51 
52 typedef struct reg db_regs_t;
53 
54 extern db_regs_t	ddb_regs;	/* register state */
55 #define	DDB_REGS	(&ddb_regs)
56 
57 #define	PC_REGS(regs)	((regs)->r_regs[_R_PC])
58 
59 #define PC_ADVANCE(regs) do {						\
60 	if ((db_get_value((regs)->r_regs[_R_PC], sizeof(int), false) &\
61 	     0xfc00003f) == 0xd)					\
62 		(regs)->r_regs[_R_PC] += BKPT_SIZE;			\
63 } while(0)
64 
65 /* Similar to PC_ADVANCE(), except only advance on cpu_Debugger()'s bpt */
66 #define PC_BREAK_ADVANCE(regs) do {					 \
67 	if (db_get_value((regs)->r_regs[_R_PC], sizeof(int), false) == 0xd) \
68 		(regs)->r_regs[_R_PC] += BKPT_SIZE;			 \
69 } while(0)
70 
71 #define	BKPT_ADDR(addr)	(addr)		/* breakpoint address */
72 #define BKPT_INST	0x0001000D
73 #define	BKPT_SIZE	(4)		/* size of breakpoint inst */
74 #define	BKPT_SET(inst, addr)	(BKPT_INST)
75 
76 #define	IS_BREAKPOINT_TRAP(type, code)	((type) == T_BREAK)
77 #define IS_WATCHPOINT_TRAP(type, code)	(0)	/* XXX mips3 watchpoint */
78 
79 /*
80  * Interface to  disassembly (shared with mdb)
81  */
82 db_addr_t	db_disasm_insn(int insn, db_addr_t loc, bool altfmt);
83 
84 
85 /*
86  * Entrypoints to DDB for kernel, keyboard drivers, init hook
87  */
88 void 	kdb_kbd_trap(db_regs_t *);
89 int 	kdb_trap(int type, struct reg *);
90 
91 static inline void
92 db_set_ddb_regs(int type, struct reg *regs)
93 {
94 	ddb_regs = *regs;
95 }
96 
97 
98 /*
99  * Constants for KGDB.
100  */
101 typedef	mips_reg_t	kgdb_reg_t;
102 #define	KGDB_NUMREGS	90
103 #define	KGDB_BUFLEN	1024
104 
105 /*
106  * MIPS cpus have no hardware single-step.
107  */
108 #define SOFTWARE_SSTEP
109 
110 #define inst_trap_return(ins)	((ins)&0)
111 
112 bool	inst_branch(int inst);
113 bool	inst_call(int inst);
114 bool	inst_return(int inst);
115 bool	inst_load(int inst);
116 bool	inst_store(int inst);
117 bool	inst_unconditional_flow_transfer(int inst);
118 db_addr_t branch_taken(int inst, db_addr_t pc, db_regs_t *regs);
119 db_addr_t next_instr_address(db_addr_t pc, bool bd);
120 
121 bool ddb_running_on_this_cpu_p(void);
122 bool ddb_running_on_any_cpu_p(void);
123 void db_resume_others(void);
124 
125 /*
126  * We have machine-dependent commands.
127  */
128 #define DB_MACHINE_COMMANDS
129 
130 #endif	/* _MIPS_DB_MACHDEP_H_ */
131