xref: /netbsd-src/sys/arch/mips/include/cpu.h (revision 89c5a767f8fc7a4633b2d409966e2becbb98ff92)
1 /*	$NetBSD: cpu.h,v 1.34 2000/03/07 01:05:48 soren Exp $	*/
2 
3 /*-
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * Ralph Campbell and Rick Macklem.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by the University of
21  *	California, Berkeley and its contributors.
22  * 4. Neither the name of the University nor the names of its contributors
23  *    may be used to endorse or promote products derived from this software
24  *    without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36  * SUCH DAMAGE.
37  *
38  *	@(#)cpu.h	8.4 (Berkeley) 1/4/94
39  */
40 
41 #ifndef _CPU_H_
42 #define _CPU_H_
43 
44 /*
45  * Exported definitions unique to NetBSD/mips cpu support.
46  */
47 
48 /*
49  * CTL_MACHDEP definitions.
50  */
51 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
52 #define	CPU_BOOTED_KERNEL	2	/* string: booted kernel name */
53 #define	CPU_ROOT_DEVICE		3	/* string: root device name */
54 #define	CPU_MAXID		4	/* number of valid machdep ids */
55 
56 #define CTL_MACHDEP_NAMES { \
57 	{ 0, 0 }, \
58 	{ "console_device", CTLTYPE_STRUCT }, \
59 	{ "booted_kernel", CTLTYPE_STRING }, \
60 	{ "root_device", CTLTYPE_STRING }, \
61 }
62 
63 #ifdef _KERNEL
64 #ifndef _LOCORE
65 
66 /*
67  * Macros to find the CPU architecture we're on at run-time,
68  * or if possible, at compile-time.
69  */
70 
71 #if (MIPS1 + MIPS3) == 1
72 #ifdef MIPS1
73 # define CPUISMIPS3	0
74 #endif /* mips1 */
75 
76 #ifdef MIPS3
77 #  define CPUISMIPS3	 1
78 #endif /* mips1 */
79 
80 #else /* run-time test */
81 extern int cpu_arch;
82 #define CPUISMIPS3	(cpu_arch == 3)
83 #endif /* run-time test */
84 
85 /*
86  * definitions of cpu-dependent requirements
87  * referenced in generic code
88  */
89 #define	cpu_wait(p)			/* nothing */
90 #define	cpu_swapout(p)			panic("cpu_swapout: can't get here");
91 #define	cpu_number()			0
92 
93 /*
94  * Arguments to hardclock and gatherstats encapsulate the previous
95  * machine state in an opaque clockframe.
96  */
97 struct clockframe {
98 	int	pc;	/* program counter at time of interrupt */
99 	int	sr;	/* status register at time of interrupt */
100 };
101 
102 /*
103  * A port must provde CLKF_USERMODE() and CLKF_BASEPRI() for use
104  * in machine-independent code. These differ on r4000 and r3000 systems;
105  * provide them in the port-dependent file that includes this one, using
106  * the macros below.
107  */
108 
109 /* mips1 versions */
110 #define	MIPS1_CLKF_USERMODE(framep)	((framep)->sr & MIPS_SR_KU_PREV)
111 #define	MIPS1_CLKF_BASEPRI(framep)	\
112 	((~(framep)->sr & (MIPS_INT_MASK | MIPS_SR_INT_ENA_PREV)) == 0)
113 
114 /* mips3 versions */
115 #define	MIPS3_CLKF_USERMODE(framep)	((framep)->sr & MIPS_SR_KSU_USER)
116 #define	MIPS3_CLKF_BASEPRI(framep)	\
117 	((~(framep)->sr & (MIPS_INT_MASK | MIPS_SR_INT_IE)) == 0)
118 
119 #define	CLKF_PC(framep)		((framep)->pc)
120 #define	CLKF_INTR(framep)	(0)
121 
122 #if defined(MIPS3) && !defined(MIPS1)
123 #define	CLKF_USERMODE(framep)	MIPS3_CLKF_USERMODE(framep)
124 #define	CLKF_BASEPRI(framep)	MIPS3_CLKF_BASEPRI(framep)
125 #endif
126 
127 #if !defined(MIPS3) && defined(MIPS1)
128 #define	CLKF_USERMODE(framep)	MIPS1_CLKF_USERMODE(framep)
129 #define	CLKF_BASEPRI(framep)	MIPS1_CLKF_BASEPRI(framep)
130 #endif
131 
132 
133 #if defined(MIPS3) && defined(MIPS1)
134 #define CLKF_USERMODE(framep) \
135     ((CPUISMIPS3) ? MIPS3_CLKF_USERMODE(framep):  MIPS1_CLKF_USERMODE(framep))
136 #define CLKF_BASEPRI(framep) \
137     ((CPUISMIPS3) ? MIPS3_CLKF_BASEPRI(framep):  MIPS1_CLKF_BASEPRI(framep))
138 #endif
139 
140 
141 /*
142  * Preempt the current process if in interrupt from user mode,
143  * or after the current trap/syscall if in system mode.
144  */
145 #define	need_resched()	{ want_resched = 1; aston(); }
146 
147 /*
148  * Give a profiling tick to the current process when the user profiling
149  * buffer pages are invalid.  On the MIPS, request an ast to send us
150  * through trap, marking the proc as needing a profiling tick.
151  */
152 #define	need_proftick(p)	{ (p)->p_flag |= P_OWEUPC; aston(); }
153 
154 /*
155  * Notify the current process (p) that it has a signal pending,
156  * process as soon as possible.
157  */
158 #define	signotify(p)	aston()
159 
160 #define aston()		(astpending = 1)
161 
162 extern int astpending;	/* need to trap before returning to user mode */
163 extern int want_resched;	/* resched() was called */
164 #ifdef MIPS3
165 extern u_int	mips_L2CacheSize;
166 extern int	mips_L2CacheIsSnooping; /* L2 cache snoops uncached writes ? */
167 extern int	mips_L2CacheMixed;
168 
169 #ifdef MIPS3_INTERNAL_TIMER_INTERRUPT
170 extern u_int32_t mips3_intr_cycle_count;
171 extern u_int32_t mips3_timer_delta;
172 #endif
173 #endif /* MIPS3 */
174 
175 /*
176  * Misc prototypes.
177  */
178 struct proc;
179 struct user;
180 
181 /* trap.c */
182 void	child_return __P((void *));
183 int	kdbpeek __P((vaddr_t));
184 
185 /* mips_machdep.c */
186 void	dumpsys __P((void));
187 int	savectx __P((struct user *));
188 void	mips_init_msgbuf __P((void));
189 
190 /* locore.S */
191 void	savefpregs __P((struct proc *));
192 void	switchfpregs __P((struct proc *, struct proc *));
193 int	badaddr __P((void *, size_t));
194 
195 /* mips_machdep.c */
196 void	cpu_identify __P((void));
197 void	mips_vector_init __P((void));
198 
199 #endif /* ! _LOCORE */
200 #endif /* _KERNEL */
201 
202 #endif /* _CPU_H_ */
203