xref: /netbsd-src/sys/arch/mips/include/cpu.h (revision 627f7eb200a4419d89b531d55fccd2ee3ffdcde0)
1 /*	$NetBSD: cpu.h,v 1.132 2021/03/29 01:47:45 simonb Exp $	*/
2 
3 /*-
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * Ralph Campbell and Rick Macklem.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. Neither the name of the University nor the names of its contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  *	@(#)cpu.h	8.4 (Berkeley) 1/4/94
35  */
36 
37 #ifndef _CPU_H_
38 #define	_CPU_H_
39 
40 /*
41  * Exported definitions unique to NetBSD/mips cpu support.
42  */
43 
44 #ifdef _LOCORE
45 #error Use assym.h to get definitions from <mips/cpu.h>
46 #endif
47 
48 #if defined(_KERNEL) || defined(_KMEMUSER)
49 
50 #if defined(_KERNEL_OPT)
51 #include "opt_cputype.h"
52 #include "opt_lockdebug.h"
53 #include "opt_multiprocessor.h"
54 #endif
55 
56 #include <mips/frame.h>
57 
58 #include <sys/cpu_data.h>
59 #include <sys/device_if.h>
60 #include <sys/evcnt.h>
61 #include <sys/kcpuset.h>
62 #include <sys/intr.h>
63 
64 typedef struct cpu_watchpoint {
65 	register_t	cw_addr;
66 	register_t	cw_mask;
67 	uint32_t	cw_asid;
68 	uint32_t	cw_mode;
69 } cpu_watchpoint_t;
70 
71 /* (abstract) mode bits */
72 #define	CPUWATCH_WRITE	__BIT(0)
73 #define	CPUWATCH_READ	__BIT(1)
74 #define	CPUWATCH_EXEC	__BIT(2)
75 #define	CPUWATCH_MASK	__BIT(3)
76 #define	CPUWATCH_ASID	__BIT(4)
77 #define	CPUWATCH_RWX	(CPUWATCH_EXEC|CPUWATCH_READ|CPUWATCH_WRITE)
78 
79 #define	CPUWATCH_MAX	8	/* max possible number of watchpoints */
80 
81 u_int		  cpuwatch_discover(void);
82 void		  cpuwatch_free(cpu_watchpoint_t *);
83 cpu_watchpoint_t *cpuwatch_alloc(void);
84 void		  cpuwatch_set_all(void);
85 void		  cpuwatch_clr_all(void);
86 void		  cpuwatch_set(cpu_watchpoint_t *);
87 void		  cpuwatch_clr(cpu_watchpoint_t *);
88 
89 struct cpu_info {
90 	struct cpu_data ci_data;	/* MI per-cpu data */
91 	void *ci_nmi_stack;		/* NMI exception stack */
92 	struct cpu_softc *ci_softc;	/* chip-dependent hook */
93 	device_t ci_dev;		/* owning device */
94 	cpuid_t ci_cpuid;		/* Machine-level identifier */
95 	u_long ci_cctr_freq;		/* cycle counter frequency */
96 	u_long ci_cpu_freq;		/* CPU frequency */
97 	u_long ci_cycles_per_hz;	/* CPU freq / hz */
98 	u_long ci_divisor_delay;	/* for delay/DELAY */
99 	u_long ci_divisor_recip;	/* unused, for obsolete microtime(9) */
100 	struct lwp *ci_curlwp;		/* currently running lwp */
101 	struct lwp *ci_onproc;		/* current user LWP / kthread */
102 	volatile int ci_want_resched;	/* user preemption pending */
103 	int ci_mtx_count;		/* negative count of held mutexes */
104 	int ci_mtx_oldspl;		/* saved SPL value */
105 	int ci_idepth;			/* hardware interrupt depth */
106 	int ci_cpl;			/* current [interrupt] priority level */
107 	uint32_t ci_next_cp0_clk_intr;	/* for hard clock intr scheduling */
108 	struct evcnt ci_ev_count_compare;		/* hard clock intr counter */
109 	struct evcnt ci_ev_count_compare_missed;	/* hard clock miss counter */
110 	struct lwp *ci_softlwps[SOFTINT_COUNT];
111 	volatile u_int ci_softints;
112 	struct evcnt ci_ev_fpu_loads;	/* fpu load counter */
113 	struct evcnt ci_ev_fpu_saves;	/* fpu save counter */
114 	struct evcnt ci_ev_dsp_loads;	/* dsp load counter */
115 	struct evcnt ci_ev_dsp_saves;	/* dsp save counter */
116 	struct evcnt ci_ev_tlbmisses;
117 
118 	/*
119 	 * Per-cpu pmap information
120 	 */
121 	int ci_tlb_slot;		/* reserved tlb entry for cpu_info */
122 	u_int ci_pmap_asid_cur;		/* current ASID */
123 	struct pmap_tlb_info *ci_tlb_info; /* tlb information for this cpu */
124 	union pmap_segtab *ci_pmap_segtabs[2];
125 #define	ci_pmap_user_segtab	ci_pmap_segtabs[0]
126 #define	ci_pmap_kern_segtab	ci_pmap_segtabs[1]
127 #ifdef _LP64
128 	union pmap_segtab *ci_pmap_seg0tabs[2];
129 #define	ci_pmap_user_seg0tab	ci_pmap_seg0tabs[0]
130 #define	ci_pmap_kern_seg0tab	ci_pmap_seg0tabs[1]
131 #endif
132 	vaddr_t ci_pmap_srcbase;	/* starting VA of ephemeral src space */
133 	vaddr_t ci_pmap_dstbase;	/* starting VA of ephemeral dst space */
134 
135 	u_int ci_cpuwatch_count;	/* number of watchpoints on this CPU */
136 	cpu_watchpoint_t ci_cpuwatch_tab[CPUWATCH_MAX];
137 
138 #ifdef MULTIPROCESSOR
139 	volatile u_long ci_flags;
140 	volatile uint64_t ci_request_ipis;
141 					/* bitmask of IPIs requested */
142 					/*  use on chips where hw cannot pass tag */
143 	uint64_t ci_active_ipis;	/* bitmask of IPIs being serviced */
144 	uint32_t ci_ksp_tlb_slot;	/* tlb entry for kernel stack */
145 	struct evcnt ci_evcnt_all_ipis;	/* aggregated IPI counter */
146 	struct evcnt ci_evcnt_per_ipi[NIPIS];	/* individual IPI counters*/
147 	struct evcnt ci_evcnt_synci_activate_rqst;
148 	struct evcnt ci_evcnt_synci_onproc_rqst;
149 	struct evcnt ci_evcnt_synci_deferred_rqst;
150 	struct evcnt ci_evcnt_synci_ipi_rqst;
151 
152 #define	CPUF_PRIMARY	0x01		/* CPU is primary CPU */
153 #define	CPUF_PRESENT	0x02		/* CPU is present */
154 #define	CPUF_RUNNING	0x04		/* CPU is running */
155 #define	CPUF_PAUSED	0x08		/* CPU is paused */
156 #define	CPUF_USERPMAP	0x20		/* CPU has a user pmap activated */
157 	kcpuset_t *ci_shootdowncpus;
158 	kcpuset_t *ci_multicastcpus;
159 	kcpuset_t *ci_watchcpus;
160 	kcpuset_t *ci_ddbcpus;
161 #endif
162 
163 };
164 #endif /* _KERNEL || _KMEMUSER */
165 
166 #ifdef _KERNEL
167 
168 #ifdef MULTIPROCESSOR
169 #define	CPU_INFO_ITERATOR		int
170 #define	CPU_INFO_FOREACH(cii, ci)	\
171     cii = 0, ci = &cpu_info_store; \
172     ci != NULL; \
173     cii++, \
174     ncpu ? (ci = cpu_infos[cii]) \
175          : (ci = NULL)
176 #else
177 #define	CPU_INFO_ITERATOR		int __unused
178 #define	CPU_INFO_FOREACH(cii, ci)	\
179     ci = &cpu_info_store; ci != NULL; ci = NULL
180 #endif
181 
182 /* Note: must be kept in sync with -ffixed-?? Makefile.mips. */
183 //	MIPS_CURLWP moved to <mips/regdef.h>
184 #define	MIPS_CURLWP_QUOTED	"$24"
185 #define	MIPS_CURLWP_LABEL	_L_T8
186 #define	MIPS_CURLWP_REG		_R_T8
187 
188 extern struct cpu_info cpu_info_store;
189 #ifdef MULTIPROCESSOR
190 extern struct cpu_info *cpuid_infos[];
191 #endif
192 register struct lwp *mips_curlwp asm(MIPS_CURLWP_QUOTED);
193 
194 #define	curlwp			mips_curlwp
195 #define	curcpu()		lwp_getcpu(curlwp)
196 #define	curpcb			((struct pcb *)lwp_getpcb(curlwp))
197 #ifdef MULTIPROCESSOR
198 #define	cpu_number()		(curcpu()->ci_index)
199 #define	CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
200 #else
201 #define	cpu_number()		(0)
202 #define	CPU_IS_PRIMARY(ci)	(true)
203 #endif
204 
205 /*
206  * definitions of cpu-dependent requirements
207  * referenced in generic code
208  */
209 
210 /*
211  * Send an inter-processor interrupt to each other CPU (excludes curcpu())
212  */
213 void cpu_broadcast_ipi(int);
214 
215 /*
216  * Send an inter-processor interrupt to CPUs in kcpuset (excludes curcpu())
217  */
218 void cpu_multicast_ipi(const kcpuset_t *, int);
219 
220 /*
221  * Send an inter-processor interrupt to another CPU.
222  */
223 int cpu_send_ipi(struct cpu_info *, int);
224 
225 /*
226  * cpu_intr(ppl, pc, status);  (most state needed by clockframe)
227  */
228 void cpu_intr(int, vaddr_t, uint32_t);
229 
230 /*
231  * Arguments to hardclock and gatherstats encapsulate the previous
232  * machine state in an opaque clockframe.
233  */
234 struct clockframe {
235 	vaddr_t		pc;	/* program counter at time of interrupt */
236 	uint32_t	sr;	/* status register at time of interrupt */
237 	bool		intr;	/* interrupted a interrupt */
238 };
239 
240 /*
241  * A port must provde CLKF_USERMODE() for use in machine-independent code.
242  * These differ on r4000 and r3000 systems; provide them in the
243  * port-dependent file that includes this one, using the macros below.
244  */
245 uint32_t cpu_clkf_usermode_mask(void);
246 
247 #define	CLKF_USERMODE(framep)	((framep)->sr & cpu_clkf_usermode_mask())
248 #define	CLKF_PC(framep)		((framep)->pc + 0)
249 #define	CLKF_INTR(framep)	((framep)->intr + 0)
250 
251 /*
252  * Misc prototypes and variable declarations.
253  */
254 #define	LWP_PC(l)	cpu_lwp_pc(l)
255 
256 struct proc;
257 struct lwp;
258 struct pcb;
259 struct reg;
260 
261 /*
262  * Notify the current lwp (l) that it has a signal pending,
263  * process as soon as possible.
264  */
265 void	cpu_signotify(struct lwp *);
266 
267 /*
268  * Give a profiling tick to the current process when the user profiling
269  * buffer pages are invalid.  On the MIPS, request an ast to send us
270  * through trap, marking the proc as needing a profiling tick.
271  */
272 void	cpu_need_proftick(struct lwp *);
273 
274 /* VM related hooks */
275 void	cpu_boot_secondary_processors(void);
276 void *	cpu_uarea_alloc(bool);
277 bool	cpu_uarea_free(void *);
278 void	cpu_proc_fork(struct proc *, struct proc *);
279 vaddr_t	cpu_lwp_pc(struct lwp *);
280 #ifdef _LP64
281 void	cpu_vmspace_exec(struct lwp *, vaddr_t, vaddr_t);
282 #endif
283 
284 #endif /* _KERNEL */
285 
286 /*
287  * CTL_MACHDEP definitions.
288  */
289 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
290 #define	CPU_BOOTED_KERNEL	2	/* string: booted kernel name */
291 #define	CPU_ROOT_DEVICE		3	/* string: root device name */
292 #define	CPU_LLSC		4	/* OS/CPU supports LL/SC instruction */
293 #define	CPU_LMMI		5	/* Loongson multimedia instructions */
294 
295 #endif /* _CPU_H_ */
296