1 /* $NetBSD: bus_space_defs.h,v 1.3 2016/09/15 21:45:37 jdolecek Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1996 Carnegie-Mellon University. 35 * All rights reserved. 36 * 37 * Author: Chris G. Demetriou 38 * 39 * Permission to use, copy, modify and distribute this software and 40 * its documentation is hereby granted, provided that both the copyright 41 * notice and this permission notice appear in all copies of the 42 * software, derivative works or modified versions, and any portions 43 * thereof, and that both notices appear in supporting documentation. 44 * 45 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 46 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 47 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 48 * 49 * Carnegie Mellon requests users of this software to return to 50 * 51 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 52 * School of Computer Science 53 * Carnegie Mellon University 54 * Pittsburgh PA 15213-3890 55 * 56 * any improvements or extensions that they make and grant Carnegie the 57 * rights to redistribute these changes. 58 */ 59 60 #ifndef _MIPS_BUS_SPACE_DEFS_H_ 61 #define _MIPS_BUS_SPACE_DEFS_H_ 62 63 #include <sys/types.h> 64 65 #ifdef _KERNEL 66 67 #define __BUS_SPACE_HAS_STREAM_METHODS 1 68 69 /* 70 * Turn on BUS_SPACE_DEBUG if the global DEBUG option is enabled. 71 */ 72 #if defined(DEBUG) && !defined(BUS_SPACE_DEBUG) 73 #define BUS_SPACE_DEBUG 74 #endif 75 76 #ifdef BUS_SPACE_DEBUG 77 #include <sys/systm.h> /* for printf() prototype */ 78 /* 79 * Macros for checking the aligned-ness of pointers passed to bus 80 * space ops. Strict alignment is required by the MIPS architecture, 81 * and a trap will occur if unaligned access is performed. These 82 * may aid in the debugging of a broken device driver by displaying 83 * useful information about the problem. 84 */ 85 #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \ 86 ((((u_long)(p)) & (sizeof(t)-1)) == 0) 87 88 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \ 89 ({ \ 90 if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \ 91 printf("%s 0x%lx not aligned to %lu bytes %s:%d\n", \ 92 d, (u_long)(p), (u_long)sizeof(t), \ 93 __FILE__, __LINE__); \ 94 } \ 95 (void) 0; \ 96 }) 97 98 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t) 99 #else 100 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) (void) 0 101 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 102 #endif /* BUS_SPACE_DEBUG */ 103 #endif /* _KERNEL */ 104 105 struct mips_bus_space_translation; 106 107 /* 108 * Addresses (in bus space). 109 */ 110 #ifdef __mips_n32 111 typedef int64_t bus_addr_t; 112 typedef uint64_t bus_size_t; 113 #define PRIxBUSADDR PRIx64 114 #define PRIxBUSSIZE PRIx64 115 #else 116 typedef paddr_t bus_addr_t; 117 typedef psize_t bus_size_t; 118 #define PRIxBUSADDR PRIxPADDR 119 #define PRIxBUSSIZE PRIxPSIZE 120 #endif 121 122 /* 123 * Access methods for bus space. 124 */ 125 typedef struct mips_bus_space *bus_space_tag_t; 126 /* 127 * If we are using the MIPS N32 ABI, allow bus_space_space_t to hold a 128 * 64-bit quantity which can hold an XKPHYS address. 129 */ 130 #if defined(__mips_n32) && defined(_MIPS_PADDR_T_64BIT) 131 typedef int64_t bus_space_handle_t; 132 #define PRIxBSH PRIx64 133 #else 134 typedef intptr_t bus_space_handle_t; 135 #define PRIxBSH PRIxPTR 136 #endif 137 138 struct mips_bus_space { 139 /* cookie */ 140 void *bs_cookie; 141 142 /* mapping/unmapping */ 143 int (*bs_map)(void *, bus_addr_t, bus_size_t, int, 144 bus_space_handle_t *, int); 145 void (*bs_unmap)(void *, bus_space_handle_t, bus_size_t, 146 int); 147 int (*bs_subregion)(void *, bus_space_handle_t, bus_size_t, 148 bus_size_t, bus_space_handle_t *); 149 150 /* MIPS SPECIFIC MAPPING METHOD */ 151 int (*bs_translate)(void *, bus_addr_t, bus_size_t, int, 152 struct mips_bus_space_translation *); 153 int (*bs_get_window)(void *, int, 154 struct mips_bus_space_translation *); 155 156 /* allocation/deallocation */ 157 int (*bs_alloc)(void *, bus_addr_t, bus_addr_t, 158 bus_size_t, bus_size_t, bus_size_t, int, 159 bus_addr_t *, bus_space_handle_t *); 160 void (*bs_free)(void *, bus_space_handle_t, bus_size_t); 161 162 /* get kernel virtual address */ 163 void * (*bs_vaddr)(void *, bus_space_handle_t); 164 165 /* mmap for user */ 166 paddr_t (*bs_mmap)(void *, bus_addr_t, off_t, int, int); 167 168 /* barrier */ 169 void (*bs_barrier)(void *, bus_space_handle_t, 170 bus_size_t, bus_size_t, int); 171 172 /* read (single) */ 173 uint8_t (*bs_r_1)(void *, bus_space_handle_t, bus_size_t); 174 uint16_t (*bs_r_2)(void *, bus_space_handle_t, bus_size_t); 175 uint32_t (*bs_r_4)(void *, bus_space_handle_t, bus_size_t); 176 uint64_t (*bs_r_8)(void *, bus_space_handle_t, bus_size_t); 177 178 /* read multiple */ 179 void (*bs_rm_1)(void *, bus_space_handle_t, bus_size_t, 180 uint8_t *, bus_size_t); 181 void (*bs_rm_2)(void *, bus_space_handle_t, bus_size_t, 182 uint16_t *, bus_size_t); 183 void (*bs_rm_4)(void *, bus_space_handle_t, bus_size_t, 184 uint32_t *, bus_size_t); 185 void (*bs_rm_8)(void *, bus_space_handle_t, bus_size_t, 186 uint64_t *, bus_size_t); 187 188 /* read region */ 189 void (*bs_rr_1)(void *, bus_space_handle_t, bus_size_t, 190 uint8_t *, bus_size_t); 191 void (*bs_rr_2)(void *, bus_space_handle_t, bus_size_t, 192 uint16_t *, bus_size_t); 193 void (*bs_rr_4)(void *, bus_space_handle_t, bus_size_t, 194 uint32_t *, bus_size_t); 195 void (*bs_rr_8)(void *, bus_space_handle_t, bus_size_t, 196 uint64_t *, bus_size_t); 197 198 /* write (single) */ 199 void (*bs_w_1)(void *, bus_space_handle_t, bus_size_t, 200 uint8_t); 201 void (*bs_w_2)(void *, bus_space_handle_t, bus_size_t, 202 uint16_t); 203 void (*bs_w_4)(void *, bus_space_handle_t, bus_size_t, 204 uint32_t); 205 void (*bs_w_8)(void *, bus_space_handle_t, bus_size_t, 206 uint64_t); 207 208 /* write multiple */ 209 void (*bs_wm_1)(void *, bus_space_handle_t, bus_size_t, 210 const uint8_t *, bus_size_t); 211 void (*bs_wm_2)(void *, bus_space_handle_t, bus_size_t, 212 const uint16_t *, bus_size_t); 213 void (*bs_wm_4)(void *, bus_space_handle_t, bus_size_t, 214 const uint32_t *, bus_size_t); 215 void (*bs_wm_8)(void *, bus_space_handle_t, bus_size_t, 216 const uint64_t *, bus_size_t); 217 218 /* write region */ 219 void (*bs_wr_1)(void *, bus_space_handle_t, bus_size_t, 220 const uint8_t *, bus_size_t); 221 void (*bs_wr_2)(void *, bus_space_handle_t, bus_size_t, 222 const uint16_t *, bus_size_t); 223 void (*bs_wr_4)(void *, bus_space_handle_t, bus_size_t, 224 const uint32_t *, bus_size_t); 225 void (*bs_wr_8)(void *, bus_space_handle_t, bus_size_t, 226 const uint64_t *, bus_size_t); 227 228 /* read (single) stream */ 229 uint8_t (*bs_rs_1)(void *, bus_space_handle_t, bus_size_t); 230 uint16_t (*bs_rs_2)(void *, bus_space_handle_t, bus_size_t); 231 uint32_t (*bs_rs_4)(void *, bus_space_handle_t, bus_size_t); 232 uint64_t (*bs_rs_8)(void *, bus_space_handle_t, bus_size_t); 233 234 /* read multiple stream */ 235 void (*bs_rms_1)(void *, bus_space_handle_t, bus_size_t, 236 uint8_t *, bus_size_t); 237 void (*bs_rms_2)(void *, bus_space_handle_t, bus_size_t, 238 uint16_t *, bus_size_t); 239 void (*bs_rms_4)(void *, bus_space_handle_t, bus_size_t, 240 uint32_t *, bus_size_t); 241 void (*bs_rms_8)(void *, bus_space_handle_t, bus_size_t, 242 uint64_t *, bus_size_t); 243 244 /* read region stream */ 245 void (*bs_rrs_1)(void *, bus_space_handle_t, bus_size_t, 246 uint8_t *, bus_size_t); 247 void (*bs_rrs_2)(void *, bus_space_handle_t, bus_size_t, 248 uint16_t *, bus_size_t); 249 void (*bs_rrs_4)(void *, bus_space_handle_t, bus_size_t, 250 uint32_t *, bus_size_t); 251 void (*bs_rrs_8)(void *, bus_space_handle_t, bus_size_t, 252 uint64_t *, bus_size_t); 253 254 /* write (single) stream */ 255 void (*bs_ws_1)(void *, bus_space_handle_t, bus_size_t, 256 uint8_t); 257 void (*bs_ws_2)(void *, bus_space_handle_t, bus_size_t, 258 uint16_t); 259 void (*bs_ws_4)(void *, bus_space_handle_t, bus_size_t, 260 uint32_t); 261 void (*bs_ws_8)(void *, bus_space_handle_t, bus_size_t, 262 uint64_t); 263 264 /* write multiple stream */ 265 void (*bs_wms_1)(void *, bus_space_handle_t, bus_size_t, 266 const uint8_t *, bus_size_t); 267 void (*bs_wms_2)(void *, bus_space_handle_t, bus_size_t, 268 const uint16_t *, bus_size_t); 269 void (*bs_wms_4)(void *, bus_space_handle_t, bus_size_t, 270 const uint32_t *, bus_size_t); 271 void (*bs_wms_8)(void *, bus_space_handle_t, bus_size_t, 272 const uint64_t *, bus_size_t); 273 274 /* write region stream */ 275 void (*bs_wrs_1)(void *, bus_space_handle_t, bus_size_t, 276 const uint8_t *, bus_size_t); 277 void (*bs_wrs_2)(void *, bus_space_handle_t, bus_size_t, 278 const uint16_t *, bus_size_t); 279 void (*bs_wrs_4)(void *, bus_space_handle_t, bus_size_t, 280 const uint32_t *, bus_size_t); 281 void (*bs_wrs_8)(void *, bus_space_handle_t, bus_size_t, 282 const uint64_t *, bus_size_t); 283 284 /* set multiple */ 285 void (*bs_sm_1)(void *, bus_space_handle_t, bus_size_t, 286 uint8_t, bus_size_t); 287 void (*bs_sm_2)(void *, bus_space_handle_t, bus_size_t, 288 uint16_t, bus_size_t); 289 void (*bs_sm_4)(void *, bus_space_handle_t, bus_size_t, 290 uint32_t, bus_size_t); 291 void (*bs_sm_8)(void *, bus_space_handle_t, bus_size_t, 292 uint64_t, bus_size_t); 293 294 /* set region */ 295 void (*bs_sr_1)(void *, bus_space_handle_t, bus_size_t, 296 uint8_t, bus_size_t); 297 void (*bs_sr_2)(void *, bus_space_handle_t, bus_size_t, 298 uint16_t, bus_size_t); 299 void (*bs_sr_4)(void *, bus_space_handle_t, bus_size_t, 300 uint32_t, bus_size_t); 301 void (*bs_sr_8)(void *, bus_space_handle_t, bus_size_t, 302 uint64_t, bus_size_t); 303 304 /* copy */ 305 void (*bs_c_1)(void *, bus_space_handle_t, bus_size_t, 306 bus_space_handle_t, bus_size_t, bus_size_t); 307 void (*bs_c_2)(void *, bus_space_handle_t, bus_size_t, 308 bus_space_handle_t, bus_size_t, bus_size_t); 309 void (*bs_c_4)(void *, bus_space_handle_t, bus_size_t, 310 bus_space_handle_t, bus_size_t, bus_size_t); 311 void (*bs_c_8)(void *, bus_space_handle_t, bus_size_t, 312 bus_space_handle_t, bus_size_t, bus_size_t); 313 }; 314 315 /* 316 * Translation of an MIPS bus address; INTERNAL USE ONLY. 317 */ 318 struct mips_bus_space_translation { 319 bus_addr_t mbst_bus_start; /* start of bus window */ 320 bus_addr_t mbst_bus_end; /* end of bus window */ 321 paddr_t mbst_sys_start; /* start of sysBus window */ 322 paddr_t mbst_sys_end; /* end of sysBus window */ 323 int mbst_align_stride;/* alignment stride */ 324 int mbst_flags; /* flags; see below */ 325 }; 326 327 #define BUS_SPACE_MAP_CACHEABLE 0x01 328 #define BUS_SPACE_MAP_LINEAR 0x02 329 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 330 331 #ifdef _KERNEL 332 333 #define BUS_SPACE_BARRIER_READ 0x01 334 #define BUS_SPACE_BARRIER_WRITE 0x02 335 336 #endif /* _KERNEL */ 337 338 #endif /* _MIPS_BUS_SPACE_DEFS_H_ */ 339