xref: /netbsd-src/sys/arch/mips/include/bus_space_defs.h (revision 6a493d6bc668897c91594964a732d38505b70cbb)
1 /*	$NetBSD: bus_space_defs.h,v 1.1 2011/07/01 17:28:55 dyoung Exp $	*/
2 
3 /*-
4  * Copyright (c) 1997, 1998, 2000, 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 /*
34  * Copyright (c) 1996 Carnegie-Mellon University.
35  * All rights reserved.
36  *
37  * Author: Chris G. Demetriou
38  *
39  * Permission to use, copy, modify and distribute this software and
40  * its documentation is hereby granted, provided that both the copyright
41  * notice and this permission notice appear in all copies of the
42  * software, derivative works or modified versions, and any portions
43  * thereof, and that both notices appear in supporting documentation.
44  *
45  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
46  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
47  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
48  *
49  * Carnegie Mellon requests users of this software to return to
50  *
51  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
52  *  School of Computer Science
53  *  Carnegie Mellon University
54  *  Pittsburgh PA 15213-3890
55  *
56  * any improvements or extensions that they make and grant Carnegie the
57  * rights to redistribute these changes.
58  */
59 
60 #ifndef _MIPS_BUS_SPACE_DEFS_H_
61 #define	_MIPS_BUS_SPACE_DEFS_H_
62 
63 #include <sys/types.h>
64 
65 #ifdef _KERNEL
66 
67 #define	__BUS_SPACE_HAS_STREAM_METHODS	1
68 
69 /*
70  * Turn on BUS_SPACE_DEBUG if the global DEBUG option is enabled.
71  */
72 #if defined(DEBUG) && !defined(BUS_SPACE_DEBUG)
73 #define	BUS_SPACE_DEBUG
74 #endif
75 
76 #ifdef BUS_SPACE_DEBUG
77 #include <sys/systm.h> /* for printf() prototype */
78 /*
79  * Macros for checking the aligned-ness of pointers passed to bus
80  * space ops.  Strict alignment is required by the MIPS architecture,
81  * and a trap will occur if unaligned access is performed.  These
82  * may aid in the debugging of a broken device driver by displaying
83  * useful information about the problem.
84  */
85 #define	__BUS_SPACE_ALIGNED_ADDRESS(p, t)				\
86 	((((u_long)(p)) & (sizeof(t)-1)) == 0)
87 
88 #define	__BUS_SPACE_ADDRESS_SANITY(p, t, d)				\
89 ({									\
90 	if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) {			\
91 		printf("%s 0x%lx not aligned to %lu bytes %s:%d\n",	\
92 		    d, (u_long)(p), (u_long)sizeof(t),			\
93 		    __FILE__, __LINE__);				\
94 	}								\
95 	(void) 0;							\
96 })
97 
98 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
99 #else
100 #define	__BUS_SPACE_ADDRESS_SANITY(p, t, d)	(void) 0
101 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
102 #endif /* BUS_SPACE_DEBUG */
103 #endif /* _KERNEL */
104 
105 struct mips_bus_space_translation;
106 
107 /*
108  * Addresses (in bus space).
109  */
110 typedef paddr_t bus_addr_t;
111 typedef psize_t bus_size_t;
112 #define	PRIxBUSADDR	PRIxPADDR
113 #define	PRIxBUSSIZE	PRIxPSIZE
114 
115 /*
116  * Access methods for bus space.
117  */
118 typedef struct mips_bus_space *bus_space_tag_t;
119 typedef intptr_t bus_space_handle_t;
120 #define	PRIxBSH		PRIxPTR
121 
122 struct mips_bus_space {
123 	/* cookie */
124 	void		*bs_cookie;
125 
126 	/* mapping/unmapping */
127 	int		(*bs_map)(void *, bus_addr_t, bus_size_t, int,
128 			    bus_space_handle_t *, int);
129 	void		(*bs_unmap)(void *, bus_space_handle_t, bus_size_t,
130 			    int);
131 	int		(*bs_subregion)(void *, bus_space_handle_t, bus_size_t,
132 			    bus_size_t, bus_space_handle_t *);
133 
134 	/* MIPS SPECIFIC MAPPING METHOD */
135 	int		(*bs_translate)(void *, bus_addr_t, bus_size_t, int,
136 			    struct mips_bus_space_translation *);
137 	int		(*bs_get_window)(void *, int,
138 			    struct mips_bus_space_translation *);
139 
140 	/* allocation/deallocation */
141 	int		(*bs_alloc)(void *, bus_addr_t, bus_addr_t,
142 			    bus_size_t, bus_size_t, bus_size_t, int,
143 			    bus_addr_t *, bus_space_handle_t *);
144 	void		(*bs_free)(void *, bus_space_handle_t, bus_size_t);
145 
146 	/* get kernel virtual address */
147 	void *		(*bs_vaddr)(void *, bus_space_handle_t);
148 
149 	/* mmap for user */
150 	paddr_t		(*bs_mmap)(void *, bus_addr_t, off_t, int, int);
151 
152 	/* barrier */
153 	void		(*bs_barrier)(void *, bus_space_handle_t,
154 			    bus_size_t, bus_size_t, int);
155 
156 	/* read (single) */
157 	uint8_t		(*bs_r_1)(void *, bus_space_handle_t, bus_size_t);
158 	uint16_t	(*bs_r_2)(void *, bus_space_handle_t, bus_size_t);
159 	uint32_t	(*bs_r_4)(void *, bus_space_handle_t, bus_size_t);
160 	uint64_t	(*bs_r_8)(void *, bus_space_handle_t, bus_size_t);
161 
162 	/* read multiple */
163 	void		(*bs_rm_1)(void *, bus_space_handle_t, bus_size_t,
164 			    uint8_t *, bus_size_t);
165 	void		(*bs_rm_2)(void *, bus_space_handle_t, bus_size_t,
166 			    uint16_t *, bus_size_t);
167 	void		(*bs_rm_4)(void *, bus_space_handle_t, bus_size_t,
168 			    uint32_t *, bus_size_t);
169 	void		(*bs_rm_8)(void *, bus_space_handle_t, bus_size_t,
170 			    uint64_t *, bus_size_t);
171 
172 	/* read region */
173 	void		(*bs_rr_1)(void *, bus_space_handle_t, bus_size_t,
174 			    uint8_t *, bus_size_t);
175 	void		(*bs_rr_2)(void *, bus_space_handle_t, bus_size_t,
176 			    uint16_t *, bus_size_t);
177 	void		(*bs_rr_4)(void *, bus_space_handle_t, bus_size_t,
178 			    uint32_t *, bus_size_t);
179 	void		(*bs_rr_8)(void *, bus_space_handle_t, bus_size_t,
180 			    uint64_t *, bus_size_t);
181 
182 	/* write (single) */
183 	void		(*bs_w_1)(void *, bus_space_handle_t, bus_size_t,
184 			    uint8_t);
185 	void		(*bs_w_2)(void *, bus_space_handle_t, bus_size_t,
186 			    uint16_t);
187 	void		(*bs_w_4)(void *, bus_space_handle_t, bus_size_t,
188 			    uint32_t);
189 	void		(*bs_w_8)(void *, bus_space_handle_t, bus_size_t,
190 			    uint64_t);
191 
192 	/* write multiple */
193 	void		(*bs_wm_1)(void *, bus_space_handle_t, bus_size_t,
194 			    const uint8_t *, bus_size_t);
195 	void		(*bs_wm_2)(void *, bus_space_handle_t, bus_size_t,
196 			    const uint16_t *, bus_size_t);
197 	void		(*bs_wm_4)(void *, bus_space_handle_t, bus_size_t,
198 			    const uint32_t *, bus_size_t);
199 	void		(*bs_wm_8)(void *, bus_space_handle_t, bus_size_t,
200 			    const uint64_t *, bus_size_t);
201 
202 	/* write region */
203 	void		(*bs_wr_1)(void *, bus_space_handle_t, bus_size_t,
204 			    const uint8_t *, bus_size_t);
205 	void		(*bs_wr_2)(void *, bus_space_handle_t, bus_size_t,
206 			    const uint16_t *, bus_size_t);
207 	void		(*bs_wr_4)(void *, bus_space_handle_t, bus_size_t,
208 			    const uint32_t *, bus_size_t);
209 	void		(*bs_wr_8)(void *, bus_space_handle_t, bus_size_t,
210 			    const uint64_t *, bus_size_t);
211 
212 	/* read (single) stream */
213 	uint8_t		(*bs_rs_1)(void *, bus_space_handle_t, bus_size_t);
214 	uint16_t	(*bs_rs_2)(void *, bus_space_handle_t, bus_size_t);
215 	uint32_t	(*bs_rs_4)(void *, bus_space_handle_t, bus_size_t);
216 	uint64_t	(*bs_rs_8)(void *, bus_space_handle_t, bus_size_t);
217 
218 	/* read multiple stream */
219 	void		(*bs_rms_1)(void *, bus_space_handle_t, bus_size_t,
220 			    uint8_t *, bus_size_t);
221 	void		(*bs_rms_2)(void *, bus_space_handle_t, bus_size_t,
222 			    uint16_t *, bus_size_t);
223 	void		(*bs_rms_4)(void *, bus_space_handle_t, bus_size_t,
224 			    uint32_t *, bus_size_t);
225 	void		(*bs_rms_8)(void *, bus_space_handle_t, bus_size_t,
226 			    uint64_t *, bus_size_t);
227 
228 	/* read region stream */
229 	void		(*bs_rrs_1)(void *, bus_space_handle_t, bus_size_t,
230 			    uint8_t *, bus_size_t);
231 	void		(*bs_rrs_2)(void *, bus_space_handle_t, bus_size_t,
232 			    uint16_t *, bus_size_t);
233 	void		(*bs_rrs_4)(void *, bus_space_handle_t, bus_size_t,
234 			    uint32_t *, bus_size_t);
235 	void		(*bs_rrs_8)(void *, bus_space_handle_t, bus_size_t,
236 			    uint64_t *, bus_size_t);
237 
238 	/* write (single) stream */
239 	void		(*bs_ws_1)(void *, bus_space_handle_t, bus_size_t,
240 			    uint8_t);
241 	void		(*bs_ws_2)(void *, bus_space_handle_t, bus_size_t,
242 			    uint16_t);
243 	void		(*bs_ws_4)(void *, bus_space_handle_t, bus_size_t,
244 			    uint32_t);
245 	void		(*bs_ws_8)(void *, bus_space_handle_t, bus_size_t,
246 			    uint64_t);
247 
248 	/* write multiple stream */
249 	void		(*bs_wms_1)(void *, bus_space_handle_t, bus_size_t,
250 			    const uint8_t *, bus_size_t);
251 	void		(*bs_wms_2)(void *, bus_space_handle_t, bus_size_t,
252 			    const uint16_t *, bus_size_t);
253 	void		(*bs_wms_4)(void *, bus_space_handle_t, bus_size_t,
254 			    const uint32_t *, bus_size_t);
255 	void		(*bs_wms_8)(void *, bus_space_handle_t, bus_size_t,
256 			    const uint64_t *, bus_size_t);
257 
258 	/* write region stream */
259 	void		(*bs_wrs_1)(void *, bus_space_handle_t, bus_size_t,
260 			    const uint8_t *, bus_size_t);
261 	void		(*bs_wrs_2)(void *, bus_space_handle_t, bus_size_t,
262 			    const uint16_t *, bus_size_t);
263 	void		(*bs_wrs_4)(void *, bus_space_handle_t, bus_size_t,
264 			    const uint32_t *, bus_size_t);
265 	void		(*bs_wrs_8)(void *, bus_space_handle_t, bus_size_t,
266 			    const uint64_t *, bus_size_t);
267 
268 	/* set multiple */
269 	void		(*bs_sm_1)(void *, bus_space_handle_t, bus_size_t,
270 			    uint8_t, bus_size_t);
271 	void		(*bs_sm_2)(void *, bus_space_handle_t, bus_size_t,
272 			    uint16_t, bus_size_t);
273 	void		(*bs_sm_4)(void *, bus_space_handle_t, bus_size_t,
274 			    uint32_t, bus_size_t);
275 	void		(*bs_sm_8)(void *, bus_space_handle_t, bus_size_t,
276 			    uint64_t, bus_size_t);
277 
278 	/* set region */
279 	void		(*bs_sr_1)(void *, bus_space_handle_t, bus_size_t,
280 			    uint8_t, bus_size_t);
281 	void		(*bs_sr_2)(void *, bus_space_handle_t, bus_size_t,
282 			    uint16_t, bus_size_t);
283 	void		(*bs_sr_4)(void *, bus_space_handle_t, bus_size_t,
284 			    uint32_t, bus_size_t);
285 	void		(*bs_sr_8)(void *, bus_space_handle_t, bus_size_t,
286 			    uint64_t, bus_size_t);
287 
288 	/* copy */
289 	void		(*bs_c_1)(void *, bus_space_handle_t, bus_size_t,
290 			    bus_space_handle_t, bus_size_t, bus_size_t);
291 	void		(*bs_c_2)(void *, bus_space_handle_t, bus_size_t,
292 			    bus_space_handle_t, bus_size_t, bus_size_t);
293 	void		(*bs_c_4)(void *, bus_space_handle_t, bus_size_t,
294 			    bus_space_handle_t, bus_size_t, bus_size_t);
295 	void		(*bs_c_8)(void *, bus_space_handle_t, bus_size_t,
296 			    bus_space_handle_t, bus_size_t, bus_size_t);
297 };
298 
299 /*
300  * Translation of an MIPS bus address; INTERNAL USE ONLY.
301  */
302 struct mips_bus_space_translation {
303 	bus_addr_t	mbst_bus_start;	/* start of bus window */
304 	bus_addr_t	mbst_bus_end;	/* end of bus window */
305 	paddr_t		mbst_sys_start;	/* start of sysBus window */
306 	paddr_t		mbst_sys_end;	/* end of sysBus window */
307 	int		mbst_align_stride;/* alignment stride */
308 	int		mbst_flags;	/* flags; see below */
309 };
310 
311 #define	BUS_SPACE_MAP_CACHEABLE		0x01
312 #define	BUS_SPACE_MAP_LINEAR		0x02
313 #define	BUS_SPACE_MAP_PREFETCHABLE     	0x04
314 
315 #ifdef _KERNEL
316 
317 #define	BUS_SPACE_BARRIER_READ	0x01
318 #define	BUS_SPACE_BARRIER_WRITE	0x02
319 
320 /*
321  * New style.
322  */
323 #define	BUS_SPACE_BARRIER_SYNC		0x03
324 #define	BUS_SPACE_BARRIER_READ_BEFORE_READ	BUS_SPACE_BARRIER_READ
325 #define	BUS_SPACE_BARRIER_READ_BEFORE_WRITE	BUS_SPACE_BARRIER_READ
326 #define	BUS_SPACE_BARRIER_WRITE_BEFORE_READ	BUS_SPACE_BARRIER_WRITE
327 #define	BUS_SPACE_BARRIER_WRITE_BEFORE_WRITE	BUS_SPACE_BARRIER_WRITE
328 
329 #endif /* _KERNEL */
330 
331 #endif /* _MIPS_BUS_SPACE_DEFS_H_ */
332