1 /* $NetBSD: asm.h,v 1.61 2020/08/12 08:56:37 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93 35 */ 36 37 /* 38 * machAsmDefs.h -- 39 * 40 * Macros used when writing assembler programs. 41 * 42 * Copyright (C) 1989 Digital Equipment Corporation. 43 * Permission to use, copy, modify, and distribute this software and 44 * its documentation for any purpose and without fee is hereby granted, 45 * provided that the above copyright notice appears in all copies. 46 * Digital Equipment Corporation makes no representations about the 47 * suitability of this software for any purpose. It is provided "as is" 48 * without express or implied warranty. 49 * 50 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h, 51 * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL) 52 */ 53 54 #ifndef _MIPS_ASM_H 55 #define _MIPS_ASM_H 56 57 #include <sys/cdefs.h> /* for API selection */ 58 #include <mips/regdef.h> 59 60 #define __BIT(n) (1 << (n)) 61 #define __BITS(hi,lo) ((~((~0)<<((hi)+1)))&((~0)<<(lo))) 62 63 #define __LOWEST_SET_BIT(__mask) ((((__mask) - 1) & (__mask)) ^ (__mask)) 64 #define __SHIFTOUT(__x, __mask) (((__x) & (__mask)) / __LOWEST_SET_BIT(__mask)) 65 #define __SHIFTIN(__x, __mask) ((__x) * __LOWEST_SET_BIT(__mask)) 66 67 /* 68 * Define -pg profile entry code. 69 * Must always be noreorder, must never use a macro instruction 70 * Final addiu to t9 must always equal the size of this _KERN_MCOUNT 71 */ 72 #define _KERN_MCOUNT \ 73 .set push; \ 74 .set noreorder; \ 75 .set noat; \ 76 subu sp,sp,16; \ 77 sw t9,12(sp); \ 78 move AT,ra; \ 79 lui t9,%hi(_mcount); \ 80 addiu t9,t9,%lo(_mcount); \ 81 jalr t9; \ 82 nop; \ 83 lw t9,4(sp); \ 84 addiu sp,sp,8; \ 85 addiu t9,t9,40; \ 86 .set pop; 87 88 #ifdef GPROF 89 #define MCOUNT _KERN_MCOUNT 90 #else 91 #define MCOUNT 92 #endif 93 94 #ifdef USE_AENT 95 #define AENT(x) \ 96 .aent x, 0 97 #else 98 #define AENT(x) 99 #endif 100 101 /* 102 * WEAK_ALIAS: create a weak alias. 103 */ 104 #define WEAK_ALIAS(alias,sym) \ 105 .weak alias; \ 106 alias = sym 107 /* 108 * STRONG_ALIAS: create a strong alias. 109 */ 110 #define STRONG_ALIAS(alias,sym) \ 111 .globl alias; \ 112 alias = sym 113 114 /* 115 * WARN_REFERENCES: create a warning if the specified symbol is referenced. 116 */ 117 #define WARN_REFERENCES(sym,msg) \ 118 .pushsection __CONCAT(.gnu.warning.,sym); \ 119 .ascii msg; \ 120 .popsection 121 122 /* 123 * STATIC_LEAF_NOPROFILE 124 * No profilable local leaf routine. 125 */ 126 #define STATIC_LEAF_NOPROFILE(x) \ 127 .ent _C_LABEL(x); \ 128 _C_LABEL(x): ; \ 129 .frame sp, 0, ra 130 131 /* 132 * LEAF_NOPROFILE 133 * No profilable leaf routine. 134 */ 135 #define LEAF_NOPROFILE(x) \ 136 .globl _C_LABEL(x); \ 137 STATIC_LEAF_NOPROFILE(x) 138 139 /* 140 * STATIC_LEAF 141 * Declare a local leaf function. 142 */ 143 #define STATIC_LEAF(x) \ 144 STATIC_LEAF_NOPROFILE(x); \ 145 MCOUNT 146 147 /* 148 * LEAF 149 * A leaf routine does 150 * - call no other function, 151 * - never use any register that callee-saved (S0-S8), and 152 * - not use any local stack storage. 153 */ 154 #define LEAF(x) \ 155 LEAF_NOPROFILE(x); \ 156 MCOUNT 157 158 /* 159 * STATIC_XLEAF 160 * declare alternate entry to a static leaf routine 161 */ 162 #define STATIC_XLEAF(x) \ 163 AENT (_C_LABEL(x)); \ 164 _C_LABEL(x): 165 166 /* 167 * XLEAF 168 * declare alternate entry to leaf routine 169 */ 170 #define XLEAF(x) \ 171 .globl _C_LABEL(x); \ 172 STATIC_XLEAF(x) 173 174 /* 175 * STATIC_NESTED_NOPROFILE 176 * No profilable local nested routine. 177 */ 178 #define STATIC_NESTED_NOPROFILE(x, fsize, retpc) \ 179 .ent _C_LABEL(x); \ 180 .type _C_LABEL(x), @function; \ 181 _C_LABEL(x): ; \ 182 .frame sp, fsize, retpc 183 184 /* 185 * NESTED_NOPROFILE 186 * No profilable nested routine. 187 */ 188 #define NESTED_NOPROFILE(x, fsize, retpc) \ 189 .globl _C_LABEL(x); \ 190 STATIC_NESTED_NOPROFILE(x, fsize, retpc) 191 192 /* 193 * NESTED 194 * A function calls other functions and needs 195 * therefore stack space to save/restore registers. 196 */ 197 #define NESTED(x, fsize, retpc) \ 198 NESTED_NOPROFILE(x, fsize, retpc); \ 199 MCOUNT 200 201 /* 202 * STATIC_NESTED 203 * No profilable local nested routine. 204 */ 205 #define STATIC_NESTED(x, fsize, retpc) \ 206 STATIC_NESTED_NOPROFILE(x, fsize, retpc); \ 207 MCOUNT 208 209 /* 210 * XNESTED 211 * declare alternate entry point to nested routine. 212 */ 213 #define XNESTED(x) \ 214 .globl _C_LABEL(x); \ 215 AENT (_C_LABEL(x)); \ 216 _C_LABEL(x): 217 218 /* 219 * END 220 * Mark end of a procedure. 221 */ 222 #define END(x) \ 223 .end _C_LABEL(x); \ 224 .size _C_LABEL(x), . - _C_LABEL(x) 225 226 /* 227 * IMPORT -- import external symbol 228 */ 229 #define IMPORT(sym, size) \ 230 .extern _C_LABEL(sym),size 231 232 /* 233 * EXPORT -- export definition of symbol 234 */ 235 #define EXPORT(x) \ 236 .globl _C_LABEL(x); \ 237 _C_LABEL(x): 238 239 /* 240 * VECTOR 241 * exception vector entrypoint 242 * XXX: regmask should be used to generate .mask 243 */ 244 #define VECTOR(x, regmask) \ 245 .ent _C_LABEL(x); \ 246 EXPORT(x); \ 247 248 #define VECTOR_END(x) \ 249 EXPORT(__CONCAT(x,_end)); \ 250 END(x); \ 251 .org _C_LABEL(x) + 0x80 252 253 /* 254 * Macros to panic and printf from assembly language. 255 */ 256 #define PANIC(msg) \ 257 PTR_LA a0, 9f; \ 258 jal _C_LABEL(panic); \ 259 nop; \ 260 MSG(msg) 261 262 #define PRINTF(msg) \ 263 PTR_LA a0, 9f; \ 264 jal _C_LABEL(printf); \ 265 nop; \ 266 MSG(msg) 267 268 #define MSG(msg) \ 269 .rdata; \ 270 9: .asciz msg; \ 271 .text 272 273 #define ASMSTR(str) \ 274 .asciz str; \ 275 .align 3 276 277 #define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ 278 .asciz x; \ 279 .popsection 280 281 /* 282 * XXX retain dialects XXX 283 */ 284 #define ALEAF(x) XLEAF(x) 285 #define NLEAF(x) LEAF_NOPROFILE(x) 286 #define NON_LEAF(x, fsize, retpc) NESTED(x, fsize, retpc) 287 #define NNON_LEAF(x, fsize, retpc) NESTED_NOPROFILE(x, fsize, retpc) 288 289 #if defined(__mips_o32) 290 #define SZREG 4 291 #else 292 #define SZREG 8 293 #endif 294 295 #if defined(__mips_o32) || defined(__mips_o64) 296 #define ALSK 7 /* stack alignment */ 297 #define ALMASK -7 /* stack alignment */ 298 #define SZFPREG 4 299 #define FP_L lwc1 300 #define FP_S swc1 301 #else 302 #define ALSK 15 /* stack alignment */ 303 #define ALMASK -15 /* stack alignment */ 304 #define SZFPREG 8 305 #define FP_L ldc1 306 #define FP_S sdc1 307 #endif 308 309 /* 310 * standard callframe { 311 * register_t cf_args[4]; arg0 - arg3 (only on o32 and o64) 312 * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1) 313 * register_t cf_gp; global pointer (only on n32 and n64) 314 * register_t cf_sp; frame pointer 315 * register_t cf_ra; return address 316 * }; 317 */ 318 #if defined(__mips_o32) || defined(__mips_o64) 319 #define CALLFRAME_SIZ (SZREG * (4 + 2)) 320 #define CALLFRAME_S0 0 321 #elif defined(__mips_n32) || defined(__mips_n64) 322 #define CALLFRAME_SIZ (SZREG * 4) 323 #define CALLFRAME_S0 (CALLFRAME_SIZ - 4 * SZREG) 324 #endif 325 #ifndef _KERNEL 326 #define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG) 327 #endif 328 #define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG) 329 #define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG) 330 331 /* 332 * While it would be nice to be compatible with the SGI 333 * REG_L and REG_S macros, because they do not take parameters, it 334 * is impossible to use them with the _MIPS_SIM_ABIX32 model. 335 * 336 * These macros hide the use of mips3 instructions from the 337 * assembler to prevent the assembler from generating 64-bit style 338 * ABI calls. 339 */ 340 #ifdef __mips_o32 341 #define PTR_ADD add 342 #define PTR_ADDI addi 343 #define PTR_ADDU addu 344 #define PTR_ADDIU addiu 345 #define PTR_SUB subu 346 #define PTR_SUBI subi 347 #define PTR_SUBU subu 348 #define PTR_SUBIU subu 349 #define PTR_L lw 350 #define PTR_LA la 351 #define PTR_S sw 352 #define PTR_SLL sll 353 #define PTR_SLLV sllv 354 #define PTR_SRL srl 355 #define PTR_SRLV srlv 356 #define PTR_SRA sra 357 #define PTR_SRAV srav 358 #define PTR_LL ll 359 #define PTR_SC sc 360 #define PTR_WORD .word 361 #define PTR_SCALESHIFT 2 362 #else /* _MIPS_SZPTR == 64 */ 363 #define PTR_ADD dadd 364 #define PTR_ADDI daddi 365 #define PTR_ADDU daddu 366 #define PTR_ADDIU daddiu 367 #define PTR_SUB dsubu 368 #define PTR_SUBI dsubi 369 #define PTR_SUBU dsubu 370 #define PTR_SUBIU dsubu 371 #ifdef __mips_n32 372 #define PTR_L lw 373 #define PTR_LL ll 374 #define PTR_SC sc 375 #define PTR_S sw 376 #define PTR_SCALESHIFT 2 377 #define PTR_WORD .word 378 #else 379 #define PTR_L ld 380 #define PTR_LL lld 381 #define PTR_SC scd 382 #define PTR_S sd 383 #define PTR_SCALESHIFT 3 384 #define PTR_WORD .dword 385 #endif 386 #define PTR_LA dla 387 #define PTR_SLL dsll 388 #define PTR_SLLV dsllv 389 #define PTR_SRL dsrl 390 #define PTR_SRLV dsrlv 391 #define PTR_SRA dsra 392 #define PTR_SRAV dsrav 393 #endif /* _MIPS_SZPTR == 64 */ 394 395 #if _MIPS_SZINT == 32 396 #define INT_ADD add 397 #define INT_ADDI addi 398 #define INT_ADDU addu 399 #define INT_ADDIU addiu 400 #define INT_SUB subu 401 #define INT_SUBI subi 402 #define INT_SUBU subu 403 #define INT_SUBIU subu 404 #define INT_L lw 405 #define INT_LA la 406 #define INT_S sw 407 #define INT_SLL sll 408 #define INT_SLLV sllv 409 #define INT_SRL srl 410 #define INT_SRLV srlv 411 #define INT_SRA sra 412 #define INT_SRAV srav 413 #define INT_LL ll 414 #define INT_SC sc 415 #define INT_WORD .word 416 #define INT_SCALESHIFT 2 417 #else 418 #define INT_ADD dadd 419 #define INT_ADDI daddi 420 #define INT_ADDU daddu 421 #define INT_ADDIU daddiu 422 #define INT_SUB dsubu 423 #define INT_SUBI dsubi 424 #define INT_SUBU dsubu 425 #define INT_SUBIU dsubu 426 #define INT_L ld 427 #define INT_LA dla 428 #define INT_S sd 429 #define INT_SLL dsll 430 #define INT_SLLV dsllv 431 #define INT_SRL dsrl 432 #define INT_SRLV dsrlv 433 #define INT_SRA dsra 434 #define INT_SRAV dsrav 435 #define INT_LL lld 436 #define INT_SC scd 437 #define INT_WORD .dword 438 #define INT_SCALESHIFT 3 439 #endif 440 441 #if _MIPS_SZLONG == 32 442 #define LONG_ADD add 443 #define LONG_ADDI addi 444 #define LONG_ADDU addu 445 #define LONG_ADDIU addiu 446 #define LONG_SUB subu 447 #define LONG_SUBI subi 448 #define LONG_SUBU subu 449 #define LONG_SUBIU subu 450 #define LONG_L lw 451 #define LONG_LA la 452 #define LONG_S sw 453 #define LONG_SLL sll 454 #define LONG_SLLV sllv 455 #define LONG_SRL srl 456 #define LONG_SRLV srlv 457 #define LONG_SRA sra 458 #define LONG_SRAV srav 459 #define LONG_LL ll 460 #define LONG_SC sc 461 #define LONG_WORD .word 462 #define LONG_SCALESHIFT 2 463 #else 464 #define LONG_ADD dadd 465 #define LONG_ADDI daddi 466 #define LONG_ADDU daddu 467 #define LONG_ADDIU daddiu 468 #define LONG_SUB dsubu 469 #define LONG_SUBI dsubi 470 #define LONG_SUBU dsubu 471 #define LONG_SUBIU dsubu 472 #define LONG_L ld 473 #define LONG_LA dla 474 #define LONG_S sd 475 #define LONG_SLL dsll 476 #define LONG_SLLV dsllv 477 #define LONG_SRL dsrl 478 #define LONG_SRLV dsrlv 479 #define LONG_SRA dsra 480 #define LONG_SRAV dsrav 481 #define LONG_LL lld 482 #define LONG_SC scd 483 #define LONG_WORD .dword 484 #define LONG_SCALESHIFT 3 485 #endif 486 487 #if SZREG == 4 488 #define REG_L lw 489 #define REG_S sw 490 #define REG_LI li 491 #define REG_ADDU addu 492 #define REG_SLL sll 493 #define REG_SLLV sllv 494 #define REG_SRL srl 495 #define REG_SRLV srlv 496 #define REG_SRA sra 497 #define REG_SRAV srav 498 #define REG_LL ll 499 #define REG_SC sc 500 #define REG_SCALESHIFT 2 501 #else 502 #define REG_L ld 503 #define REG_S sd 504 #define REG_LI dli 505 #define REG_ADDU daddu 506 #define REG_SLL dsll 507 #define REG_SLLV dsllv 508 #define REG_SRL dsrl 509 #define REG_SRLV dsrlv 510 #define REG_SRA dsra 511 #define REG_SRAV dsrav 512 #define REG_LL lld 513 #define REG_SC scd 514 #define REG_SCALESHIFT 3 515 #endif 516 517 #if (MIPS1 + MIPS2) > 0 518 #define NOP_L nop 519 #else 520 #define NOP_L /* nothing */ 521 #endif 522 523 /* compiler define */ 524 #if defined(__OCTEON__) 525 /* early cnMIPS have erratum which means 2 */ 526 #define LLSCSYNC sync 4; sync 4 527 #define SYNC sync 4 /* sync 4 == syncw - sync all writes */ 528 #define BDSYNC sync 4 /* sync 4 == syncw - sync all writes */ 529 #elif __mips >= 3 || !defined(__mips_o32) 530 #define LLSCSYNC sync 531 #define SYNC sync 532 #define BDSYNC sync 533 #else 534 #define LLSCSYNC /* nothing */ 535 #define SYNC /* nothing */ 536 #define BDSYNC nop 537 #endif 538 539 /* CPU dependent hook for cp0 load delays */ 540 #if defined(MIPS1) || defined(MIPS2) || defined(MIPS3) 541 #define MFC0_HAZARD sll $0,$0,1 /* super scalar nop */ 542 #else 543 #define MFC0_HAZARD /* nothing */ 544 #endif 545 546 #if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || \ 547 _MIPS_ISA == _MIPS_ISA_MIPS32 548 #define MFC0 mfc0 549 #define MTC0 mtc0 550 #endif 551 #if _MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || \ 552 _MIPS_ISA == _MIPS_ISA_MIPS64 553 #define MFC0 dmfc0 554 #define MTC0 dmtc0 555 #endif 556 557 #if defined(__mips_o32) || defined(__mips_o64) 558 559 #ifdef __mips_abicalls 560 #define CPRESTORE(r) .cprestore r 561 #define CPLOAD(r) .cpload r 562 #else 563 #define CPRESTORE(r) /* not needed */ 564 #define CPLOAD(r) /* not needed */ 565 #endif 566 567 #define SETUP_GP \ 568 .set push; \ 569 .set noreorder; \ 570 .cpload t9; \ 571 .set pop 572 #define SETUP_GPX(r) \ 573 .set push; \ 574 .set noreorder; \ 575 move r,ra; /* save old ra */ \ 576 bal 7f; \ 577 nop; \ 578 7: .cpload ra; \ 579 move ra,r; \ 580 .set pop 581 #define SETUP_GPX_L(r,lbl) \ 582 .set push; \ 583 .set noreorder; \ 584 move r,ra; /* save old ra */ \ 585 bal lbl; \ 586 nop; \ 587 lbl: .cpload ra; \ 588 move ra,r; \ 589 .set pop 590 #define SAVE_GP(x) .cprestore x 591 592 #define SETUP_GP64(a,b) /* n32/n64 specific */ 593 #define SETUP_GP64_R(a,b) /* n32/n64 specific */ 594 #define SETUP_GPX64(a,b) /* n32/n64 specific */ 595 #define SETUP_GPX64_L(a,b,c) /* n32/n64 specific */ 596 #define RESTORE_GP64 /* n32/n64 specific */ 597 #define USE_ALT_CP(a) /* n32/n64 specific */ 598 #endif /* __mips_o32 || __mips_o64 */ 599 600 #if defined(__mips_o32) || defined(__mips_o64) 601 #define REG_PROLOGUE .set push 602 #define REG_EPILOGUE .set pop 603 #endif 604 #if defined(__mips_n32) || defined(__mips_n64) 605 #define REG_PROLOGUE .set push ; .set mips3 606 #define REG_EPILOGUE .set pop 607 #endif 608 609 #if defined(__mips_n32) || defined(__mips_n64) 610 #define SETUP_GP /* o32 specific */ 611 #define SETUP_GPX(r) /* o32 specific */ 612 #define SETUP_GPX_L(r,lbl) /* o32 specific */ 613 #define SAVE_GP(x) /* o32 specific */ 614 #define SETUP_GP64(a,b) .cpsetup $25, a, b 615 #define SETUP_GPX64(a,b) \ 616 .set push; \ 617 move b,ra; \ 618 .set noreorder; \ 619 bal 7f; \ 620 nop; \ 621 7: .set pop; \ 622 .cpsetup ra, a, 7b; \ 623 move ra,b 624 #define SETUP_GPX64_L(a,b,c) \ 625 .set push; \ 626 move b,ra; \ 627 .set noreorder; \ 628 bal c; \ 629 nop; \ 630 c: .set pop; \ 631 .cpsetup ra, a, c; \ 632 move ra,b 633 #define RESTORE_GP64 .cpreturn 634 #define USE_ALT_CP(a) .cplocal a 635 #endif /* __mips_n32 || __mips_n64 */ 636 637 /* 638 * The DYNAMIC_STATUS_MASK option adds an additional masking operation 639 * when updating the hardware interrupt mask in the status register. 640 * 641 * This is useful for platforms that need to at run-time mask 642 * interrupts based on motherboard configuration or to handle 643 * slowly clearing interrupts. 644 * 645 * XXX this is only currently implemented for mips3. 646 */ 647 #ifdef MIPS_DYNAMIC_STATUS_MASK 648 #define DYNAMIC_STATUS_MASK(sr,scratch) \ 649 lw scratch, mips_dynamic_status_mask; \ 650 and sr, sr, scratch 651 652 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) \ 653 ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \ 654 DYNAMIC_STATUS_MASK(sr,scratch1) 655 #else 656 #define DYNAMIC_STATUS_MASK(sr,scratch) 657 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) 658 #endif 659 660 /* See lock_stubs.S. */ 661 #define LOG2_MIPS_LOCK_RAS_SIZE 8 662 #define MIPS_LOCK_RAS_SIZE 256 /* 16 bytes left over */ 663 664 #define CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off) 665 666 #endif /* _MIPS_ASM_H */ 667