1 /* $NetBSD: octeon_pci.c,v 1.2 2015/06/01 22:55:12 matt Exp $ */ 2 3 /* 4 * Copyright (c) 2007, 2008 Internet Initiative Japan, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: octeon_pci.c,v 1.2 2015/06/01 22:55:12 matt Exp $"); 31 32 #include "opt_octeon.h" 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/types.h> 37 #include <sys/device.h> 38 39 #include <sys/bus.h> 40 41 #include <mips/cavium/octeonvar.h> 42 #include <mips/cavium/dev/octeon_ciureg.h> 43 #include <mips/cavium/dev/octeon_npireg.h> 44 45 /* 46 * In OCTEON, some infrequent, error interrupts (RML) are handled with PCI 47 * interrupt. Hence, here. 48 */ 49 50 void octeon_pci_bootstrap(struct octeon_config *); 51 static void octeon_pci_init(void); 52 53 #ifdef OCTEON_ETH_DEBUG 54 static int octeon_pci_intr_rml(void *); 55 static void *octeon_pci_intr_rml_ih; 56 #endif 57 58 void 59 octeon_pci_bootstrap(struct octeon_config *mcp) 60 { 61 octeon_pci_init(); 62 } 63 64 static void 65 octeon_pci_init(void) 66 { 67 #ifdef OCTEON_ETH_DEBUG 68 octeon_pci_intr_rml_ih = octeon_intr_establish( 69 ffs64(CIU_INTX_SUM0_RML) - 1, IPL_NET, octeon_pci_intr_rml, NULL); 70 #endif 71 } 72 73 #ifdef OCTEON_ETH_DEBUG 74 int octeon_pci_intr_rml_verbose; 75 76 void octeon_gmx_intr_rml_gmx0(void *); 77 void octeon_gmx_intr_rml_gmx1(void *); 78 void octeon_asx_intr_rml(void *); 79 void octeon_ipd_intr_rml(void *); 80 void octeon_pip_intr_rml(void *); 81 void octeon_pow_intr_rml(void *); 82 void octeon_pko_intr_rml(void *); 83 void octeon_fpa_intr_rml(void *); 84 85 static int 86 octeon_pci_intr_rml(void *arg) 87 { 88 uint64_t block; 89 90 block = octeon_read_csr(NPI_RSL_INT_BLOCKS); 91 if (octeon_pci_intr_rml_verbose) 92 printf("%s: block=0x%016" PRIx64 "\n", __func__, block); 93 if (ISSET(block, NPI_RSL_INT_BLOCKS_GMX0)) 94 octeon_gmx_intr_rml_gmx0(arg); 95 #ifdef notyet 96 if (ISSET(block, NPI_RSL_INT_BLOCKS_GMX1)) 97 octeon_gmx_intr_rml_gmx1(arg); 98 #endif 99 if (ISSET(block, NPI_RSL_INT_BLOCKS_ASX0)) 100 octeon_asx_intr_rml(arg); 101 if (ISSET(block, NPI_RSL_INT_BLOCKS_IPD)) 102 octeon_ipd_intr_rml(arg); 103 if (ISSET(block, NPI_RSL_INT_BLOCKS_PIP)) 104 octeon_pip_intr_rml(arg); 105 if (ISSET(block, NPI_RSL_INT_BLOCKS_POW)) 106 octeon_pow_intr_rml(arg); 107 if (ISSET(block, NPI_RSL_INT_BLOCKS_PKO)) 108 octeon_pko_intr_rml(arg); 109 if (ISSET(block, NPI_RSL_INT_BLOCKS_FPA)) 110 octeon_fpa_intr_rml(arg); 111 return 1; 112 } 113 #endif 114