xref: /netbsd-src/sys/arch/mips/cavium/dev/if_cnmac.c (revision 8ecbf5f02b752fcb7debe1a8fab1dc82602bc760)
1 /*	$NetBSD: if_cnmac.c,v 1.24 2020/06/23 05:17:13 simonb Exp $	*/
2 
3 /*
4  * Copyright (c) 2007 Internet Initiative Japan, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: if_cnmac.c,v 1.24 2020/06/23 05:17:13 simonb Exp $");
31 
32 /*
33  * If no free send buffer is available, free all the sent buffers and bail out.
34  */
35 #define CNMAC_SEND_QUEUE_CHECK
36 
37 /* XXX XXX XXX XXX XXX XXX */
38 
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/pool.h>
42 #include <sys/mbuf.h>
43 #include <sys/malloc.h>
44 #include <sys/kernel.h>
45 #include <sys/socket.h>
46 #include <sys/ioctl.h>
47 #include <sys/errno.h>
48 #include <sys/device.h>
49 #include <sys/queue.h>
50 #include <sys/conf.h>
51 #include <sys/sysctl.h>
52 #include <sys/syslog.h>
53 
54 #include <net/if.h>
55 #include <net/if_media.h>
56 #include <net/if_ether.h>
57 #include <net/route.h>
58 #include <net/bpf.h>
59 
60 #include <netinet/in.h>
61 #include <netinet/in_systm.h>
62 #include <netinet/in_var.h>
63 #include <netinet/ip.h>
64 
65 #include <sys/bus.h>
66 #include <machine/intr.h>
67 #include <machine/endian.h>
68 #include <machine/locore.h>
69 
70 #include <dev/mii/mii.h>
71 #include <dev/mii/miivar.h>
72 
73 #include <mips/cpuregs.h>
74 
75 #include <mips/cavium/octeonreg.h>
76 #include <mips/cavium/octeonvar.h>
77 #include <mips/cavium/include/iobusvar.h>
78 
79 #include <mips/cavium/dev/octeon_ciureg.h>
80 #include <mips/cavium/dev/octeon_faureg.h>
81 #include <mips/cavium/dev/octeon_fpareg.h>
82 #include <mips/cavium/dev/octeon_gmxreg.h>
83 #include <mips/cavium/dev/octeon_pipreg.h>
84 #include <mips/cavium/dev/octeon_powreg.h>
85 #include <mips/cavium/dev/octeon_fauvar.h>
86 #include <mips/cavium/dev/octeon_fpavar.h>
87 #include <mips/cavium/dev/octeon_gmxvar.h>
88 #include <mips/cavium/dev/octeon_ipdvar.h>
89 #include <mips/cavium/dev/octeon_pipvar.h>
90 #include <mips/cavium/dev/octeon_pkovar.h>
91 #include <mips/cavium/dev/octeon_powvar.h>
92 #include <mips/cavium/dev/octeon_smivar.h>
93 
94 #include <mips/cavium/dev/if_cnmacvar.h>
95 
96 /*
97  * Set the PKO to think command buffers are an odd length.  This makes it so we
98  * never have to divide a comamnd across two buffers.
99  */
100 #define OCTEON_POOL_NWORDS_CMD	\
101 	    (((uint32_t)OCTEON_POOL_SIZE_CMD / sizeof(uint64_t)) - 1)
102 #define FPA_COMMAND_BUFFER_POOL_NWORDS	OCTEON_POOL_NWORDS_CMD	/* XXX */
103 
104 static void	cnmac_buf_init(struct cnmac_softc *);
105 
106 static int	cnmac_match(device_t, struct cfdata *, void *);
107 static void	cnmac_attach(device_t, device_t, void *);
108 static void	cnmac_pip_init(struct cnmac_softc *);
109 static void	cnmac_ipd_init(struct cnmac_softc *);
110 static void	cnmac_pko_init(struct cnmac_softc *);
111 
112 static void	cnmac_board_mac_addr(uint8_t *, size_t, struct cnmac_softc *);
113 
114 static int	cnmac_mii_readreg(device_t, int, int, uint16_t *);
115 static int	cnmac_mii_writereg(device_t, int, int, uint16_t);
116 static void	cnmac_mii_statchg(struct ifnet *);
117 
118 static int	cnmac_mediainit(struct cnmac_softc *);
119 static void	cnmac_mediastatus(struct ifnet *, struct ifmediareq *);
120 
121 static inline void cnmac_send_queue_flush_prefetch(struct cnmac_softc *);
122 static inline void cnmac_send_queue_flush_fetch(struct cnmac_softc *);
123 static inline void cnmac_send_queue_flush(struct cnmac_softc *);
124 static inline void cnmac_send_queue_flush_sync(struct cnmac_softc *);
125 static inline int cnmac_send_queue_is_full(struct cnmac_softc *);
126 static inline void cnmac_send_queue_add(struct cnmac_softc *, struct mbuf *,
127     uint64_t *);
128 static inline void cnmac_send_queue_del(struct cnmac_softc *, struct mbuf **,
129     uint64_t **);
130 static inline int cnmac_buf_free_work(struct cnmac_softc *, uint64_t *);
131 static inline void cnmac_buf_ext_free(struct mbuf *, void *, size_t, void *);
132 
133 static int	cnmac_ioctl(struct ifnet *, u_long, void *);
134 static void	cnmac_watchdog(struct ifnet *);
135 static int	cnmac_init(struct ifnet *);
136 static void	cnmac_stop(struct ifnet *, int);
137 static void	cnmac_start(struct ifnet *);
138 
139 static inline int cnmac_send_cmd(struct cnmac_softc *, uint64_t, uint64_t,
140     int *);
141 static inline uint64_t	cnmac_send_makecmd_w1(int, paddr_t);
142 static inline uint64_t	cnmac_send_makecmd_w0(uint64_t, uint64_t, size_t, int,
143     int);
144 static inline int cnmac_send_makecmd_gbuf(struct cnmac_softc *, struct mbuf *,
145     uint64_t *, int *);
146 static inline int cnmac_send_makecmd(struct cnmac_softc *, struct mbuf *,
147     uint64_t *, uint64_t *, uint64_t *);
148 static inline int cnmac_send_buf(struct cnmac_softc *, struct mbuf *,
149     uint64_t *, int *);
150 static inline int cnmac_send(struct cnmac_softc *, struct mbuf *, int *);
151 
152 static int	cnmac_reset(struct cnmac_softc *);
153 static int	cnmac_configure(struct cnmac_softc *);
154 static int	cnmac_configure_common(struct cnmac_softc *);
155 
156 static void	cnmac_tick_free(void *);
157 static void	cnmac_tick_misc(void *);
158 
159 static inline int cnmac_recv_mbuf(struct cnmac_softc *, uint64_t *,
160     struct mbuf **);
161 static inline int cnmac_recv_check(struct cnmac_softc *, uint64_t);
162 static inline int cnmac_recv(struct cnmac_softc *, uint64_t *);
163 static int	cnmac_intr(void *);
164 
165 /* device parameters */
166 int		cnmac_param_pko_cmd_w0_n2 = 1;
167 
168 CFATTACH_DECL_NEW(cnmac, sizeof(struct cnmac_softc),
169     cnmac_match, cnmac_attach, NULL, NULL);
170 
171 /* ---- buffer management */
172 
173 static const struct cnmac_pool_param {
174 	int			poolno;
175 	size_t			size;
176 	size_t			nelems;
177 } cnmac_pool_params[] = {
178 #define	_ENTRY(x)	{ OCTEON_POOL_NO_##x, OCTEON_POOL_SIZE_##x, OCTEON_POOL_NELEMS_##x }
179 	_ENTRY(PKT),
180 	_ENTRY(WQE),
181 	_ENTRY(CMD),
182 	_ENTRY(SG)
183 #undef	_ENTRY
184 };
185 struct octfpa_buf	*cnmac_pools[FPA_NPOOLS];
186 #define	cnmac_fb_pkt	cnmac_pools[OCTEON_POOL_NO_PKT]
187 #define	cnmac_fb_wqe	cnmac_pools[OCTEON_POOL_NO_WQE]
188 #define	cnmac_fb_cmd	cnmac_pools[OCTEON_POOL_NO_CMD]
189 #define	cnmac_fb_sg	cnmac_pools[OCTEON_POOL_NO_SG]
190 
191 static int	cnmac_npowgroups = 0;
192 
193 static void
194 cnmac_buf_init(struct cnmac_softc *sc)
195 {
196 	static int once;
197 	int i;
198 	const struct cnmac_pool_param *pp;
199 	struct octfpa_buf *fb;
200 
201 	if (once == 1)
202 		return;
203 	once = 1;
204 
205 	for (i = 0; i < (int)__arraycount(cnmac_pool_params); i++) {
206 		pp = &cnmac_pool_params[i];
207 		octfpa_buf_init(pp->poolno, pp->size, pp->nelems, &fb);
208 		cnmac_pools[i] = fb;
209 	}
210 }
211 
212 /* ---- autoconf */
213 
214 static int
215 cnmac_match(device_t parent, struct cfdata *match, void *aux)
216 {
217 	struct octgmx_attach_args *ga = aux;
218 
219 	if (strcmp(match->cf_name, ga->ga_name) != 0) {
220 		return 0;
221 	}
222 	return 1;
223 }
224 
225 static void
226 cnmac_attach(device_t parent, device_t self, void *aux)
227 {
228 	struct cnmac_softc *sc = device_private(self);
229 	struct octgmx_attach_args *ga = aux;
230 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
231 	prop_dictionary_t dict;
232 	prop_object_t clk;
233 	uint8_t enaddr[ETHER_ADDR_LEN];
234 
235 	if (cnmac_npowgroups >= OCTEON_POW_GROUP_MAX) {
236 		printf(": out of POW groups\n");
237 	}
238 
239 	sc->sc_dev = self;
240 	sc->sc_regt = ga->ga_regt;
241 	sc->sc_port = ga->ga_portno;
242 	sc->sc_port_type = ga->ga_port_type;
243 	sc->sc_gmx = ga->ga_gmx;
244 	sc->sc_gmx_port = ga->ga_gmx_port;
245 	sc->sc_smi = ga->ga_smi;
246 	sc->sc_powgroup = cnmac_npowgroups++;
247 
248 	if (sc->sc_port >= CVMSEG_LM_ETHER_COUNT) {
249 		/*
250 		 * If we got here, increase CVMSEG_LM_ETHER_COUNT
251 		 * in octeonvar.h .
252 		 */
253 		printf("%s: ERROR out of CVMSEG LM buffers\n",
254 		    device_xname(self));
255 		return;
256 	}
257 
258 	sc->sc_init_flag = 0;
259 	/*
260 	 * XXXUEBAYASI
261 	 * Setting PIP_IP_OFFSET[OFFSET] to 8 causes panic ... why???
262 	 */
263 	sc->sc_ip_offset = 0/* XXX */;
264 
265 	if (MIPS_PRID_IMPL(mips_options.mips_cpu_id) <= MIPS_CN30XX) {
266 		SET(sc->sc_quirks, CNMAC_QUIRKS_NO_PRE_ALIGN);
267 		SET(sc->sc_quirks, CNMAC_QUIRKS_NO_RX_INBND);
268 	}
269 
270 	cnmac_board_mac_addr(enaddr, sizeof(enaddr), sc);
271 	printf("%s: Ethernet address %s\n", device_xname(self),
272 	    ether_sprintf(enaddr));
273 
274 	SIMPLEQ_INIT(&sc->sc_sendq);
275 	sc->sc_soft_req_thresh = 15/* XXX */;
276 	sc->sc_ext_callback_cnt = 0;
277 
278 	octgmx_stats_init(sc->sc_gmx_port);
279 
280 	callout_init(&sc->sc_tick_misc_ch, 0);
281 	callout_init(&sc->sc_tick_free_ch, 0);
282 
283 	const int dv_unit = device_unit(self);
284 	octfau_op_init(&sc->sc_fau_done,
285 	    OCTEON_CVMSEG_ETHER_OFFSET(dv_unit, csm_ether_fau_done),
286 	    OCT_FAU_REG_ADDR_END - (8 * (dv_unit + 1))/* XXX */);
287 	octfau_op_set_8(&sc->sc_fau_done, 0);
288 
289 	cnmac_pip_init(sc);
290 	cnmac_ipd_init(sc);
291 	cnmac_pko_init(sc);
292 
293 	cnmac_configure_common(sc);
294 
295 	sc->sc_gmx_port->sc_ipd = sc->sc_ipd;
296 	sc->sc_gmx_port->sc_port_mii = &sc->sc_mii;
297 	sc->sc_gmx_port->sc_port_ec = &sc->sc_ethercom;
298 	/* XXX */
299 	sc->sc_gmx_port->sc_quirks = sc->sc_quirks;
300 
301 	/* XXX */
302 	sc->sc_pow = &octpow_softc;
303 
304 	cnmac_mediainit(sc);
305 
306 	strncpy(ifp->if_xname, device_xname(self), sizeof(ifp->if_xname));
307 	ifp->if_softc = sc;
308 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
309 	ifp->if_ioctl = cnmac_ioctl;
310 	ifp->if_start = cnmac_start;
311 	ifp->if_watchdog = cnmac_watchdog;
312 	ifp->if_init = cnmac_init;
313 	ifp->if_stop = cnmac_stop;
314 	IFQ_SET_MAXLEN(&ifp->if_snd, uimax(GATHER_QUEUE_SIZE, IFQ_MAXLEN));
315 	IFQ_SET_READY(&ifp->if_snd);
316 
317 
318 	ifp->if_capabilities =
319 #if 0	/* XXX: no tx checksum yet */
320 	    IFCAP_CSUM_IPv4_Tx | IFCAP_CSUM_IPv4_Rx |
321 	    IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_TCPv4_Rx |
322 	    IFCAP_CSUM_UDPv4_Tx | IFCAP_CSUM_UDPv4_Rx |
323 	    IFCAP_CSUM_TCPv6_Tx | IFCAP_CSUM_TCPv6_Rx |
324 	    IFCAP_CSUM_UDPv6_Tx | IFCAP_CSUM_UDPv6_Rx;
325 #else
326 	    IFCAP_CSUM_IPv4_Rx | IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx |
327 	    IFCAP_CSUM_TCPv6_Rx | IFCAP_CSUM_UDPv6_Rx;
328 #endif
329 
330 	/* 802.1Q VLAN-sized frames are supported */
331 	sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU;
332 
333 	octgmx_set_mac_addr(sc->sc_gmx_port, enaddr);
334 
335 	if_attach(ifp);
336 	ether_ifattach(ifp, enaddr);
337 	octgmx_set_filter(sc->sc_gmx_port);
338 
339 #if 1
340 	cnmac_buf_init(sc);
341 #endif
342 
343 	sc->sc_ih = octeon_intr_establish(POW_WORKQ_IRQ(sc->sc_powgroup),
344 	    IPL_NET, cnmac_intr, sc);
345 	if (sc->sc_ih == NULL)
346 		panic("%s: could not set up interrupt", device_xname(self));
347 
348 	dict = device_properties(sc->sc_gmx->sc_dev);
349 
350 	clk = prop_dictionary_get(dict, "rgmii-tx");
351 	if (clk)
352 		sc->sc_gmx_port->sc_clk_tx_setting =
353 		    prop_number_signed_value(clk);
354 	clk = prop_dictionary_get(dict, "rgmii-rx");
355 	if (clk)
356 		sc->sc_gmx_port->sc_clk_rx_setting =
357 		    prop_number_signed_value(clk);
358 }
359 
360 /* ---- submodules */
361 
362 /* XXX */
363 static void
364 cnmac_pip_init(struct cnmac_softc *sc)
365 {
366 	struct octpip_attach_args pip_aa;
367 
368 	pip_aa.aa_port = sc->sc_port;
369 	pip_aa.aa_regt = sc->sc_regt;
370 	pip_aa.aa_tag_type = POW_TAG_TYPE_ORDERED/* XXX */;
371 	pip_aa.aa_receive_group = sc->sc_powgroup;
372 	pip_aa.aa_ip_offset = sc->sc_ip_offset;
373 	octpip_init(&pip_aa, &sc->sc_pip);
374 	octpip_port_config(sc->sc_pip);
375 }
376 
377 /* XXX */
378 static void
379 cnmac_ipd_init(struct cnmac_softc *sc)
380 {
381 	struct octipd_attach_args ipd_aa;
382 
383 	ipd_aa.aa_port = sc->sc_port;
384 	ipd_aa.aa_regt = sc->sc_regt;
385 	ipd_aa.aa_first_mbuff_skip = 184/* XXX */;
386 	ipd_aa.aa_not_first_mbuff_skip = 0/* XXX */;
387 	octipd_init(&ipd_aa, &sc->sc_ipd);
388 }
389 
390 /* XXX */
391 static void
392 cnmac_pko_init(struct cnmac_softc *sc)
393 {
394 	struct octpko_attach_args pko_aa;
395 
396 	pko_aa.aa_port = sc->sc_port;
397 	pko_aa.aa_regt = sc->sc_regt;
398 	pko_aa.aa_cmdptr = &sc->sc_cmdptr;
399 	pko_aa.aa_cmd_buf_pool = OCTEON_POOL_NO_CMD;
400 	pko_aa.aa_cmd_buf_size = OCTEON_POOL_NWORDS_CMD;
401 	octpko_init(&pko_aa, &sc->sc_pko);
402 }
403 
404 /* ---- XXX */
405 
406 #define	ADDR2UINT64(u, a) \
407 	do { \
408 		u = \
409 		    (((uint64_t)a[0] << 40) | ((uint64_t)a[1] << 32) | \
410 		     ((uint64_t)a[2] << 24) | ((uint64_t)a[3] << 16) | \
411 		     ((uint64_t)a[4] <<	 8) | ((uint64_t)a[5] <<  0)); \
412 	} while (0)
413 #define	UINT642ADDR(a, u) \
414 	do { \
415 		a[0] = (uint8_t)((u) >> 40); a[1] = (uint8_t)((u) >> 32); \
416 		a[2] = (uint8_t)((u) >> 24); a[3] = (uint8_t)((u) >> 16); \
417 		a[4] = (uint8_t)((u) >>	 8); a[5] = (uint8_t)((u) >>  0); \
418 	} while (0)
419 
420 static void
421 cnmac_board_mac_addr(uint8_t *enaddr, size_t size, struct cnmac_softc *sc)
422 {
423 	prop_dictionary_t dict;
424 	prop_data_t ea;
425 
426 	dict = device_properties(sc->sc_dev);
427 	KASSERT(dict != NULL);
428 	ea = prop_dictionary_get(dict, "mac-address");
429 	KASSERT(ea != NULL);
430 	memcpy(enaddr, prop_data_value(ea), size);
431 }
432 
433 /* ---- media */
434 
435 static int
436 cnmac_mii_readreg(device_t self, int phy_addr, int reg, uint16_t *val)
437 {
438 	struct cnmac_softc *sc = device_private(self);
439 
440 	return octsmi_read(sc->sc_smi, phy_addr, reg, val);
441 }
442 
443 static int
444 cnmac_mii_writereg(device_t self, int phy_addr, int reg, uint16_t val)
445 {
446 	struct cnmac_softc *sc = device_private(self);
447 
448 	return octsmi_write(sc->sc_smi, phy_addr, reg, val);
449 }
450 
451 static void
452 cnmac_mii_statchg(struct ifnet *ifp)
453 {
454 	struct cnmac_softc *sc = ifp->if_softc;
455 
456 	octpko_port_enable(sc->sc_pko, 0);
457 	octgmx_port_enable(sc->sc_gmx_port, 0);
458 
459 	cnmac_reset(sc);
460 
461 	if (ISSET(ifp->if_flags, IFF_RUNNING))
462 		octgmx_set_filter(sc->sc_gmx_port);
463 
464 	octpko_port_enable(sc->sc_pko, 1);
465 	octgmx_port_enable(sc->sc_gmx_port, 1);
466 }
467 
468 static int
469 cnmac_mediainit(struct cnmac_softc *sc)
470 {
471 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
472 	struct mii_data *mii = &sc->sc_mii;
473 	prop_object_t phy;
474 
475 	mii->mii_ifp = ifp;
476 	mii->mii_readreg = cnmac_mii_readreg;
477 	mii->mii_writereg = cnmac_mii_writereg;
478 	mii->mii_statchg = cnmac_mii_statchg;
479 	sc->sc_ethercom.ec_mii = mii;
480 
481 	/* Initialize ifmedia structures. */
482 	ifmedia_init(&mii->mii_media, 0, ether_mediachange, cnmac_mediastatus);
483 
484 	phy = prop_dictionary_get(device_properties(sc->sc_dev), "phy-addr");
485 	KASSERT(phy != NULL);
486 
487 	mii_attach(sc->sc_dev, mii, 0xffffffff, prop_number_signed_value(phy),
488 	    MII_OFFSET_ANY, MIIF_DOPAUSE);
489 
490 	/* XXX XXX XXX */
491 	if (LIST_FIRST(&mii->mii_phys) != NULL) {
492 		/* XXX XXX XXX */
493 		ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
494 		/* XXX XXX XXX */
495 	} else {
496 		/* XXX XXX XXX */
497 		ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE,
498 		    MII_MEDIA_NONE, NULL);
499 		/* XXX XXX XXX */
500 		ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
501 		/* XXX XXX XXX */
502 	}
503 	/* XXX XXX XXX */
504 
505 	return 0;
506 }
507 
508 static void
509 cnmac_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
510 {
511 	struct cnmac_softc *sc = ifp->if_softc;
512 
513 	mii_pollstat(&sc->sc_mii);
514 
515 	ifmr->ifm_status = sc->sc_mii.mii_media_status;
516 	ifmr->ifm_active = sc->sc_mii.mii_media_active;
517 	ifmr->ifm_active = (sc->sc_mii.mii_media_active & ~IFM_ETH_FMASK) |
518 	    sc->sc_gmx_port->sc_port_flowflags;
519 }
520 
521 /* ---- send buffer garbage collection */
522 
523 static inline void
524 cnmac_send_queue_flush_prefetch(struct cnmac_softc *sc)
525 {
526 
527 	KASSERT(sc->sc_prefetch == 0);
528 	octfau_op_inc_fetch_8(&sc->sc_fau_done, 0);
529 	sc->sc_prefetch = 1;
530 }
531 
532 static inline void
533 cnmac_send_queue_flush_fetch(struct cnmac_softc *sc)
534 {
535 
536 	KASSERT(sc->sc_prefetch == 1);
537 	sc->sc_hard_done_cnt = octfau_op_inc_read_8(&sc->sc_fau_done);
538 	KASSERT(sc->sc_hard_done_cnt <= 0);
539 	sc->sc_prefetch = 0;
540 }
541 
542 static inline void
543 cnmac_send_queue_flush(struct cnmac_softc *sc)
544 {
545 	struct ifnet *ifp = &sc->sc_ethercom.ec_if;
546 	const int64_t sent_count = sc->sc_hard_done_cnt;
547 	int i;
548 
549 	KASSERT(sc->sc_flush == 0);
550 	KASSERT(sent_count <= 0);
551 
552 	for (i = 0; i < 0 - sent_count; i++) {
553 		struct mbuf *m;
554 		uint64_t *gbuf;
555 
556 		cnmac_send_queue_del(sc, &m, &gbuf);
557 
558 		octfpa_buf_put(cnmac_fb_sg, gbuf);
559 
560 		m_freem(m);
561 
562 		CLR(ifp->if_flags, IFF_OACTIVE);
563 	}
564 
565 	octfau_op_inc_fetch_8(&sc->sc_fau_done, i);
566 	sc->sc_flush = i;
567 }
568 
569 static inline void
570 cnmac_send_queue_flush_sync(struct cnmac_softc *sc)
571 {
572 	if (sc->sc_flush == 0)
573 		return;
574 
575 	KASSERT(sc->sc_flush > 0);
576 
577 	/* XXX XXX XXX */
578 	octfau_op_inc_read_8(&sc->sc_fau_done);
579 	sc->sc_soft_req_cnt -= sc->sc_flush;
580 	KASSERT(sc->sc_soft_req_cnt >= 0);
581 	/* XXX XXX XXX */
582 
583 	sc->sc_flush = 0;
584 }
585 
586 static inline int
587 cnmac_send_queue_is_full(struct cnmac_softc *sc)
588 {
589 #ifdef CNMAC_SEND_QUEUE_CHECK
590 	int64_t nofree_cnt;
591 
592 	nofree_cnt = sc->sc_soft_req_cnt + sc->sc_hard_done_cnt;
593 
594 	if (__predict_false(nofree_cnt == GATHER_QUEUE_SIZE - 1)) {
595 		cnmac_send_queue_flush(sc);
596 		cnmac_send_queue_flush_sync(sc);
597 		return 1;
598 	}
599 
600 #endif
601 	return 0;
602 }
603 
604 /*
605  * (Ab)use m_nextpkt and m_paddr to maintain mbuf chain and pointer to gather
606  * buffer.  Other mbuf members may be used by m_freem(), so don't touch them!
607  */
608 
609 struct _send_queue_entry {
610 	union {
611 		struct mbuf _sqe_s_mbuf;
612 		struct {
613 			char _sqe_s_entry_pad[offsetof(struct mbuf, m_nextpkt)];
614 			SIMPLEQ_ENTRY(_send_queue_entry) _sqe_s_entry_entry;
615 		} _sqe_s_entry;
616 		struct {
617 			char _sqe_s_gbuf_pad[offsetof(struct mbuf, m_paddr)];
618 			uint64_t *_sqe_s_gbuf_gbuf;
619 		} _sqe_s_gbuf;
620 	} _sqe_u;
621 #define	_sqe_entry	_sqe_u._sqe_s_entry._sqe_s_entry_entry
622 #define	_sqe_gbuf	_sqe_u._sqe_s_gbuf._sqe_s_gbuf_gbuf
623 };
624 
625 static inline void
626 cnmac_send_queue_add(struct cnmac_softc *sc, struct mbuf *m,
627     uint64_t *gbuf)
628 {
629 	struct _send_queue_entry *sqe = (struct _send_queue_entry *)m;
630 
631 	sqe->_sqe_gbuf = gbuf;
632 	SIMPLEQ_INSERT_TAIL(&sc->sc_sendq, sqe, _sqe_entry);
633 
634 	if ((m->m_flags & M_EXT) && m->m_ext.ext_free != NULL)
635 		sc->sc_ext_callback_cnt++;
636 }
637 
638 static inline void
639 cnmac_send_queue_del(struct cnmac_softc *sc, struct mbuf **rm, uint64_t **rgbuf)
640 {
641 	struct _send_queue_entry *sqe;
642 
643 	sqe = SIMPLEQ_FIRST(&sc->sc_sendq);
644 	KASSERT(sqe != NULL);
645 	SIMPLEQ_REMOVE_HEAD(&sc->sc_sendq, _sqe_entry);
646 
647 	*rm = (void *)sqe;
648 	*rgbuf = sqe->_sqe_gbuf;
649 
650 	if (((*rm)->m_flags & M_EXT) && (*rm)->m_ext.ext_free != NULL) {
651 		sc->sc_ext_callback_cnt--;
652 		KASSERT(sc->sc_ext_callback_cnt >= 0);
653 	}
654 }
655 
656 static inline int
657 cnmac_buf_free_work(struct cnmac_softc *sc, uint64_t *work)
658 {
659 
660 	/* XXX when jumbo frame */
661 	if (ISSET(work[2], PIP_WQE_WORD2_IP_BUFS)) {
662 		paddr_t addr;
663 		paddr_t start_buffer;
664 
665 		addr = work[3] & PIP_WQE_WORD3_ADDR;
666 		start_buffer = addr & ~(2048 - 1);
667 
668 		octfpa_buf_put_paddr(cnmac_fb_pkt, start_buffer);
669 	}
670 
671 	octfpa_buf_put(cnmac_fb_wqe, work);
672 
673 	return 0;
674 }
675 
676 static inline void
677 cnmac_buf_ext_free(struct mbuf *m, void *buf, size_t size, void *arg)
678 {
679 	octfpa_buf_put(cnmac_fb_pkt, buf);
680 
681 	KASSERT(m != NULL);
682 
683 	pool_cache_put(mb_cache, m);
684 }
685 
686 /* ---- ifnet interfaces */
687 
688 static int
689 cnmac_ioctl(struct ifnet *ifp, u_long cmd, void *data)
690 {
691 	struct cnmac_softc *sc = ifp->if_softc;
692 	struct ifreq *ifr = (struct ifreq *)data;
693 	int s, error;
694 
695 	s = splnet();
696 	switch (cmd) {
697 	case SIOCSIFMEDIA:
698 		/* Flow control requires full-duplex mode. */
699 		if (IFM_SUBTYPE(ifr->ifr_media) == IFM_AUTO ||
700 		    (ifr->ifr_media & IFM_FDX) == 0) {
701 			ifr->ifr_media &= ~IFM_ETH_FMASK;
702 		}
703 		if (IFM_SUBTYPE(ifr->ifr_media) != IFM_AUTO) {
704 			if ((ifr->ifr_media & IFM_ETH_FMASK) == IFM_FLOW) {
705 				ifr->ifr_media |=
706 				    IFM_ETH_TXPAUSE | IFM_ETH_RXPAUSE;
707 			}
708 			sc->sc_gmx_port->sc_port_flowflags =
709 				ifr->ifr_media & IFM_ETH_FMASK;
710 		}
711 		error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
712 		break;
713 	default:
714 		error = ether_ioctl(ifp, cmd, data);
715 		break;
716 	}
717 
718 	if (error == ENETRESET) {
719 		if (ISSET(ifp->if_flags, IFF_RUNNING))
720 			octgmx_set_filter(sc->sc_gmx_port);
721 		error = 0;
722 	}
723 
724 	cnmac_start(ifp);
725 
726 	splx(s);
727 
728 	return error;
729 }
730 
731 /* ---- send (output) */
732 
733 static inline uint64_t
734 cnmac_send_makecmd_w0(uint64_t fau0, uint64_t fau1, size_t len, int segs,
735     int ipoffp1)
736 {
737 
738 	return octpko_cmd_word0(
739 		OCT_FAU_OP_SIZE_64,		/* sz1 */
740 		OCT_FAU_OP_SIZE_64,		/* sz0 */
741 		1, fau1, 1, fau0,		/* s1, reg1, s0, reg0 */
742 		0,				/* le */
743 		cnmac_param_pko_cmd_w0_n2,	/* n2 */
744 		1, 0,				/* q, r */
745 		(segs == 1) ? 0 : 1,		/* g */
746 		0, 0, 1,			/* ipoffp1, ii, df */
747 		segs, (int)len);		/* segs, totalbytes */
748 }
749 
750 static inline uint64_t
751 cnmac_send_makecmd_w1(int size, paddr_t addr)
752 {
753 
754 	return octpko_cmd_word1(
755 		0, 0,				/* i, back */
756 		OCTEON_POOL_NO_SG,		/* pool */
757 		size, addr);			/* size, addr */
758 }
759 
760 static inline int
761 cnmac_send_makecmd_gbuf(struct cnmac_softc *sc, struct mbuf *m0, uint64_t *gbuf,
762     int *rsegs)
763 {
764 	struct mbuf *m;
765 	int segs = 0;
766 	uintptr_t laddr, rlen, nlen;
767 
768 	for (m = m0; m != NULL; m = m->m_next) {
769 
770 		if (__predict_false(m->m_len == 0))
771 			continue;
772 
773 		/* Aligned 4k */
774 		laddr = (uintptr_t)m->m_data & (PAGE_SIZE - 1);
775 
776 		if (laddr + m->m_len > PAGE_SIZE) {
777 			/* XXX XXX XXX */
778 			rlen = PAGE_SIZE - laddr;
779 			nlen = m->m_len - rlen;
780 			*(gbuf + segs) = cnmac_send_makecmd_w1(rlen,
781 			    kvtophys((vaddr_t)m->m_data));
782 			segs++;
783 			if (segs > 63) {
784 				return 1;
785 			}
786 			/* XXX XXX XXX */
787 		} else {
788 			rlen = 0;
789 			nlen = m->m_len;
790 		}
791 
792 		*(gbuf + segs) = cnmac_send_makecmd_w1(nlen,
793 		    kvtophys((vaddr_t)(m->m_data + rlen)));
794 		segs++;
795 		if (segs > 63) {
796 			return 1;
797 		}
798 	}
799 
800 	KASSERT(m == NULL);
801 
802 	*rsegs = segs;
803 
804 	return 0;
805 }
806 
807 static inline int
808 cnmac_send_makecmd(struct cnmac_softc *sc, struct mbuf *m,
809     uint64_t *gbuf, uint64_t *rpko_cmd_w0, uint64_t *rpko_cmd_w1)
810 {
811 	uint64_t pko_cmd_w0, pko_cmd_w1;
812 	int ipoffp1;
813 	int segs;
814 	int result = 0;
815 
816 	if (cnmac_send_makecmd_gbuf(sc, m, gbuf, &segs)) {
817 		log(LOG_WARNING, "%s: there are a lot of number of segments"
818 		    " of transmission data", device_xname(sc->sc_dev));
819 		result = 1;
820 		goto done;
821 	}
822 
823 	/*  Get the IP packet offset for TCP/UDP checksum offloading. */
824 	ipoffp1 = (m->m_pkthdr.csum_flags & (M_CSUM_TCPv4 | M_CSUM_UDPv4))
825 	    ? (ETHER_HDR_LEN + 1) : 0;
826 
827 	/*
828 	 * segs == 1	-> link mode (single continuous buffer)
829 	 *		   WORD1[size] is number of bytes pointed by segment
830 	 *
831 	 * segs > 1	-> gather mode (scatter-gather buffer)
832 	 *		   WORD1[size] is number of segments
833 	 */
834 	pko_cmd_w0 = cnmac_send_makecmd_w0(sc->sc_fau_done.fd_regno,
835 	    0, m->m_pkthdr.len, segs, ipoffp1);
836 	if (segs == 1) {
837 		pko_cmd_w1 = cnmac_send_makecmd_w1(
838 		    m->m_pkthdr.len, kvtophys((vaddr_t)m->m_data));
839 	} else {
840 #ifdef __mips_n32
841 		KASSERT(MIPS_KSEG0_P(gbuf));
842 		pko_cmd_w1 = cnmac_send_makecmd_w1(segs,
843 		    MIPS_KSEG0_TO_PHYS(gbuf));
844 #else
845 		pko_cmd_w1 = cnmac_send_makecmd_w1(segs,
846 		    MIPS_XKPHYS_TO_PHYS(gbuf));
847 #endif
848 	}
849 
850 	*rpko_cmd_w0 = pko_cmd_w0;
851 	*rpko_cmd_w1 = pko_cmd_w1;
852 
853 done:
854 	return result;
855 }
856 
857 static inline int
858 cnmac_send_cmd(struct cnmac_softc *sc, uint64_t pko_cmd_w0,
859     uint64_t pko_cmd_w1, int *pwdc)
860 {
861 	uint64_t *cmdptr;
862 	int result = 0;
863 
864 #ifdef __mips_n32
865 	KASSERT((sc->sc_cmdptr.cmdptr & ~MIPS_PHYS_MASK) == 0);
866 	cmdptr = (uint64_t *)MIPS_PHYS_TO_KSEG0(sc->sc_cmdptr.cmdptr);
867 #else
868 	cmdptr = (uint64_t *)MIPS_PHYS_TO_XKPHYS_CACHED(sc->sc_cmdptr.cmdptr);
869 #endif
870 	cmdptr += sc->sc_cmdptr.cmdptr_idx;
871 
872 	KASSERT(cmdptr != NULL);
873 
874 	*cmdptr++ = pko_cmd_w0;
875 	*cmdptr++ = pko_cmd_w1;
876 
877 	KASSERT(sc->sc_cmdptr.cmdptr_idx + 2 <= FPA_COMMAND_BUFFER_POOL_NWORDS - 1);
878 
879 	if (sc->sc_cmdptr.cmdptr_idx + 2 == FPA_COMMAND_BUFFER_POOL_NWORDS - 1) {
880 		paddr_t buf;
881 
882 		buf = octfpa_buf_get_paddr(cnmac_fb_cmd);
883 		if (buf == 0) {
884 			log(LOG_WARNING,
885 			    "%s: can not allocate command buffer from free pool allocator\n",
886 			    device_xname(sc->sc_dev));
887 			result = 1;
888 			goto done;
889 		}
890 		*cmdptr++ = buf;
891 		sc->sc_cmdptr.cmdptr = (uint64_t)buf;
892 		sc->sc_cmdptr.cmdptr_idx = 0;
893 	} else {
894 		sc->sc_cmdptr.cmdptr_idx += 2;
895 	}
896 
897 	*pwdc += 2;
898 
899 done:
900 	return result;
901 }
902 
903 static inline int
904 cnmac_send_buf(struct cnmac_softc *sc, struct mbuf *m, uint64_t *gbuf,
905     int *pwdc)
906 {
907 	int result = 0, error;
908 	uint64_t pko_cmd_w0, pko_cmd_w1;
909 
910 	error = cnmac_send_makecmd(sc, m, gbuf, &pko_cmd_w0, &pko_cmd_w1);
911 	if (error != 0) {
912 		/* Already logging */
913 		result = error;
914 		goto done;
915 	}
916 
917 	error = cnmac_send_cmd(sc, pko_cmd_w0, pko_cmd_w1, pwdc);
918 	if (error != 0) {
919 		/* Already logging */
920 		result = error;
921 	}
922 
923 done:
924 	return result;
925 }
926 
927 static inline int
928 cnmac_send(struct cnmac_softc *sc, struct mbuf *m, int *pwdc)
929 {
930 	paddr_t gaddr = 0;
931 	uint64_t *gbuf = NULL;
932 	int result = 0, error;
933 
934 	gaddr = octfpa_buf_get_paddr(cnmac_fb_sg);
935 	if (gaddr == 0) {
936 		log(LOG_WARNING, "%s: can not allocate gather buffer from "
937 		    "free pool allocator\n", device_xname(sc->sc_dev));
938 		result = 1;
939 		goto done;
940 	}
941 
942 #ifdef __mips_n32
943 	KASSERT((gaddr & ~MIPS_PHYS_MASK) == 0);
944 	gbuf = (uint64_t *)(uintptr_t)MIPS_PHYS_TO_KSEG0(gaddr);
945 #else
946 	gbuf = (uint64_t *)(uintptr_t)MIPS_PHYS_TO_XKPHYS_CACHED(gaddr);
947 #endif
948 
949 	KASSERT(gbuf != NULL);
950 
951 	error = cnmac_send_buf(sc, m, gbuf, pwdc);
952 	if (error != 0) {
953 		/* Already logging */
954 		octfpa_buf_put_paddr(cnmac_fb_sg, gaddr);
955 		result = error;
956 		goto done;
957 	}
958 
959 	cnmac_send_queue_add(sc, m, gbuf);
960 
961 done:
962 	return result;
963 }
964 
965 static void
966 cnmac_start(struct ifnet *ifp)
967 {
968 	struct cnmac_softc *sc = ifp->if_softc;
969 	struct mbuf *m;
970 	int wdc = 0;
971 
972 	/*
973 	 * Performance tuning
974 	 * pre-send iobdma request
975 	 */
976 	cnmac_send_queue_flush_prefetch(sc);
977 
978 	if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
979 		goto last;
980 
981 	if (__predict_false(!octgmx_link_status(sc->sc_gmx_port)))
982 		goto last;
983 
984 	for (;;) {
985 		IFQ_POLL(&ifp->if_snd, m);
986 		if (__predict_false(m == NULL))
987 			break;
988 
989 		/* XXX XXX XXX */
990 		cnmac_send_queue_flush_fetch(sc);
991 
992 		/*
993 		 * If no free send buffer is available, free all the sent
994 		 * buffers and bail out.
995 		 */
996 		if (cnmac_send_queue_is_full(sc)) {
997 			SET(ifp->if_flags, IFF_OACTIVE);
998 			if (wdc > 0)
999 				octpko_op_doorbell_write(sc->sc_port,
1000 				    sc->sc_port, wdc);
1001 			return;
1002 		}
1003 		/* XXX XXX XXX */
1004 
1005 		IFQ_DEQUEUE(&ifp->if_snd, m);
1006 
1007 		bpf_mtap(ifp, m, BPF_D_OUT);
1008 
1009 		/* XXX XXX XXX */
1010 		if (sc->sc_soft_req_cnt > sc->sc_soft_req_thresh)
1011 			cnmac_send_queue_flush(sc);
1012 		if (cnmac_send(sc, m, &wdc)) {
1013 			IF_DROP(&ifp->if_snd);
1014 			m_freem(m);
1015 			log(LOG_WARNING,
1016 			  "%s: failed in the transmission of the packet\n",
1017 			  device_xname(sc->sc_dev));
1018 		} else
1019 			sc->sc_soft_req_cnt++;
1020 
1021 		if (sc->sc_flush)
1022 			cnmac_send_queue_flush_sync(sc);
1023 		/* XXX XXX XXX */
1024 
1025 		/* Send next iobdma request */
1026 		cnmac_send_queue_flush_prefetch(sc);
1027 	}
1028 
1029 	if (wdc > 0)
1030 		octpko_op_doorbell_write(sc->sc_port, sc->sc_port, wdc);
1031 
1032 last:
1033 	cnmac_send_queue_flush_fetch(sc);
1034 }
1035 
1036 static void
1037 cnmac_watchdog(struct ifnet *ifp)
1038 {
1039 	struct cnmac_softc *sc = ifp->if_softc;
1040 
1041 	printf("%s: device timeout\n", device_xname(sc->sc_dev));
1042 
1043 	cnmac_configure(sc);
1044 
1045 	SET(ifp->if_flags, IFF_RUNNING);
1046 	CLR(ifp->if_flags, IFF_OACTIVE);
1047 	ifp->if_timer = 0;
1048 
1049 	cnmac_start(ifp);
1050 }
1051 
1052 static int
1053 cnmac_init(struct ifnet *ifp)
1054 {
1055 	struct cnmac_softc *sc = ifp->if_softc;
1056 
1057 	/* XXX don't disable commonly used parts!!! XXX */
1058 	if (sc->sc_init_flag == 0) {
1059 		/* Cancel any pending I/O. */
1060 		cnmac_stop(ifp, 0);
1061 
1062 		/* Initialize the device */
1063 		cnmac_configure(sc);
1064 
1065 		octpko_enable(sc->sc_pko);
1066 		octipd_enable(sc->sc_ipd);
1067 
1068 		sc->sc_init_flag = 1;
1069 	} else {
1070 		octgmx_port_enable(sc->sc_gmx_port, 1);
1071 	}
1072 	mii_ifmedia_change(&sc->sc_mii);
1073 
1074 	octgmx_set_filter(sc->sc_gmx_port);
1075 
1076 	callout_reset(&sc->sc_tick_misc_ch, hz, cnmac_tick_misc, sc);
1077 	callout_reset(&sc->sc_tick_free_ch, hz, cnmac_tick_free, sc);
1078 
1079 	SET(ifp->if_flags, IFF_RUNNING);
1080 	CLR(ifp->if_flags, IFF_OACTIVE);
1081 
1082 	return 0;
1083 }
1084 
1085 static void
1086 cnmac_stop(struct ifnet *ifp, int disable)
1087 {
1088 	struct cnmac_softc *sc = ifp->if_softc;
1089 
1090 	callout_stop(&sc->sc_tick_misc_ch);
1091 	callout_stop(&sc->sc_tick_free_ch);
1092 
1093 	mii_down(&sc->sc_mii);
1094 
1095 	octgmx_port_enable(sc->sc_gmx_port, 0);
1096 
1097 	/* Mark the interface as down and cancel the watchdog timer. */
1098 	CLR(ifp->if_flags, IFF_RUNNING | IFF_OACTIVE);
1099 	ifp->if_timer = 0;
1100 
1101 }
1102 
1103 /* ---- misc */
1104 
1105 static int
1106 cnmac_reset(struct cnmac_softc *sc)
1107 {
1108 	octgmx_reset_speed(sc->sc_gmx_port);
1109 	octgmx_reset_flowctl(sc->sc_gmx_port);
1110 	octgmx_reset_timing(sc->sc_gmx_port);
1111 
1112 	return 0;
1113 }
1114 
1115 static int
1116 cnmac_configure(struct cnmac_softc *sc)
1117 {
1118 	octgmx_port_enable(sc->sc_gmx_port, 0);
1119 
1120 	cnmac_reset(sc);
1121 
1122 	cnmac_configure_common(sc);
1123 
1124 	octpko_port_config(sc->sc_pko);
1125 	octpko_port_enable(sc->sc_pko, 1);
1126 	octpow_config(sc->sc_pow, sc->sc_powgroup);
1127 
1128 	octgmx_tx_stats_rd_clr(sc->sc_gmx_port, 1);
1129 	octgmx_rx_stats_rd_clr(sc->sc_gmx_port, 1);
1130 
1131 	octgmx_port_enable(sc->sc_gmx_port, 1);
1132 
1133 	return 0;
1134 }
1135 
1136 static int
1137 cnmac_configure_common(struct cnmac_softc *sc)
1138 {
1139 	static int once;
1140 
1141 	if (once == 1)
1142 		return 0;
1143 	once = 1;
1144 
1145 	octipd_config(sc->sc_ipd);
1146 	octpko_config(sc->sc_pko);
1147 
1148 	return 0;
1149 }
1150 
1151 /* ---- receive (input) */
1152 
1153 static inline int
1154 cnmac_recv_mbuf(struct cnmac_softc *sc, uint64_t *work, struct mbuf **rm)
1155 {
1156 	struct mbuf *m;
1157 	vaddr_t addr;
1158 	vaddr_t ext_buf;
1159 	size_t ext_size;
1160 	uint64_t word1 = work[1];
1161 	uint64_t word2 = work[2];
1162 	uint64_t word3 = work[3];
1163 
1164 	MGETHDR(m, M_NOWAIT, MT_DATA);
1165 	if (m == NULL)
1166 		return 1;
1167 
1168 	octfpa_buf_put(cnmac_fb_wqe, work);
1169 
1170 	if (__SHIFTOUT(word2, PIP_WQE_WORD2_IP_BUFS) != 1)
1171 		panic("%s: expected one buffer, got %" PRId64, __func__,
1172 		    __SHIFTOUT(word2, PIP_WQE_WORD2_IP_BUFS));
1173 
1174 
1175 #ifdef __mips_n32
1176 	KASSERT((word3 & ~MIPS_PHYS_MASK) == 0);
1177 	addr = MIPS_PHYS_TO_KSEG0(word3 & PIP_WQE_WORD3_ADDR);
1178 #else
1179 	addr = MIPS_PHYS_TO_XKPHYS_CACHED(word3 & PIP_WQE_WORD3_ADDR);
1180 #endif
1181 
1182 	ext_size = OCTEON_POOL_SIZE_PKT;
1183 	ext_buf = addr & ~(ext_size - 1);
1184 	MEXTADD(m, ext_buf, ext_size, 0, cnmac_buf_ext_free, NULL);
1185 
1186 	m->m_data = (void *)addr;
1187 	m->m_len = m->m_pkthdr.len = (word1 & PIP_WQE_WORD1_LEN) >> 48;
1188 	m_set_rcvif(m, &sc->sc_ethercom.ec_if);
1189 
1190 	/* Not readonly buffer */
1191 	m->m_flags |= M_EXT_RW;
1192 
1193 	*rm = m;
1194 
1195 	KASSERT(*rm != NULL);
1196 
1197 	return 0;
1198 }
1199 
1200 static inline int
1201 cnmac_recv_check(struct cnmac_softc *sc, uint64_t word2)
1202 {
1203 	static struct timeval rxerr_log_interval = { 0, 2500000 };
1204 	uint64_t opecode;
1205 
1206 	if (__predict_true(!ISSET(word2, PIP_WQE_WORD2_NOIP_RE)))
1207 		return 0;
1208 
1209 	opecode = word2 & PIP_WQE_WORD2_NOIP_OPECODE;
1210 	if ((sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) &&
1211 	    ratecheck(&sc->sc_rxerr_log_last, &rxerr_log_interval))
1212 		log(LOG_DEBUG, "%s: rx error (%"PRId64")\n",
1213 		    device_xname(sc->sc_dev), opecode);
1214 
1215 	/* This error is harmless */
1216 	if (opecode == PIP_WQE_WORD2_RE_OPCODE_OVRRUN)
1217 		return 0;
1218 
1219 	return 1;
1220 }
1221 
1222 static inline int
1223 cnmac_recv(struct cnmac_softc *sc, uint64_t *work)
1224 {
1225 	struct ifnet *ifp;
1226 	struct mbuf *m;
1227 	uint64_t word2;
1228 
1229 	KASSERT(sc != NULL);
1230 	KASSERT(work != NULL);
1231 
1232 	word2 = work[2];
1233 	ifp = &sc->sc_ethercom.ec_if;
1234 
1235 	KASSERT(ifp != NULL);
1236 
1237 	if (!ISSET(ifp->if_flags, IFF_RUNNING))
1238 		goto drop;
1239 
1240 	if (__predict_false(cnmac_recv_check(sc, word2) != 0)) {
1241 		if_statinc(ifp, if_ierrors);
1242 		goto drop;
1243 	}
1244 
1245 	if (__predict_false(cnmac_recv_mbuf(sc, work, &m) != 0)) {
1246 		if_statinc(ifp, if_ierrors);
1247 		goto drop;
1248 	}
1249 
1250 	/* work[0] .. work[3] may not be valid any more */
1251 
1252 	KASSERT(m != NULL);
1253 
1254 	octipd_offload(word2, m->m_data, &m->m_pkthdr.csum_flags);
1255 
1256 	if_percpuq_enqueue(ifp->if_percpuq, m);
1257 
1258 	return 0;
1259 
1260 drop:
1261 	cnmac_buf_free_work(sc, work);
1262 	return 1;
1263 }
1264 
1265 static int
1266 cnmac_intr(void *arg)
1267 {
1268 	struct cnmac_softc *sc = arg;
1269 	uint64_t *work;
1270 	uint64_t wqmask = __BIT(sc->sc_powgroup);
1271 	uint32_t coreid = 0;	/* XXX octeon_get_coreid() */
1272 	uint32_t port;
1273 
1274 	_POW_WR8(sc->sc_pow, POW_PP_GRP_MSK_OFFSET(coreid), wqmask);
1275 
1276 	octpow_tag_sw_wait();
1277 	octpow_work_request_async(OCTEON_CVMSEG_OFFSET(csm_pow_intr),
1278 	    POW_NO_WAIT);
1279 
1280 	for (;;) {
1281 		work = (uint64_t *)octpow_work_response_async(
1282 		    OCTEON_CVMSEG_OFFSET(csm_pow_intr));
1283 		if (work == NULL)
1284 			break;
1285 
1286 		octpow_tag_sw_wait();
1287 		octpow_work_request_async(OCTEON_CVMSEG_OFFSET(csm_pow_intr),
1288 		    POW_NO_WAIT);
1289 
1290 		port = __SHIFTOUT(work[1], PIP_WQE_WORD1_IPRT);
1291 		if (port != sc->sc_port) {
1292 			printf("%s: unexpected wqe port %u, should be %u\n",
1293 			    device_xname(sc->sc_dev), port, sc->sc_port);
1294 			goto wqe_error;
1295 		}
1296 
1297 		(void)cnmac_recv(sc, work);
1298 	}
1299 
1300 	_POW_WR8(sc->sc_pow, POW_WQ_INT_OFFSET, wqmask);
1301 
1302 	return 1;
1303 
1304 wqe_error:
1305 	printf("word0: 0x%016" PRIx64 "\n", work[0]);
1306 	printf("word1: 0x%016" PRIx64 "\n", work[1]);
1307 	printf("word2: 0x%016" PRIx64 "\n", work[2]);
1308 	printf("word3: 0x%016" PRIx64 "\n", work[3]);
1309 	panic("wqe_error");
1310 }
1311 
1312 /* ---- tick */
1313 
1314 /*
1315  * cnmac_tick_free
1316  *
1317  * => garbage collect send gather buffer / mbuf
1318  * => called at softclock
1319  */
1320 static void
1321 cnmac_tick_free(void *arg)
1322 {
1323 	struct cnmac_softc *sc = arg;
1324 	int timo;
1325 	int s;
1326 
1327 	s = splnet();
1328 	/* XXX XXX XXX */
1329 	if (sc->sc_soft_req_cnt > 0) {
1330 		cnmac_send_queue_flush_prefetch(sc);
1331 		cnmac_send_queue_flush_fetch(sc);
1332 		cnmac_send_queue_flush(sc);
1333 		cnmac_send_queue_flush_sync(sc);
1334 	}
1335 	/* XXX XXX XXX */
1336 
1337 	/* XXX XXX XXX */
1338 	/* ??? */
1339 	timo = hz - (100 * sc->sc_ext_callback_cnt);
1340 	if (timo < 10)
1341 		 timo = 10;
1342 	callout_schedule(&sc->sc_tick_free_ch, timo);
1343 	/* XXX XXX XXX */
1344 	splx(s);
1345 }
1346 
1347 /*
1348  * cnmac_tick_misc
1349  *
1350  * => collect statistics
1351  * => check link status
1352  * => called at softclock
1353  */
1354 static void
1355 cnmac_tick_misc(void *arg)
1356 {
1357 	struct cnmac_softc *sc = arg;
1358 	struct ifnet *ifp;
1359 	int s;
1360 
1361 	s = splnet();
1362 
1363 	ifp = &sc->sc_ethercom.ec_if;
1364 
1365 	octgmx_stats(sc->sc_gmx_port);
1366 	octpip_stats(sc->sc_pip, ifp, sc->sc_port);
1367 	mii_tick(&sc->sc_mii);
1368 
1369 	splx(s);
1370 
1371 	callout_schedule(&sc->sc_tick_misc_ch, hz);
1372 }
1373