1*31586d2cSmatt /* $NetBSD: platform.h,v 1.2 2011/07/10 06:26:02 matt Exp $ */
281d18a2fSmatt /*
381d18a2fSmatt * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
481d18a2fSmatt * Copyright (c) 2006 Garrett D'Amore.
581d18a2fSmatt * All rights reserved.
681d18a2fSmatt *
781d18a2fSmatt * This code was written by Garrett D'Amore for the Champaign-Urbana
881d18a2fSmatt * Community Wireless Network Project.
981d18a2fSmatt *
1081d18a2fSmatt * Redistribution and use in source and binary forms, with or
1181d18a2fSmatt * without modification, are permitted provided that the following
1281d18a2fSmatt * conditions are met:
1381d18a2fSmatt * 1. Redistributions of source code must retain the above copyright
1481d18a2fSmatt * notice, this list of conditions and the following disclaimer.
1581d18a2fSmatt * 2. Redistributions in binary form must reproduce the above
1681d18a2fSmatt * copyright notice, this list of conditions and the following
1781d18a2fSmatt * disclaimer in the documentation and/or other materials provided
1881d18a2fSmatt * with the distribution.
1981d18a2fSmatt * 3. All advertising materials mentioning features or use of this
2081d18a2fSmatt * software must display the following acknowledgements:
2181d18a2fSmatt * This product includes software developed by the Urbana-Champaign
2281d18a2fSmatt * Independent Media Center.
2381d18a2fSmatt * This product includes software developed by Garrett D'Amore.
2481d18a2fSmatt * 4. Urbana-Champaign Independent Media Center's name and Garrett
2581d18a2fSmatt * D'Amore's name may not be used to endorse or promote products
2681d18a2fSmatt * derived from this software without specific prior written permission.
2781d18a2fSmatt *
2881d18a2fSmatt * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
2981d18a2fSmatt * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
3081d18a2fSmatt * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
3181d18a2fSmatt * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
3281d18a2fSmatt * ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
3381d18a2fSmatt * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
3481d18a2fSmatt * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3581d18a2fSmatt * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
3681d18a2fSmatt * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
3781d18a2fSmatt * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
3881d18a2fSmatt * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
3981d18a2fSmatt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
4081d18a2fSmatt * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
4181d18a2fSmatt */
4281d18a2fSmatt
4381d18a2fSmatt #ifndef _MIPS_ATHEROS_PLATFORM_H_
4481d18a2fSmatt #define _MIPS_ATHEROS_PLATFORM_H_
4581d18a2fSmatt
4681d18a2fSmatt #include <sys/param.h>
4781d18a2fSmatt #include <sys/bus.h>
4881d18a2fSmatt
4981d18a2fSmatt struct atheros_device {
5081d18a2fSmatt const char *adv_name;
5181d18a2fSmatt bus_addr_t adv_addr;
5281d18a2fSmatt bus_size_t adv_size;
5381d18a2fSmatt u_int adv_cirq;
5481d18a2fSmatt u_int adv_mirq;
5581d18a2fSmatt uint32_t adv_mask;
5681d18a2fSmatt uint32_t adv_reset;
5781d18a2fSmatt uint32_t adv_enable;
5881d18a2fSmatt };
5981d18a2fSmatt
6081d18a2fSmatt /*
6181d18a2fSmatt * Board specific things.
6281d18a2fSmatt */
6381d18a2fSmatt struct atheros_boarddata;
6481d18a2fSmatt struct atheros_config;
6581d18a2fSmatt
6681d18a2fSmatt struct atheros_intrsw {
6781d18a2fSmatt void (*aisw_init)(void);
6881d18a2fSmatt void *(*aisw_cpu_establish)(int, int (*)(void *), void *);
6981d18a2fSmatt void (*aisw_cpu_disestablish)(void *);
7081d18a2fSmatt void *(*aisw_misc_establish)(int, int (*)(void *), void *);
7181d18a2fSmatt void (*aisw_misc_disestablish)(void *);
7281d18a2fSmatt void (*aisw_cpuintr)(int, vaddr_t, uint32_t);
7381d18a2fSmatt void (*aisw_iointr)(int, vaddr_t, uint32_t);
7481d18a2fSmatt };
7581d18a2fSmatt
7681d18a2fSmatt struct arfreqs {
7781d18a2fSmatt uint32_t freq_bus;
7881d18a2fSmatt uint32_t freq_cpu;
7981d18a2fSmatt uint32_t freq_mem;
8081d18a2fSmatt uint32_t freq_pll;
8181d18a2fSmatt uint32_t freq_ref;
82*31586d2cSmatt uint32_t freq_uart;
8381d18a2fSmatt };
8481d18a2fSmatt
8581d18a2fSmatt struct atheros_platformsw {
8681d18a2fSmatt const struct atheros_intrsw *apsw_intrsw;
8781d18a2fSmatt
8881d18a2fSmatt void (*apsw_intr_init)(void);
8981d18a2fSmatt const char * const * apsw_cpu_intrnames;
9081d18a2fSmatt const char * const * apsw_misc_intrnames;
9181d18a2fSmatt size_t apsw_cpu_nintrs;
9281d18a2fSmatt size_t apsw_misc_nintrs;
9381d18a2fSmatt u_int apsw_cpuirq_misc;
9481d18a2fSmatt
9581d18a2fSmatt bus_addr_t apsw_misc_intmask;
9681d18a2fSmatt bus_addr_t apsw_misc_intstat;
9781d18a2fSmatt
9881d18a2fSmatt const struct ipl_sr_map *apsw_ipl_sr_map;
9981d18a2fSmatt
10081d18a2fSmatt /*
10181d18a2fSmatt * CPU specific routines.
10281d18a2fSmatt */
10381d18a2fSmatt size_t (*apsw_get_memsize)(void);
10481d18a2fSmatt void (*apsw_wdog_reload)(uint32_t);
10581d18a2fSmatt void (*apsw_bus_init)(void);
10681d18a2fSmatt void (*apsw_get_freqs)(struct arfreqs *);
10781d18a2fSmatt void (*apsw_device_register)(device_t, void *);
10881d18a2fSmatt int (*apsw_enable_device)(const struct atheros_device *);
10981d18a2fSmatt void (*apsw_reset)(void);
11081d18a2fSmatt const struct atheros_device *apsw_devices;
11181d18a2fSmatt
11281d18a2fSmatt /*
11381d18a2fSmatt * Early console support.
11481d18a2fSmatt */
11581d18a2fSmatt bus_addr_t apsw_uart0_base;
11681d18a2fSmatt bus_addr_t apsw_revision_id_addr;
11781d18a2fSmatt };
11881d18a2fSmatt
11981d18a2fSmatt /*
12081d18a2fSmatt * Board specific data.
12181d18a2fSmatt */
12281d18a2fSmatt struct ar531x_config;
12381d18a2fSmatt struct ar531x_boarddata;
12481d18a2fSmatt struct atheros_boardsw {
12581d18a2fSmatt const struct ar531x_boarddata *(*absw_get_board_info)(void);
12681d18a2fSmatt const void *(*absw_get_radio_info)(void);
12781d18a2fSmatt };
12881d18a2fSmatt
12981d18a2fSmatt #ifdef _KERNEL
13081d18a2fSmatt void atheros_consinit(void);
13181d18a2fSmatt void atheros_early_consinit(void);
13281d18a2fSmatt
13381d18a2fSmatt void atheros_set_platformsw(void);
13481d18a2fSmatt const char *
13581d18a2fSmatt atheros_get_cpuname(void);
13681d18a2fSmatt u_int atheros_get_chipid(void);
13781d18a2fSmatt
138*31586d2cSmatt uint32_t atheros_get_uart_freq(void);
13981d18a2fSmatt uint32_t atheros_get_bus_freq(void);
14081d18a2fSmatt uint32_t atheros_get_cpu_freq(void);
14181d18a2fSmatt uint32_t atheros_get_mem_freq(void);
14281d18a2fSmatt
14381d18a2fSmatt const struct ar531x_boarddata *
14481d18a2fSmatt atheros_get_board_info(void);
14581d18a2fSmatt int atheros_get_board_config(struct ar531x_config *);
14681d18a2fSmatt
14781d18a2fSmatt extern const struct atheros_boardsw ar5312_boardsw;
14881d18a2fSmatt extern const struct atheros_boardsw ar5315_boardsw;
14981d18a2fSmatt
15081d18a2fSmatt extern const struct atheros_platformsw ar5312_platformsw;
15181d18a2fSmatt extern const struct atheros_platformsw ar5315_platformsw;
15281d18a2fSmatt extern const struct atheros_platformsw ar7100_platformsw;
15381d18a2fSmatt extern const struct atheros_platformsw ar9344_platformsw;
15481d18a2fSmatt extern const struct atheros_platformsw *platformsw;
15581d18a2fSmatt
15681d18a2fSmatt extern const struct atheros_intrsw atheros_intrsw;
15781d18a2fSmatt
15881d18a2fSmatt static inline uint32_t
atheros_get_memsize(void)15981d18a2fSmatt atheros_get_memsize(void)
16081d18a2fSmatt {
16181d18a2fSmatt return (*platformsw->apsw_get_memsize)();
16281d18a2fSmatt }
16381d18a2fSmatt
16481d18a2fSmatt static inline void
atheros_wdog_reload(uint32_t period)16581d18a2fSmatt atheros_wdog_reload(uint32_t period)
16681d18a2fSmatt {
16781d18a2fSmatt (*platformsw->apsw_wdog_reload)(period);
16881d18a2fSmatt }
16981d18a2fSmatt
17081d18a2fSmatt static inline void
atheros_bus_init(void)17181d18a2fSmatt atheros_bus_init(void)
17281d18a2fSmatt {
17381d18a2fSmatt return (*platformsw->apsw_bus_init)();
17481d18a2fSmatt }
17581d18a2fSmatt
17681d18a2fSmatt static inline void
atheros_intr_init(void)17781d18a2fSmatt atheros_intr_init(void)
17881d18a2fSmatt {
17981d18a2fSmatt (*platformsw->apsw_intrsw->aisw_init)();
18081d18a2fSmatt }
18181d18a2fSmatt
18281d18a2fSmatt static inline void *
atheros_cpu_intr_establish(int irq,int (* func)(void *),void * arg)18381d18a2fSmatt atheros_cpu_intr_establish(int irq, int (*func)(void *), void *arg)
18481d18a2fSmatt {
18581d18a2fSmatt return (*platformsw->apsw_intrsw->aisw_cpu_establish)(irq, func, arg);
18681d18a2fSmatt }
18781d18a2fSmatt
18881d18a2fSmatt static inline void
atheros_cpu_intr_disestablish(void * cookie)18981d18a2fSmatt atheros_cpu_intr_disestablish(void *cookie)
19081d18a2fSmatt {
19181d18a2fSmatt (*platformsw->apsw_intrsw->aisw_cpu_disestablish)(cookie);
19281d18a2fSmatt }
19381d18a2fSmatt
19481d18a2fSmatt static inline void *
atheros_misc_intr_establish(int irq,int (* func)(void *),void * arg)19581d18a2fSmatt atheros_misc_intr_establish(int irq, int (*func)(void *), void *arg)
19681d18a2fSmatt {
19781d18a2fSmatt return (*platformsw->apsw_intrsw->aisw_misc_establish)(irq, func, arg);
19881d18a2fSmatt }
19981d18a2fSmatt
20081d18a2fSmatt static inline void
atheros_misc_intr_disestablish(void * cookie)20181d18a2fSmatt atheros_misc_intr_disestablish(void *cookie)
20281d18a2fSmatt {
20381d18a2fSmatt (*platformsw->apsw_intrsw->aisw_misc_disestablish)(cookie);
20481d18a2fSmatt }
20581d18a2fSmatt
20681d18a2fSmatt static inline int
atheros_enable_device(const struct atheros_device * adv)20781d18a2fSmatt atheros_enable_device(const struct atheros_device *adv)
20881d18a2fSmatt {
20981d18a2fSmatt return (*platformsw->apsw_enable_device)(adv);
21081d18a2fSmatt }
21181d18a2fSmatt
21281d18a2fSmatt static inline void
atheros_reset(void)21381d18a2fSmatt atheros_reset(void)
21481d18a2fSmatt {
21581d18a2fSmatt return (*platformsw->apsw_reset)();
21681d18a2fSmatt }
21781d18a2fSmatt
21881d18a2fSmatt #endif /* _KERNEL */
21981d18a2fSmatt
22081d18a2fSmatt #endif /* _MIPS_ATHEROS_PLATFORM_H_ */
221