xref: /netbsd-src/sys/arch/mips/atheros/dev/athflash.c (revision b7b7574d3bf8eeb51a1fa3977b59142ec6434a55)
1 /* $NetBSD: athflash.c,v 1.7 2014/03/16 05:20:25 dholland Exp $ */
2 
3 /*
4  * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
5  * Copyright (c) 2006 Garrett D'Amore.
6  * All rights reserved.
7  *
8  * Portions of this code were written by Garrett D'Amore for the
9  * Champaign-Urbana Community Wireless Network Project.
10  *
11  * Redistribution and use in source and binary forms, with or
12  * without modification, are permitted provided that the following
13  * conditions are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above
17  *    copyright notice, this list of conditions and the following
18  *    disclaimer in the documentation and/or other materials provided
19  *    with the distribution.
20  * 3. All advertising materials mentioning features or use of this
21  *    software must display the following acknowledgements:
22  *      This product includes software developed by the Urbana-Champaign
23  *      Independent Media Center.
24  *	This product includes software developed by Garrett D'Amore.
25  * 4. Urbana-Champaign Independent Media Center's name and Garrett
26  *    D'Amore's name may not be used to endorse or promote products
27  *    derived from this software without specific prior written permission.
28  *
29  * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
30  * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
31  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
32  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33  * ARE DISCLAIMED.  IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
34  * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
35  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
36  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
39  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
40  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
41  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42  */
43 /*
44  * Copyright (c) 2002 The NetBSD Foundation, Inc.
45  * All rights reserved.
46  *
47  * This code is derived from software contributed to The NetBSD Foundation
48  * by Naoto Shimazaki of YOKOGAWA Electric Corporation.
49  *
50  * Redistribution and use in source and binary forms, with or without
51  * modification, are permitted provided that the following conditions
52  * are met:
53  * 1. Redistributions of source code must retain the above copyright
54  *    notice, this list of conditions and the following disclaimer.
55  * 2. Redistributions in binary form must reproduce the above copyright
56  *    notice, this list of conditions and the following disclaimer in the
57  *    documentation and/or other materials provided with the distribution.
58  *
59  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
60  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
61  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
62  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
63  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
64  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
65  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
66  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
67  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
68  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
69  * POSSIBILITY OF SUCH DAMAGE.
70  */
71 
72 /*
73  * Flash Memory Driver
74  *
75  * XXX This primitive flash driver does *not* support boot sectored devices,
76  * XXX and only supports a fairly limited set of devices, that we are likely to
77  * XXX to find in an AP30.
78  * XXX
79  * XXX We also are only supporting flash widths of 16 _for the moment_, and
80  * XXX we are only supporting flash devices that use the AMD command sets.
81  * XXX All this should be reviewed and improved to be much more generic.
82  */
83 
84 #include <sys/cdefs.h>
85 __KERNEL_RCSID(0, "$NetBSD: athflash.c,v 1.7 2014/03/16 05:20:25 dholland Exp $");
86 
87 #include <sys/param.h>
88 #include <sys/conf.h>
89 #include <sys/device.h>
90 #include <sys/kernel.h>
91 #include <sys/malloc.h>
92 #include <sys/proc.h>
93 #include <sys/systm.h>
94 
95 #include <sys/bus.h>
96 
97 #include <mips/atheros/include/arbusvar.h>
98 
99 #ifdef FLASH_DEBUG
100 int	flash_debug = 0;
101 #define DPRINTF(x)	if (flash_debug) printf x
102 #else
103 #define DPRINTF(x)
104 #endif
105 
106 struct flash_softc {
107 	bus_space_tag_t		sc_iot;
108 	bus_space_handle_t	sc_ioh;
109 	size_t			sc_size;
110 	size_t			sc_sector_size;
111 	int			sc_status;
112 	u_int8_t		*sc_buf;
113 };
114 
115 #define	FLASH_ST_BUSY	0x1
116 
117 static int flash_probe(device_t, cfdata_t, void *);
118 static void flash_attach(device_t, device_t, void *);
119 
120 static int is_block_same(struct flash_softc *, bus_size_t, const void *);
121 static int toggle_bit_wait(struct flash_softc *, bus_size_t, int, int, int);
122 
123 static int flash_sector_erase(struct flash_softc *, bus_size_t);
124 static int flash_sector_write(struct flash_softc *, bus_size_t);
125 
126 extern struct cfdriver athflash_cd;
127 
128 CFATTACH_DECL_NEW(athflash, sizeof(struct flash_softc),
129 	      flash_probe, flash_attach, NULL, NULL);
130 
131 dev_type_open(flashopen);
132 dev_type_close(flashclose);
133 dev_type_read(flashread);
134 dev_type_write(flashwrite);
135 
136 const struct cdevsw athflash_cdevsw = {
137 	.d_open = flashopen,
138 	.d_close = flashclose,
139 	.d_read = flashread,
140 	.d_write = flashwrite,
141 	.d_ioctl = noioctl,
142 	.d_stop = nostop,
143 	.d_tty = notty,
144 	.d_poll = nopoll,
145 	.d_mmap = nommap,
146 	.d_kqfilter = nokqfilter,
147 	.d_flag = 0
148 };
149 
150 static struct {
151 	uint16_t		vendor_id;
152 	uint16_t		device_id;
153 	const char		*name;
154 	int			sector_size;
155 	int			flash_size;
156 } flash_ids[] = {
157 	{ 0x00bf, 0x2780, "SST 39VF400", 0x01000, 0x080000 },	/* 512KB */
158 	{ 0x00bf, 0x2782, "SST 39VF160", 0x01000, 0x200000 },	/* 2MB */
159 	{ 0xffff, 0xffff, NULL, 0, 0 }				/* end list */
160 };
161 
162 static int
163 flash_probe(device_t parent, cfdata_t cf, void *aux)
164 {
165 	struct arbus_attach_args	*aa = aux;
166 	bus_space_handle_t		ioh;
167 	int				rv = 0, i;
168 	uint16_t			venid, devid;
169 
170 	if (strcmp(aa->aa_name, cf->cf_name) != 0)
171 		return 0;
172 
173 	DPRINTF(("trying to map address %x\n", (unsigned)aa->aa_addr));
174 	if (bus_space_map(aa->aa_bst, aa->aa_addr, aa->aa_size, 0, &ioh))
175 		return 0;
176 
177 	/* issue JEDEC query */
178 	DPRINTF(("issuing JEDEC query\n"));
179 	bus_space_write_2(aa->aa_bst, ioh, (0x5555 << 1), 0xAAAA);
180 	bus_space_write_2(aa->aa_bst, ioh, (0x2AAA << 1), 0x5555);
181 	bus_space_write_2(aa->aa_bst, ioh, (0x5555 << 1), 0x9090);
182 
183 	delay(100);
184 	venid = bus_space_read_2(aa->aa_bst, ioh, 0);
185 	devid = bus_space_read_2(aa->aa_bst, ioh, 2);
186 
187 	/* issue software exit */
188 	bus_space_write_2(aa->aa_bst, ioh, 0x0, 0xF0F0);
189 
190 	for (i = 0; flash_ids[i].name != NULL; i++) {
191 		if ((venid == flash_ids[i].vendor_id) &&
192 		    (devid == flash_ids[i].device_id)) {
193 			rv = 1;
194 			break;
195 		}
196 	}
197 
198 	bus_space_unmap(aa->aa_bst, ioh, aa->aa_size);
199 	return rv;
200 }
201 
202 static void
203 flash_attach(device_t parent, device_t self, void *aux)
204 {
205 	char nbuf[32];
206 	struct flash_softc		*sc = device_private(self);
207 	struct arbus_attach_args	*aa = aux;
208 	int				i;
209 	bus_space_tag_t			iot = aa->aa_bst;
210 	bus_space_handle_t		ioh;
211 	uint16_t			venid, devid;
212 
213 	if (bus_space_map(iot, aa->aa_addr, aa->aa_size, 0, &ioh)) {
214 		printf(": can't map i/o space\n");
215                 return;
216   	}
217 
218 	sc->sc_iot = iot;
219 	sc->sc_ioh = ioh;
220 	sc->sc_status = 0;
221 
222 	/* issue JEDEC query */
223 	bus_space_write_2(aa->aa_bst, ioh, (0x5555 << 1), 0xAAAA);
224 	bus_space_write_2(aa->aa_bst, ioh, (0x2AAA << 1), 0x5555);
225 	bus_space_write_2(aa->aa_bst, ioh, (0x5555 << 1), 0x9090);
226 
227 	delay(100);
228 	venid = bus_space_read_2(aa->aa_bst, ioh, 0);
229 	devid = bus_space_read_2(aa->aa_bst, ioh, 2);
230 
231 	/* issue software exit */
232 	bus_space_write_2(aa->aa_bst, ioh, 0x0, 0xF0F0);
233 
234 	for (i = 0; flash_ids[i].name != NULL; i++) {
235 		if ((venid == flash_ids[i].vendor_id) &&
236 		    (devid == flash_ids[i].device_id)) {
237 			break;
238 		}
239 	}
240 
241 	KASSERT(flash_ids[i].name != NULL);
242 	printf(": %s", flash_ids[i].name);
243 	if (humanize_number(nbuf, sizeof(nbuf), flash_ids[i].flash_size, "B",
244 	    1024) > 0)
245 		printf(" (%s)", nbuf);
246 
247 	/*
248 	 * determine size of the largest block
249 	 */
250 	sc->sc_size = flash_ids[i].flash_size;
251 	sc->sc_sector_size = flash_ids[i].sector_size;
252 
253 	if ((sc->sc_buf = malloc(sc->sc_sector_size, M_DEVBUF, M_NOWAIT))
254 	    == NULL) {
255 		printf(": can't alloc buffer space\n");
256 		return;
257 	}
258 
259 	printf("\n");
260 }
261 
262 int
263 flashopen(dev_t dev, int flag, int mode, struct lwp *l)
264 {
265 	struct flash_softc	*sc;
266 
267 	sc = device_lookup_private(&athflash_cd, minor(dev));
268 	if (sc == NULL)
269 		return ENXIO;
270 	if (sc->sc_status & FLASH_ST_BUSY)
271 		return EBUSY;
272 	sc->sc_status |= FLASH_ST_BUSY;
273 	return 0;
274 }
275 
276 int
277 flashclose(dev_t dev, int flag, int mode, struct lwp *l)
278 {
279 	struct flash_softc	*sc;
280 
281 	sc = device_lookup_private(&athflash_cd, minor(dev));
282 	sc->sc_status &= ~FLASH_ST_BUSY;
283 	return 0;
284 }
285 
286 int
287 flashread(dev_t dev, struct uio *uio, int flag)
288 {
289 	struct flash_softc	*sc;
290 	bus_space_tag_t		iot;
291 	bus_space_handle_t	ioh;
292 	bus_size_t		off;
293 	int			total;
294 	int			count;
295 	int			error;
296 
297 	sc = device_lookup_private(&athflash_cd, minor(dev));
298 	iot = sc->sc_iot;
299 	ioh = sc->sc_ioh;
300 
301 	off = uio->uio_offset;
302 	total = min(sc->sc_size - off, uio->uio_resid);
303 
304 	while (total > 0) {
305 		count = min(sc->sc_sector_size, uio->uio_resid);
306 		bus_space_read_region_1(iot, ioh, off, sc->sc_buf, count);
307 		if ((error = uiomove(sc->sc_buf, count, uio)) != 0)
308 			return error;
309 		off += count;
310 		total -= count;
311 	}
312 	return 0;
313 }
314 
315 
316 int
317 flashwrite(dev_t dev, struct uio *uio, int flag)
318 {
319 	struct flash_softc	*sc;
320 	bus_space_tag_t		iot;
321 	bus_space_handle_t	ioh;
322 	bus_size_t		off;
323 	int			stat;
324 	int			error;
325 
326 	sc = device_lookup_private(&athflash_cd, minor(dev));
327 
328 	if (sc->sc_size < uio->uio_offset + uio->uio_resid)
329 		return ENOSPC;
330 	if (uio->uio_offset % sc->sc_sector_size)
331 		return EINVAL;
332 	if (uio->uio_resid % sc->sc_sector_size)
333 		return EINVAL;
334 
335 	iot = sc->sc_iot;
336 	ioh = sc->sc_ioh;
337 
338 	for (off = uio->uio_offset;
339 	     uio->uio_resid > 0;
340 	     off += sc->sc_sector_size) {
341 		error = uiomove(sc->sc_buf, sc->sc_sector_size, uio);
342 		if (error != 0)
343 			return error;
344 		if (is_block_same(sc, off, sc->sc_buf))
345 			continue;
346 		if ((stat = flash_sector_erase(sc, off)) != 0) {
347 			printf("sector erase failed status = 0x%x\n", stat);
348 			return EIO;
349 		}
350 		if ((stat = flash_sector_write(sc, off)) != 0) {
351 			printf("sector write failed status = 0x%x\n", stat);
352 			return EIO;
353 		}
354 	}
355 	return 0;
356 }
357 
358 static int
359 is_block_same(struct flash_softc *sc, bus_size_t offset, const void *bufp)
360 {
361 	bus_space_tag_t		iot = sc->sc_iot;
362 	bus_space_handle_t	ioh = sc->sc_ioh;
363 	const u_int8_t		*p = bufp;
364 	int			count = sc->sc_sector_size;
365 
366 	while (count-- > 0) {
367 		if (bus_space_read_1(iot, ioh, offset++) != *p++)
368 			return 0;
369 	}
370 	return 1;
371 }
372 
373 static int
374 toggle_bit_wait(struct flash_softc *sc, bus_size_t offset,
375     int typtmo, int maxtmo, int spin)
376 {
377 	bus_space_tag_t		iot = sc->sc_iot;
378 	bus_space_handle_t	ioh = sc->sc_ioh;
379 	uint8_t			d1, d2;
380 
381 	while (maxtmo > 0) {
382 
383 		if (spin) {
384 			DELAY(typtmo);
385 		} else {
386 			tsleep(sc, PRIBIO, "blockerase",
387 			    (typtmo / hz) + 1);
388 		}
389 
390 		d1 = bus_space_read_1(iot, ioh, offset);
391 		d2 = bus_space_read_2(iot, ioh, offset);
392 
393 		/* watch for the toggle bit to stop toggling */
394 		if ((d1 & 0x40) == (d2 & 0x40)) {
395 			return 0;
396 		}
397 
398 		maxtmo -= typtmo;
399 	}
400 	return (ETIMEDOUT);
401 }
402 
403 static int
404 flash_sector_erase(struct flash_softc *sc, bus_size_t offset)
405 {
406 	bus_space_tag_t		iot = sc->sc_iot;
407 	bus_space_handle_t	ioh = sc->sc_ioh;
408 
409 	DPRINTF(("flash_sector_erase offset = %08lx\n", offset));
410 
411 	bus_space_write_2(iot, ioh, (0x5555 << 1), 0xAAAA);
412 	bus_space_write_2(iot, ioh, (0x2AAA << 1), 0x5555);
413 	bus_space_write_2(iot, ioh, (0x5555 << 1), 0x8080);
414 	bus_space_write_2(iot, ioh, (0x5555 << 1), 0xAAAA);
415 	bus_space_write_2(iot, ioh, (0x2AAA << 1), 0x5555);
416 
417 	bus_space_write_2(iot, ioh, offset, 0x3030);
418 
419 	/*
420 	 * NB: with CFI, we could get more meaningful timeout data for
421 	 * now we just assign reasonable values - 10 msec typical, and
422 	 * up to 60 secs to erase the whole sector.
423 	 */
424 
425 	return toggle_bit_wait(sc, offset, 10000, 60000000, 0);
426 }
427 
428 static int
429 flash_sector_write(struct flash_softc *sc, bus_size_t offset)
430 {
431 	bus_space_tag_t		iot = sc->sc_iot;
432 	bus_space_handle_t	ioh = sc->sc_ioh;
433 	bus_size_t		fence;
434 	const u_int16_t		*p;
435 
436 	p = (u_int16_t *) sc->sc_buf;
437 	fence = offset + sc->sc_sector_size;
438 	do {
439 		bus_space_write_2(iot, ioh, (0x5555 << 1), 0xAAAA);
440 		bus_space_write_2(iot, ioh, (0x2AAA << 1), 0x5555);
441 		bus_space_write_2(iot, ioh, (0xAAAA << 1), 0xA0A0);
442 
443 		bus_space_write_2(iot, ioh, offset, *p);
444 
445 		/* wait up to 1 msec, in 10 usec increments, no sleeping */
446 		if (toggle_bit_wait(sc, offset, 10, 1000, 1) != 0)
447 			return ETIMEDOUT;
448 		p++;
449 		offset += 2;
450 	} while (offset < fence);
451 
452 	return 0;
453 }
454