1 /* $NetBSD: aubus.c,v 1.8 2003/04/02 02:18:52 hpeyerl Exp $ */ 2 3 /* 4 * Copyright 2001 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Simon Burge for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed by Christopher G. Demetriou 52 * for the NetBSD Project. 53 * 4. The name of the author may not be used to endorse or promote products 54 * derived from this software without specific prior written permission 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 57 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 58 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 59 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 60 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 61 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 62 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 63 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 64 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 65 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 66 */ 67 68 #include "locators.h" 69 70 #include <sys/param.h> 71 #include <sys/systm.h> 72 #include <sys/device.h> 73 #include <sys/extent.h> 74 #include <sys/malloc.h> 75 76 #define _MIPS_BUS_DMA_PRIVATE 77 #include <machine/bus.h> 78 #include <machine/locore.h> 79 #include <mips/alchemy/include/aureg.h> 80 #include <mips/alchemy/include/aubusvar.h> 81 82 83 struct au1x00_dev { 84 const char *name; 85 bus_addr_t addr[3]; 86 int irq[2]; 87 }; 88 89 /* 90 * The devices built in to the Au1000 cpu. 91 */ 92 const struct au1x00_dev au1000_devs [] = { 93 { "aucom", { UART0_BASE }, { 0, -1 }}, 94 { "aucom", { UART1_BASE }, { 1, -1 }}, 95 { "aucom", { UART2_BASE }, { 2, -1 }}, 96 { "aucom", { UART3_BASE }, { 3, -1 }}, 97 { "aurtc", { }, { -1, -1 }}, 98 { "aumac", { MAC0_BASE, MAC0_ENABLE, MAC0_DMA_BASE }, { 28, -1 }}, 99 { "aumac", { MAC1_BASE, MAC1_ENABLE, MAC1_DMA_BASE }, { 29, -1 }}, 100 { "auaudio", { AC97_BASE }, { 27, 31 }}, 101 { "ohci", { USBH_BASE }, { 26, -1 }}, 102 { "usbd", { USBD_BASE }, { 24, 25 }}, 103 { "irda", { IRDA_BASE }, { 22, 23 }}, 104 { "gpio", { SYS_BASE }, { -1, -1 }}, 105 { "i2s", { I2S_BASE }, { -1, -1 }}, 106 { "ssi", { SSI0_BASE }, { 4, -1 }}, 107 { "ssi", { SSI1_BASE }, { 5, -1 }}, 108 { NULL } 109 }; 110 111 /* 112 * The devices built in to the Au1500 cpu. 113 */ 114 const struct au1x00_dev au1500_devs [] = { 115 { "aucom", { UART0_BASE }, { 0, -1 }}, 116 { "aucom", { UART3_BASE }, { 3, -1 }}, 117 { "aurtc", { }, { -1, -1 }}, 118 { "aumac", { AU1500_MAC0_BASE, AU1500_MAC0_ENABLE, 119 MAC0_DMA_BASE }, { 28, -1 }}, 120 { "aumac", { AU1500_MAC1_BASE, AU1500_MAC1_ENABLE, 121 MAC1_DMA_BASE }, { 29, -1 }}, 122 { "auaudio", { AC97_BASE }, { 27, 31 }}, 123 { "ohci", { USBH_BASE }, { 26, -1 }}, 124 { "usbd", { USBD_BASE }, { 24, 25 }}, 125 { "gpio", { SYS_BASE }, { -1, -1 }}, 126 { "gpio2", { GPIO2_BASE }, { -1, -1 }}, 127 { "i2s", { I2S_BASE }, { -1, -1 }}, 128 { "aupci", { }, { -1, -1 }}, 129 { NULL } 130 }; 131 132 133 /* 134 * The devices built in to the Au1100 cpu. 135 */ 136 const struct au1x00_dev au1100_devs [] = { 137 { "aucom", { UART0_BASE }, { 0, -1 }}, 138 { "aucom", { UART1_BASE }, { 1, -1 }}, 139 { "aucom", { UART3_BASE }, { 3, -1 }}, 140 { "aurtc", { }, { -1, -1 }}, 141 { "aumac", { MAC0_BASE, MAC0_ENABLE, MAC0_DMA_BASE }, { 28, -1 }}, 142 { "auaudio", { AC97_BASE }, { 27, 31 }}, 143 { "ohci", { USBH_BASE }, { 26, -1 }}, 144 { "usbd", { USBD_BASE }, { 24, 25 }}, 145 { "irda", { IRDA_BASE }, { 22, 23 }}, 146 { "gpio", { SYS_BASE }, { -1, -1 }}, 147 { "gpio2", { GPIO2_BASE }, { 29, -1 }}, 148 { "i2s", { I2S_BASE }, { 30, -1 }}, 149 { "ssi", { SSI0_BASE }, { 4, -1 }}, 150 { "ssi", { SSI1_BASE }, { 5, -1 }}, 151 { "sd0", { SD0_BASE }, { 5, -1 }}, 152 { "sd1", { SD1_BASE }, { 5, -1 }}, 153 { NULL } 154 }; 155 156 157 static int aubus_match(struct device *, struct cfdata *, void *); 158 static void aubus_attach(struct device *, struct device *, void *); 159 static int aubus_submatch(struct device *, struct cfdata *, void *); 160 static int aubus_print(void *, const char *); 161 static void aubus_alloc_dma_tag(struct device *, bus_dma_tag_t); 162 163 CFATTACH_DECL(aubus, sizeof(struct device), 164 aubus_match, aubus_attach, NULL, NULL); 165 166 bus_space_tag_t aubus_st; /* XXX */ 167 struct mips_bus_dma_tag aubus_mdt; 168 169 /* 170 * Probe for the aubus; always succeeds. 171 */ 172 static int 173 aubus_match(struct device *parent, struct cfdata *match, void *aux) 174 { 175 176 return 1; 177 } 178 179 static int 180 aubus_submatch(struct device *parent, struct cfdata *cf, void *aux) 181 { 182 struct aubus_attach_args *aa = aux; 183 184 if (cf->cf_loc[AUBUSCF_ADDR] != AUBUSCF_ADDR_DEFAULT && 185 cf->cf_loc[AUBUSCF_ADDR] != aa->aa_addr) 186 return (0); 187 188 return (config_match(parent, cf, aux)); 189 } 190 191 /* 192 * Attach the aubus. 193 */ 194 static void 195 aubus_attach(struct device *parent, struct device *self, void *aux) 196 { 197 struct aubus_attach_args aa; 198 struct device *sc = (struct device *)self; 199 const struct au1x00_dev *ad; 200 201 printf("\n"); 202 203 switch (MIPS_PRID_COPTS(cpu_id)) { 204 case MIPS_AU1000: 205 ad = au1000_devs; 206 break; 207 case MIPS_AU1500: 208 ad = au1500_devs; 209 break; 210 case MIPS_AU1100: 211 ad = au1100_devs; 212 break; 213 default: 214 panic("Unknown Alchemy SOC identification %d", 215 MIPS_PRID_COPTS(cpu_id)); 216 } 217 218 for (; ad->name != NULL; ad++) { 219 aa.aa_name = ad->name; 220 aa.aa_st = aubus_st; 221 aa.aa_dt = &aubus_mdt; 222 aubus_alloc_dma_tag(sc, aa.aa_dt); 223 aa.aa_addrs[0] = ad->addr[0]; 224 aa.aa_addrs[1] = ad->addr[1]; 225 aa.aa_addrs[2] = ad->addr[2]; 226 aa.aa_irq[0] = ad->irq[0]; 227 aa.aa_irq[1] = ad->irq[1]; 228 229 (void) config_found_sm(self, &aa, aubus_print, aubus_submatch); 230 } 231 } 232 233 static int 234 aubus_print(void *aux, const char *pnp) 235 { 236 struct aubus_attach_args *aa = aux; 237 238 if (pnp) 239 aprint_normal("%s at %s", aa->aa_name, pnp); 240 241 if (aa->aa_addr != AUBUSCF_ADDR_DEFAULT) 242 aprint_normal(" %s 0x%lx", aubuscf_locnames[AUBUSCF_ADDR], 243 aa->aa_addr); 244 if (aa->aa_irq[0] >= 0) 245 aprint_normal(" irq %d", aa->aa_irq[0]); 246 if (aa->aa_irq[1] >= 0) 247 aprint_normal(",%d", aa->aa_irq[1]); 248 return (UNCONF); 249 } 250 251 void 252 aubus_alloc_dma_tag(sc, pdt) 253 struct device *sc; 254 bus_dma_tag_t pdt; 255 { 256 bus_dma_tag_t t; 257 258 t = pdt; 259 t->_cookie = sc; 260 t->_wbase = 0; /* XXX */ 261 t->_physbase = 0; /* XXX */ 262 t->_wsize = MIPS_KSEG1_START - MIPS_KSEG0_START; 263 t->_dmamap_create = _bus_dmamap_create; 264 t->_dmamap_destroy = _bus_dmamap_destroy; 265 t->_dmamap_load = _bus_dmamap_load; 266 t->_dmamap_load_mbuf = _bus_dmamap_load_mbuf; 267 t->_dmamap_load_uio = _bus_dmamap_load_uio; 268 t->_dmamap_load_raw = _bus_dmamap_load_raw; 269 t->_dmamap_unload = _bus_dmamap_unload; 270 t->_dmamap_sync = _bus_dmamap_sync; 271 t->_dmamem_alloc = _bus_dmamem_alloc; 272 t->_dmamem_free = _bus_dmamem_free; 273 t->_dmamem_map = _bus_dmamem_map; 274 t->_dmamem_unmap = _bus_dmamem_unmap; 275 t->_dmamem_mmap = _bus_dmamem_mmap; 276 } 277