xref: /netbsd-src/sys/arch/mips/adm5120/dev/ahci.c (revision f3cfa6f6ce31685c6c4a758bc430e69eb99f50a4)
1 /*	$NetBSD: ahci.c,v 1.17 2019/02/17 04:17:52 rin Exp $	*/
2 
3 /*-
4  * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or
8  * without modification, are permitted provided that the following
9  * conditions are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above
13  *    copyright notice, this list of conditions and the following
14  *    disclaimer in the documentation and/or other materials provided
15  *    with the distribution.
16  * 3. The names of the authors may not be used to endorse or promote
17  *    products derived from this software without specific prior
18  *    written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY
21  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
23  * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
25  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
27  * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
29  * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
31  * OF SUCH DAMAGE.
32  */
33 /*
34  * Copyright (c) 2001 The NetBSD Foundation, Inc.
35  * All rights reserved.
36  *
37  * This code is derived from software contributed to The NetBSD Foundation
38  * by Tetsuya Isaki.
39  *
40  * Redistribution and use in source and binary forms, with or without
41  * modification, are permitted provided that the following conditions
42  * are met:
43  * 1. Redistributions of source code must retain the above copyright
44  *    notice, this list of conditions and the following disclaimer.
45  * 2. Redistributions in binary form must reproduce the above copyright
46  *    notice, this list of conditions and the following disclaimer in the
47  *    documentation and/or other materials provided with the distribution.
48  *
49  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
50  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
51  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
52  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
53  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
54  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
55  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
56  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
57  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
58  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
59  * POSSIBILITY OF SUCH DAMAGE.
60  */
61 
62 /*
63  * !! HIGHLY EXPERIMENTAL CODE !!
64  */
65 
66 #include <sys/cdefs.h>
67 __KERNEL_RCSID(0, "$NetBSD: ahci.c,v 1.17 2019/02/17 04:17:52 rin Exp $");
68 
69 #include <sys/param.h>
70 #include <sys/systm.h>
71 #include <sys/kernel.h>
72 #include <sys/proc.h>
73 #include <sys/device.h>
74 #include <sys/kmem.h>
75 
76 #include <sys/bus.h>
77 #include <machine/cpu.h>
78 
79 #include <dev/usb/usb.h>
80 #include <dev/usb/usbdi.h>
81 #include <dev/usb/usbdivar.h>
82 #include <dev/usb/usb_mem.h>
83 #include <dev/usb/usbdevs.h>
84 #include <dev/usb/usbroothub.h>
85 
86 #include <mips/adm5120/include/adm5120reg.h>
87 #include <mips/adm5120/include/adm5120var.h>
88 #include <mips/adm5120/include/adm5120_obiovar.h>
89 
90 #include <mips/adm5120/dev/ahcireg.h>
91 #include <mips/adm5120/dev/ahcivar.h>
92 
93 static usbd_status	ahci_open(struct usbd_pipe *);
94 static void		ahci_softintr(void *);
95 static void		ahci_poll(struct usbd_bus *);
96 static void		ahci_poll_hub(void *);
97 static void		ahci_poll_device(void *arg);
98 static struct usbd_xfer *
99 			ahci_allocx(struct usbd_bus *, unsigned int);
100 static void		ahci_freex(struct usbd_bus *, struct usbd_xfer *);
101 
102 static void		ahci_get_lock(struct usbd_bus *, kmutex_t **);
103 static int		ahci_roothub_ctrl(struct usbd_bus *, usb_device_request_t *,
104     void *, int);
105 
106 static usbd_status	ahci_root_intr_transfer(struct usbd_xfer *);
107 static usbd_status	ahci_root_intr_start(struct usbd_xfer *);
108 static void		ahci_root_intr_abort(struct usbd_xfer *);
109 static void		ahci_root_intr_close(struct usbd_pipe *);
110 static void		ahci_root_intr_done(struct usbd_xfer *);
111 
112 static usbd_status	ahci_device_ctrl_transfer(struct usbd_xfer *);
113 static usbd_status	ahci_device_ctrl_start(struct usbd_xfer *);
114 static void		ahci_device_ctrl_abort(struct usbd_xfer *);
115 static void		ahci_device_ctrl_close(struct usbd_pipe *);
116 static void		ahci_device_ctrl_done(struct usbd_xfer *);
117 
118 static usbd_status	ahci_device_intr_transfer(struct usbd_xfer *);
119 static usbd_status	ahci_device_intr_start(struct usbd_xfer *);
120 static void		ahci_device_intr_abort(struct usbd_xfer *);
121 static void		ahci_device_intr_close(struct usbd_pipe *);
122 static void		ahci_device_intr_done(struct usbd_xfer *);
123 
124 static usbd_status	ahci_device_isoc_transfer(struct usbd_xfer *);
125 static usbd_status	ahci_device_isoc_start(struct usbd_xfer *);
126 static void		ahci_device_isoc_abort(struct usbd_xfer *);
127 static void		ahci_device_isoc_close(struct usbd_pipe *);
128 static void		ahci_device_isoc_done(struct usbd_xfer *);
129 
130 static usbd_status	ahci_device_bulk_transfer(struct usbd_xfer *);
131 static usbd_status	ahci_device_bulk_start(struct usbd_xfer *);
132 static void		ahci_device_bulk_abort(struct usbd_xfer *);
133 static void		ahci_device_bulk_close(struct usbd_pipe *);
134 static void		ahci_device_bulk_done(struct usbd_xfer *);
135 
136 static int		ahci_transaction(struct ahci_softc *,
137 	struct usbd_pipe *, uint8_t, int, u_char *, uint8_t);
138 static void		ahci_noop(struct usbd_pipe *);
139 static void		ahci_abort_xfer(struct usbd_xfer *, usbd_status);
140 static void		ahci_device_clear_toggle(struct usbd_pipe *);
141 
142 extern int usbdebug;
143 extern int uhubdebug;
144 extern int umassdebug;
145 int ahci_dummy;
146 
147 #define AHCI_DEBUG
148 
149 #ifdef AHCI_DEBUG
150 #define D_TRACE	(0x0001)	/* function trace */
151 #define D_MSG	(0x0002)	/* debug messages */
152 #define D_XFER	(0x0004)	/* transfer messages (noisy!) */
153 #define D_MEM	(0x0008)	/* memory allocation */
154 
155 int ahci_debug = 0;
156 #define DPRINTF(z,x)	if((ahci_debug&(z))!=0)printf x
157 void		print_req(usb_device_request_t *);
158 void		print_req_hub(usb_device_request_t *);
159 void		print_dumpreg(struct ahci_softc *);
160 void		print_xfer(struct usbd_xfer *);
161 #else
162 #define DPRINTF(z,x)
163 #endif
164 
165 
166 struct usbd_bus_methods ahci_bus_methods = {
167 	.ubm_open = ahci_open,
168 	.ubm_softint = ahci_softintr,
169 	.ubm_dopoll = ahci_poll,
170 	.ubm_allocx = ahci_allocx,
171 	.ubm_freex = ahci_freex,
172 	.ubm_getlock = ahci_get_lock,
173 	.ubm_rhctrl = ahci_roothub_ctrl,
174 };
175 
176 struct usbd_pipe_methods ahci_root_intr_methods = {
177 	.upm_transfer = ahci_root_intr_transfer,
178 	.upm_start = ahci_root_intr_start,
179 	.upm_abort = ahci_root_intr_abort,
180 	.upm_close = ahci_root_intr_close,
181 	.upm_cleartoggle = ahci_noop,
182 	.upm_done = ahci_root_intr_done,
183 };
184 
185 struct usbd_pipe_methods ahci_device_ctrl_methods = {
186 	.upm_transfer = ahci_device_ctrl_transfer,
187 	.upm_start = ahci_device_ctrl_start,
188 	.upm_abort = ahci_device_ctrl_abort,
189 	.upm_close = ahci_device_ctrl_close,
190 	.upm_cleartoggle = ahci_noop,
191 	.upm_done = ahci_device_ctrl_done,
192 };
193 
194 struct usbd_pipe_methods ahci_device_intr_methods = {
195 	.upm_transfer = ahci_device_intr_transfer,
196 	.upm_start = ahci_device_intr_start,
197 	.upm_abort = ahci_device_intr_abort,
198 	.upm_close = ahci_device_intr_close,
199 	.upm_cleartoggle = ahci_device_clear_toggle,
200 	.upm_done = ahci_device_intr_done,
201 };
202 
203 struct usbd_pipe_methods ahci_device_isoc_methods = {
204 	.upm_transfer = ahci_device_isoc_transfer,
205 	.upm_start = ahci_device_isoc_start,
206 	.upm_abort = ahci_device_isoc_abort,
207 	.upm_close = ahci_device_isoc_close,
208 	.upm_cleartoggle = ahci_noop,
209 	.upm_done = ahci_device_isoc_done,
210 };
211 
212 struct usbd_pipe_methods ahci_device_bulk_methods = {
213 	.upm_transfer = ahci_device_bulk_transfer,
214 	.upm_start = ahci_device_bulk_start,
215 	.upm_abort = ahci_device_bulk_abort,
216 	.upm_close = ahci_device_bulk_close,
217 	.upm_cleartoggle = ahci_device_clear_toggle,
218 	.upm_done = ahci_device_bulk_done,
219 };
220 
221 struct ahci_pipe {
222 	struct usbd_pipe pipe;
223 	uint32_t toggle;
224 };
225 
226 static int	ahci_match(device_t, cfdata_t, void *);
227 static void	ahci_attach(device_t, device_t, void *);
228 
229 CFATTACH_DECL_NEW(ahci, sizeof(struct ahci_softc),
230     ahci_match, ahci_attach, NULL, NULL);
231 
232 static int
233 ahci_match(device_t parent, struct cfdata *cf, void *aux)
234 {
235 	struct obio_attach_args *aa = aux;
236 
237 	if (strcmp(aa->oba_name, cf->cf_name) == 0)
238 		return 1;
239 
240 	return 0;
241 }
242 
243 #define	REG_READ(o)	bus_space_read_4(sc->sc_st, sc->sc_ioh, (o))
244 #define	REG_WRITE(o,v)	bus_space_write_4(sc->sc_st, sc->sc_ioh, (o),(v))
245 
246 /*
247  * Attach SL11H/SL811HS. Return 0 if success.
248  */
249 void
250 ahci_attach(device_t parent, device_t self, void *aux)
251 {
252 	struct obio_attach_args *aa = aux;
253 	struct ahci_softc *sc = device_private(self);
254 
255 	printf("\n");
256 	sc->sc_dmat = aa->oba_dt;
257 	sc->sc_st = aa->oba_st;
258 
259 	/* Initialize sc */
260 	sc->sc_bus.ub_revision = USBREV_1_1;
261 	sc->sc_bus.ub_methods = &ahci_bus_methods;
262 	sc->sc_bus.ub_pipesize = sizeof(struct ahci_pipe);
263 	sc->sc_bus.ub_dmatag = sc->sc_dmat;
264 	sc->sc_bus.ub_usedma = true;
265 
266 	/* Map the device. */
267 	if (bus_space_map(sc->sc_st, aa->oba_addr,
268 	    512, 0, &sc->sc_ioh) != 0) {
269 		aprint_error_dev(self, "unable to map device\n");
270 		return;
271 	}
272 
273 	/* Hook up the interrupt handler. */
274 	sc->sc_ih = adm5120_intr_establish(aa->oba_irq, INTR_IRQ, ahci_intr, sc);
275 
276 	if (sc->sc_ih == NULL) {
277 		aprint_error_dev(self,
278 		    "unable to register interrupt handler\n");
279 		return;
280 	}
281 
282 	SIMPLEQ_INIT(&sc->sc_free_xfers);
283 
284 	callout_init(&sc->sc_poll_handle, 0);
285 
286 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
287 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED /* XXXNH */);
288 
289 	REG_WRITE(ADMHCD_REG_INTENABLE, 0); /* disable interrupts */
290 	REG_WRITE(ADMHCD_REG_CONTROL, ADMHCD_SW_RESET); /* reset */
291 	delay_ms(10);
292 	while (REG_READ(ADMHCD_REG_CONTROL) & ADMHCD_SW_RESET)
293 		delay_ms(1);
294 
295 	REG_WRITE(ADMHCD_REG_CONTROL, ADMHCD_HOST_EN);
296 	REG_WRITE(ADMHCD_REG_HOSTHEAD, 0x00000000);
297 	REG_WRITE(ADMHCD_REG_FMINTERVAL, 0x20002edf);
298 	REG_WRITE(ADMHCD_REG_LSTHRESH, 0x628);
299 	REG_WRITE(ADMHCD_REG_RHDESCR, ADMHCD_NPS | ADMHCD_LPSC);
300 	REG_WRITE(ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
301 
302 	REG_WRITE(ADMHCD_REG_INTENABLE, 0); /* XXX: enable interrupts */
303 
304 #ifdef USB_DEBUG
305 	/* usbdebug = 0x7f;
306 	uhubdebug = 0x7f;
307 	umassdebug = 0xffffffff; */
308 #endif
309 
310 	/* Attach USB devices */
311 	sc->sc_child = config_found(self, &sc->sc_bus, usbctlprint);
312 
313 }
314 
315 int
316 ahci_intr(void *arg)
317 {
318 #if 0
319 	struct ahci_softc *sc = arg;
320 	uint8_t r;
321 #ifdef AHCI_DEBUG
322 	char bitbuf[256];
323 #endif
324 
325 	r = sl11read(sc, SL11_ISR);
326 
327 	sl11write(sc, SL11_ISR, SL11_ISR_DATA | SL11_ISR_SOFTIMER);
328 
329 	if ((r & SL11_ISR_RESET)) {
330 		sc->sc_flags |= AHCDF_RESET;
331 		sl11write(sc, SL11_ISR, SL11_ISR_RESET);
332 	}
333 	if ((r & SL11_ISR_INSERT)) {
334 		sc->sc_flags |= AHCDF_INSERT;
335 		sl11write(sc, SL11_ISR, SL11_ISR_INSERT);
336 	}
337 
338 #ifdef AHCI_DEBUG
339 	snprintb(bitbuf, sizeof(bitbuf),
340 	    ((sl11read(sc, SL11_CTRL) & SL11_CTRL_SUSPEND)
341 	    ? "\20\x8""D+\7RESUME\6INSERT\5SOF\4res\3""BABBLE\2USBB\1USBA"
342 	    : "\20\x8""D+\7RESET\6INSERT\5SOF\4res\3""BABBLE\2USBB\1USBA"),
343 	    r);
344 
345 	DPRINTF(D_XFER, ("I=%s ", bitbuf));
346 #endif /* AHCI_DEBUG */
347 #endif
348 
349 	return 0;
350 }
351 
352 usbd_status
353 ahci_open(struct usbd_pipe *pipe)
354 {
355 	struct usbd_device *dev = pipe->up_dev;
356 	struct ahci_pipe *apipe = (struct ahci_pipe *)pipe;
357 	usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
358 	uint8_t rhaddr = dev->ud_bus->ub_rhaddr;
359 
360 	DPRINTF(D_TRACE, ("ahci_open(addr=%d,ep=%d,scaddr=%d)",
361 		dev->ud_addr, ed->bEndpointAddress, rhaddr));
362 
363 	apipe->toggle=0;
364 
365 	if (dev->ud_addr == rhaddr) {
366 		switch (ed->bEndpointAddress) {
367 		case USB_CONTROL_ENDPOINT:
368 			pipe->up_methods = &roothub_ctrl_methods;
369 			break;
370 		case UE_DIR_IN | USBROOTHUB_INTR_ENDPT:
371 			pipe->up_methods = &ahci_root_intr_methods;
372 			break;
373 		default:
374 			printf("open:endpointErr!\n");
375 			return USBD_INVAL;
376 		}
377 	} else {
378 		switch (ed->bmAttributes & UE_XFERTYPE) {
379 		case UE_CONTROL:
380 			DPRINTF(D_MSG, ("control "));
381 			pipe->up_methods = &ahci_device_ctrl_methods;
382 			break;
383 		case UE_INTERRUPT:
384 			DPRINTF(D_MSG, ("interrupt "));
385 			pipe->up_methods = &ahci_device_intr_methods;
386 			break;
387 		case UE_ISOCHRONOUS:
388 			DPRINTF(D_MSG, ("isochronous "));
389 			pipe->up_methods = &ahci_device_isoc_methods;
390 			break;
391 		case UE_BULK:
392 			DPRINTF(D_MSG, ("bluk "));
393 			pipe->up_methods = &ahci_device_bulk_methods;
394 			break;
395 		}
396 	}
397 	return USBD_NORMAL_COMPLETION;
398 }
399 
400 void
401 ahci_softintr(void *arg)
402 {
403 	DPRINTF(D_TRACE, ("%s()", __func__));
404 }
405 
406 void
407 ahci_poll(struct usbd_bus *bus)
408 {
409 	DPRINTF(D_TRACE, ("%s()", __func__));
410 }
411 
412 #define AHCI_BUS2SC(bus)	((bus)->ub_hcpriv)
413 #define AHCI_PIPE2SC(pipe)	AHCI_BUS2SC((pipe)->up_dev->ud_bus)
414 #define AHCI_XFER2SC(xfer)	AHCI_BUS2SC((xfer)->ux_bus)
415 #define AHCI_APIPE2SC(ap)	AHCI_BUS2SC((d)->pipe.up_dev->ud_bus)
416 
417 /*
418  * Emulation of interrupt transfer for status change endpoint
419  * of root hub.
420  */
421 void
422 ahci_poll_hub(void *arg)
423 {
424 	struct usbd_xfer *xfer = arg;
425 	struct ahci_softc *sc = AHCI_XFER2SC(xfer);
426 	u_char *p;
427 	static int p0_state=0;
428 	static int p1_state=0;
429 
430 	callout_reset(&sc->sc_poll_handle, sc->sc_interval, ahci_poll_hub, xfer);
431 
432 	/* USB spec 11.13.3 (p.260) */
433 	p = KERNADDR(&xfer->ux_dmabuf, 0);
434 	p[0] = 0;
435 	if ((REG_READ(ADMHCD_REG_PORTSTATUS0) & ADMHCD_CCS) != p0_state) {
436 		p[0] = 2;
437 		DPRINTF(D_TRACE, ("!"));
438 		p0_state=(REG_READ(ADMHCD_REG_PORTSTATUS0) & ADMHCD_CCS);
439 	};
440 	if ((REG_READ(ADMHCD_REG_PORTSTATUS1) & ADMHCD_CCS) != p1_state) {
441 		p[0] = 2;
442 		DPRINTF(D_TRACE, ("@"));
443 		p1_state=(REG_READ(ADMHCD_REG_PORTSTATUS1) & ADMHCD_CCS);
444 	};
445 
446 	/* no change, return NAK */
447 	if (p[0] == 0)
448 		return;
449 
450 	xfer->ux_actlen = 1;
451 	xfer->ux_status = USBD_NORMAL_COMPLETION;
452 	mutex_enter(&sc->sc_lock);
453 	usb_transfer_complete(xfer);
454 	mutex_exit(&sc->sc_lock);
455 }
456 
457 struct usbd_xfer *
458 ahci_allocx(struct usbd_bus *bus, unsigned int nframes)
459 {
460 	struct ahci_softc *sc = AHCI_BUS2SC(bus);
461 	struct usbd_xfer *xfer;
462 
463 	DPRINTF(D_MEM, ("SLallocx"));
464 
465 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
466 	if (xfer) {
467 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, ux_next);
468 #ifdef DIAGNOSTIC
469 		if (xfer->ux_state != XFER_FREE) {
470 			printf("ahci_allocx: xfer=%p not free, 0x%08x\n",
471 				xfer, xfer->ux_state);
472 		}
473 #endif
474 	} else {
475 		xfer = kmem_alloc(sizeof(*xfer), KM_SLEEP);
476 	}
477 
478 	memset(xfer, 0, sizeof(*xfer));
479 #ifdef DIAGNOSTIC
480 	xfer->ux_state = XFER_BUSY;
481 #endif
482 
483 	return xfer;
484 }
485 
486 void
487 ahci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer)
488 {
489 	struct ahci_softc *sc = AHCI_BUS2SC(bus);
490 
491 	DPRINTF(D_MEM, ("SLfreex"));
492 
493 #ifdef DIAGNOSTIC
494 	if (xfer->ux_state != XFER_BUSY &&
495 	    xfer->ux_status != USBD_NOT_STARTED) {
496 		printf("ahci_freex: xfer=%p not busy, 0x%08x\n",
497 			xfer, xfer->ux_state);
498 		return;
499 	}
500 	xfer->ux_state = XFER_FREE;
501 #endif
502 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, ux_next);
503 }
504 
505 static void
506 ahci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
507 {
508 	struct ahci_softc *sc = AHCI_BUS2SC(bus);
509 
510 	*lock = &sc->sc_lock;
511 }
512 
513 void
514 ahci_noop(struct usbd_pipe *pipe)
515 {
516 	DPRINTF(D_TRACE, ("%s()", __func__));
517 }
518 
519 /*
520  * Data structures and routines to emulate the root hub.
521  */
522 
523 static int
524 ahci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req,
525     void *buf, int buflen)
526 {
527 	struct ahci_softc *sc = AHCI_BUS2SC(bus);
528 	uint16_t len, value, index;
529 	usb_port_status_t ps;
530 	int totlen = 0;
531 	int status;
532 
533 	DPRINTF(D_TRACE, ("SLRCstart "));
534 
535 	len = UGETW(req->wLength);
536 	value = UGETW(req->wValue);
537 	index = UGETW(req->wIndex);
538 
539 #define C(x,y) ((x) | ((y) << 8))
540 	switch (C(req->bRequest, req->bmRequestType)) {
541 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
542 		switch (value) {
543 #define sd ((usb_string_descriptor_t *)buf)
544 		case C(2, UDESC_STRING):
545 			/* Product */
546 			totlen = usb_makestrdesc(sd, len, "ADM5120 root hub");
547 			break;
548 		default:
549 			printf("unknownGetDescriptor=%x", value);
550 			/* FALLTHROUGH */
551 		case C(0, UDESC_DEVICE):
552 		case C(1, UDESC_STRING):
553 			/* default from usbroothub */
554 			return buflen;
555 		}
556 		break;
557 	/*
558 	 * Hub specific requests
559 	 */
560 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
561 		/* Clear Hub Feature, 11.16.2.1, not supported */
562 		DPRINTF(D_MSG, ("ClearHubFeature not supported\n"));
563 		break;
564 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
565 
566 #define WPS(x) REG_WRITE(ADMHCD_REG_PORTSTATUS0+(index-1)*4, (x))
567 		/* Clear Port Feature, 11.16.2.2 */
568 		if (index != 1 && index != 2 ) {
569 			return -1;
570 		}
571 		switch (value) {
572 		case UHF_PORT_POWER:
573 			DPRINTF(D_MSG, ("POWER_OFF "));
574 			WPS(ADMHCD_LSDA);
575 			break;
576 		case UHF_PORT_SUSPEND:
577 			DPRINTF(D_MSG, ("SUSPEND "));
578 			WPS(ADMHCD_POCI);
579 			break;
580 		case UHF_PORT_ENABLE:
581 			DPRINTF(D_MSG, ("ENABLE "));
582 			WPS(ADMHCD_CCS);
583 			break;
584 		case UHF_C_PORT_CONNECTION:
585 			WPS(ADMHCD_CSC);
586 			break;
587 		case UHF_C_PORT_RESET:
588 			WPS(ADMHCD_PRSC);
589 			break;
590 		case UHF_C_PORT_SUSPEND:
591 			WPS(ADMHCD_PSSC);
592 			break;
593 		case UHF_C_PORT_ENABLE:
594 			WPS(ADMHCD_PESC);
595 			break;
596 		case UHF_C_PORT_OVER_CURRENT:
597 			WPS(ADMHCD_OCIC);
598 			break;
599 		default:
600 			printf("ClrPortFeatERR:value=0x%x ", value);
601 			return -1;
602 		}
603 		//DPRINTF(D_XFER, ("CH=%04x ", sc->sc_change));
604 #undef WPS
605 		break;
606 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
607 		/* Get Bus State, 11.16.2.3, not supported */
608 		/* shall return a STALL... */
609 		break;
610 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
611 		/* Get Hub Descriptor, 11.16.2.4 */
612 		DPRINTF(D_MSG, ("UR_GET_DESCRIPTOR RCD"));
613 		if ((value&0xff) != 0) {
614 			return -1;
615 		}
616 		usb_hub_descriptor_t hubd;
617 
618 		totlen = uimin(buflen, sizeof(hubd));
619 		memcpy(&hubd, buf, totlen);
620 		hubd.bNbrPorts = 2;
621 		USETW(hubd.wHubCharacteristics, 0);
622 		hubd.bPwrOn2PwrGood = 0;
623 		memcpy(buf, &hubd, totlen);
624 		break;
625 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
626 		/* Get Hub Status, 11.16.2.5 */
627 		DPRINTF(D_MSG, ("UR_GET_STATUS RCD"));
628 		if (len != 4) {
629 			return -1;
630 		}
631 		memset(buf, 0, len);
632 		totlen = len;
633 		break;
634 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
635 		/* Get Port Status, 11.16.2.6 */
636 		if ((index != 1 && index != 2)  || len != 4) {
637 			printf("index=%d,len=%d ", index, len);
638 			return -1;
639 		}
640 		status = REG_READ(ADMHCD_REG_PORTSTATUS0+(index-1)*4);
641 		DPRINTF(D_MSG, ("UR_GET_STATUS RCO=%x ", status));
642 
643 		//DPRINTF(D_XFER, ("ST=%04x,CH=%04x ", status, sc->sc_change));
644 		USETW(ps.wPortStatus, status  & (UPS_CURRENT_CONNECT_STATUS|UPS_PORT_ENABLED|UPS_SUSPEND|UPS_OVERCURRENT_INDICATOR|UPS_RESET|UPS_PORT_POWER|UPS_LOW_SPEED));
645 		USETW(ps.wPortChange, (status>>16) & (UPS_C_CONNECT_STATUS|UPS_C_PORT_ENABLED|UPS_C_SUSPEND|UPS_C_OVERCURRENT_INDICATOR|UPS_C_PORT_RESET));
646 		totlen = uimin(len, sizeof(ps));
647 		memcpy(buf, &ps, totlen);
648 		break;
649 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
650 		/* Set Hub Descriptor, 11.16.2.7, not supported */
651 		/* STALL ? */
652 		return -1;
653 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
654 		/* Set Hub Feature, 11.16.2.8, not supported */
655 		break;
656 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
657 #define WPS(x) REG_WRITE(ADMHCD_REG_PORTSTATUS0+(index-1)*4, (x))
658 		/* Set Port Feature, 11.16.2.9 */
659 		if ((index != 1) && (index !=2)) {
660 			printf("index=%d ", index);
661 			return -1;
662 		}
663 		switch (value) {
664 		case UHF_PORT_RESET:
665 			DPRINTF(D_MSG, ("PORT_RESET "));
666 			WPS(ADMHCD_PRS);
667 			break;
668 		case UHF_PORT_POWER:
669 			DPRINTF(D_MSG, ("PORT_POWER "));
670 			WPS(ADMHCD_PPS);
671 			break;
672 		case UHF_PORT_ENABLE:
673 			DPRINTF(D_MSG, ("PORT_ENABLE "));
674 			WPS(ADMHCD_PES);
675 			break;
676 		default:
677 			printf("SetPortFeatERR=0x%x ", value);
678 			return -1;
679 		}
680 #undef WPS
681 		break;
682 	default:
683 		DPRINTF(D_MSG, ("ioerr(UR=%02x,UT=%02x) ",
684 			req->bRequest, req->bmRequestType));
685 		/* default from usbroothub */
686 		return buflen;
687 	}
688 
689 	return totlen;
690 }
691 
692 static usbd_status
693 ahci_root_intr_transfer(struct usbd_xfer *xfer)
694 {
695 	struct ahci_softc *sc = AHCI_XFER2SC(xfer);
696 	usbd_status error;
697 
698 	DPRINTF(D_TRACE, ("SLRItransfer "));
699 
700 	/* Insert last in queue */
701 	mutex_enter(&sc->sc_lock);
702 	error = usb_insert_transfer(xfer);
703 	mutex_exit(&sc->sc_lock);
704 	if (error)
705 		return error;
706 
707 	/*
708 	 * Pipe isn't running (otherwise error would be USBD_INPROG),
709 	 * start first.
710 	 */
711 	return ahci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
712 }
713 
714 static usbd_status
715 ahci_root_intr_start(struct usbd_xfer *xfer)
716 {
717 	struct ahci_softc *sc = AHCI_XFER2SC(xfer);
718 
719 	DPRINTF(D_TRACE, ("SLRIstart "));
720 
721 	sc->sc_interval = MS_TO_TICKS(xfer->ux_pipe->up_endpoint->ue_edesc->bInterval);
722 	callout_reset(&sc->sc_poll_handle, sc->sc_interval, ahci_poll_hub, xfer);
723 	sc->sc_intr_xfer = xfer;
724 	return USBD_IN_PROGRESS;
725 }
726 
727 static void
728 ahci_root_intr_abort(struct usbd_xfer *xfer)
729 {
730 	DPRINTF(D_TRACE, ("SLRIabort "));
731 }
732 
733 static void
734 ahci_root_intr_close(struct usbd_pipe *pipe)
735 {
736 	struct ahci_softc *sc = AHCI_PIPE2SC(pipe);
737 
738 	DPRINTF(D_TRACE, ("SLRIclose "));
739 
740 	callout_stop(&sc->sc_poll_handle);
741 	sc->sc_intr_xfer = NULL;
742 }
743 
744 static void
745 ahci_root_intr_done(struct usbd_xfer *xfer)
746 {
747 	//DPRINTF(D_XFER, ("RIdn "));
748 }
749 
750 static usbd_status
751 ahci_device_ctrl_transfer(struct usbd_xfer *xfer)
752 {
753 	struct ahci_softc *sc = AHCI_XFER2SC(xfer);
754 	usbd_status error;
755 
756 	DPRINTF(D_TRACE, ("C"));
757 
758 	mutex_enter(&sc->sc_lock);
759 	error = usb_insert_transfer(xfer);
760 	mutex_exit(&sc->sc_lock);
761 	if (error)
762 		return error;
763 
764 	return ahci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
765 }
766 
767 static usbd_status
768 ahci_device_ctrl_start(struct usbd_xfer *xfer)
769 {
770 	usbd_status status =  USBD_NORMAL_COMPLETION;
771 	int s, err;
772 	static struct admhcd_ed ep_v __attribute__((aligned(16))), *ep;
773 	static struct admhcd_td td_v[4] __attribute__((aligned(16))), *td, *td1, *td2, *td3;
774 	static usb_dma_t reqdma;
775 	struct usbd_pipe *pipe = xfer->ux_pipe;
776 	usb_device_request_t *req = &xfer->ux_request;
777 	struct ahci_softc *sc = AHCI_XFER2SC(xfer);
778 	int len, isread;
779 
780 
781 #if 0
782 	struct ahci_pipe *apipe = (struct ahci_pipe *)xfer->ux_pipe;
783 #endif
784 	mutex_enter(&sc->sc_lock);
785 /*	printf("ctrl_start>>>\n"); */
786 
787 #ifdef DIAGNOSTIC
788 	if (!(xfer->ux_rqflags & URQ_REQUEST)) {
789 		/* XXX panic */
790 		printf("ahci_device_ctrl_transfer: not a request\n");
791 		return USBD_INVAL;
792 	}
793 #endif
794 
795 #define KSEG1ADDR(x) (0xa0000000 | (((uint32_t)x) & 0x1fffffff))
796 	DPRINTF(D_TRACE, ("st "));
797 	if (!ep) {
798 		ep = (struct admhcd_ed *)KSEG1ADDR(&ep_v);
799 		td = (struct admhcd_td *)KSEG1ADDR(&td_v[0]);
800 		td1 = (struct admhcd_td *)KSEG1ADDR(&td_v[1]);
801 		td2 = (struct admhcd_td *)KSEG1ADDR(&td_v[2]);
802 		td3 = (struct admhcd_td *)KSEG1ADDR(&td_v[3]);
803 		err = usb_allocmem(&sc->sc_bus,
804 			sizeof(usb_device_request_t),
805 			0, &reqdma);
806 		if (err)
807 			return USBD_NOMEM;
808 
809 		/* printf("ep: %p\n",ep); */
810 	};
811 
812 	ep->control =  pipe->up_dev->ud_addr | \
813 		((pipe->up_dev->ud_speed==USB_SPEED_FULL)?ADMHCD_ED_SPEED:0) | \
814 		((UGETW(pipe->up_endpoint->ue_edesc->wMaxPacketSize))<<ADMHCD_ED_MAXSHIFT);
815 	memcpy(KERNADDR(&reqdma, 0), req, sizeof *req);
816 /* 	printf("status: %x\n",REG_READ(ADMHCD_REG_PORTSTATUS0));
817 	printf("ep_control: %x\n",ep->control);
818 	printf("speed: %x\n",pipe->up_dev->ud_speed);
819 	printf("req: %p\n",req);
820 	printf("dmabuf: %p\n",xfer->ux_dmabuf.block); */
821 
822 	isread = req->bmRequestType & UT_READ;
823 	len = UGETW(req->wLength);
824 
825 	ep->next = ep;
826 
827 	td->buffer = DMAADDR(&reqdma,0) | 0xa0000000;
828 	td->buflen=sizeof(*req);
829 	td->control=ADMHCD_TD_SETUP | ADMHCD_TD_DATA0 | ADMHCD_TD_OWN;
830 
831 	if (len) {
832 		td->next = td1;
833 
834 		td1->buffer = DMAADDR(&xfer->ux_dmabuf,0) | 0xa0000000;
835 		td1->buflen = len;
836 		td1->next = td2;
837 		td1->control= (isread?ADMHCD_TD_IN:ADMHCD_TD_OUT) | ADMHCD_TD_DATA1 | ADMHCD_TD_R | ADMHCD_TD_OWN;
838 	} else {
839 		td1->control = 0;
840 		td->next = td2;
841 	};
842 
843 	td2->buffer = 0;
844 	td2->buflen= 0;
845 	td2->next = td3;
846 	td2->control = (isread?ADMHCD_TD_OUT:ADMHCD_TD_IN) | ADMHCD_TD_DATA1 | ADMHCD_TD_OWN;
847 
848 	td3->buffer = 0;
849 	td3->buflen= 0;
850 	td3->next = 0;
851 	td3->control = 0;
852 
853 	ep->head = td;
854 	ep->tail = td3;
855 /*
856 	printf("ep: %p\n",ep);
857 	printf("ep->next: %p\n",ep->next);
858 	printf("ep->head: %p\n",ep->head);
859 	printf("ep->tail: %p\n",ep->tail);
860 	printf("td: %p\n",td);
861 	printf("td->next: %p\n",td->next);
862 	printf("td->buffer: %x\n",td->buffer);
863 	printf("td->buflen: %x\n",td->buflen);
864 	printf("td1: %p\n",td1);
865 	printf("td1->next: %p\n",td1->next);
866 	printf("td2: %p\n",td2);
867 	printf("td2->next: %p\n",td2->next);
868 	printf("td3: %p\n",td3);
869 	printf("td3->next: %p\n",td3->next);
870 */
871 
872 	REG_WRITE(ADMHCD_REG_HOSTHEAD, (uint32_t)ep);
873 	REG_WRITE(ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP | ADMHCD_DMA_EN);
874 /*	printf("1: %x %x %x %x\n", ep->control, td->control, td1->control, td2->control); */
875 	s=100;
876 	while (s--) {
877 		delay_ms(10);
878 /*                printf("%x %x %x %x\n", ep->control, td->control, td1->control, td2->control);*/
879 		status = USBD_TIMEOUT;
880 		if (td->control & ADMHCD_TD_OWN) continue;
881 
882 		err = (td->control & ADMHCD_TD_ERRMASK)>>ADMHCD_TD_ERRSHIFT;
883 		if (err) {
884 			status = USBD_IOERROR;
885 			break;
886 		};
887 
888 		status = USBD_TIMEOUT;
889 		if (td1->control & ADMHCD_TD_OWN) continue;
890 		err = (td1->control & ADMHCD_TD_ERRMASK)>>ADMHCD_TD_ERRSHIFT;
891 		if (err) {
892 			status = USBD_IOERROR;
893 			break;
894 		};
895 
896 		status = USBD_TIMEOUT;
897 		if (td2->control & ADMHCD_TD_OWN) continue;
898 		err = (td2->control & ADMHCD_TD_ERRMASK)>>ADMHCD_TD_ERRSHIFT;
899 		if (err) {
900 			status = USBD_IOERROR;
901 		};
902 		status = USBD_NORMAL_COMPLETION;
903 		break;
904 
905 	};
906 	REG_WRITE(ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
907 
908 	xfer->ux_actlen = len;
909 	xfer->ux_status = status;
910 
911 /* 	printf("ctrl_start<<<\n"); */
912 
913 	usb_transfer_complete(xfer);
914 	mutex_exit(&sc->sc_lock);
915 	return USBD_NORMAL_COMPLETION;
916 }
917 
918 static void
919 ahci_device_ctrl_abort(struct usbd_xfer *xfer)
920 {
921 	DPRINTF(D_TRACE, ("Cab "));
922 	ahci_abort_xfer(xfer, USBD_CANCELLED);
923 }
924 
925 static void
926 ahci_device_ctrl_close(struct usbd_pipe *pipe)
927 {
928 	DPRINTF(D_TRACE, ("Ccl "));
929 }
930 
931 static void
932 ahci_device_ctrl_done(struct usbd_xfer *xfer)
933 {
934 	DPRINTF(D_TRACE, ("Cdn "));
935 }
936 
937 static usbd_status
938 ahci_device_intr_transfer(struct usbd_xfer *xfer)
939 {
940 	struct ahci_softc *sc = AHCI_XFER2SC(xfer);
941 	usbd_status error;
942 
943 	DPRINTF(D_TRACE, ("INTRtrans "));
944 
945 	mutex_enter(&sc->sc_lock);
946 	error = usb_insert_transfer(xfer);
947 	mutex_exit(&sc->sc_lock);
948 	if (error)
949 		return error;
950 
951 	return ahci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
952 }
953 
954 static usbd_status
955 ahci_device_intr_start(struct usbd_xfer *xfer)
956 {
957 	struct usbd_pipe *pipe = xfer->ux_pipe;
958 	struct ahci_xfer *sx;
959 
960 	DPRINTF(D_TRACE, ("INTRstart "));
961 
962 	sx = kmem_intr_alloc(sizeof(*sx), KM_NOSLEEP);
963 	if (sx == NULL)
964 		goto reterr;
965 	memset(sx, 0, sizeof(*sx));
966 	sx->sx_xfer = xfer;
967 	xfer->ux_hcpriv = sx;
968 
969 	/* initialize callout */
970 	callout_init(&sx->sx_callout_t, 0);
971 	callout_reset(&sx->sx_callout_t,
972 		MS_TO_TICKS(pipe->up_endpoint->ue_edesc->bInterval),
973 		ahci_poll_device, sx);
974 
975 	/* ACK */
976 	return USBD_IN_PROGRESS;
977 
978  reterr:
979 	return USBD_IOERROR;
980 }
981 
982 static void
983 ahci_poll_device(void *arg)
984 {
985 	struct ahci_xfer *sx = (struct ahci_xfer *)arg;
986 	struct usbd_xfer *xfer = sx->sx_xfer;
987 	struct usbd_pipe *pipe = xfer->ux_pipe;
988 	struct ahci_softc *sc = AHCI_XFER2SC(xfer);
989 	void *buf;
990 	int pid;
991 	int r;
992 
993 	DPRINTF(D_TRACE, ("pldev"));
994 
995 	callout_reset(&sx->sx_callout_t,
996 		MS_TO_TICKS(pipe->up_endpoint->ue_edesc->bInterval),
997 		ahci_poll_device, sx);
998 
999 	/* interrupt transfer */
1000 	pid = (UE_GET_DIR(pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN)
1001 	    ? ADMHCD_TD_IN : ADMHCD_TD_OUT;
1002 	buf = KERNADDR(&xfer->ux_dmabuf, 0);
1003 
1004 	r = ahci_transaction(sc, pipe, pid, xfer->ux_length, buf, 0/*toggle*/);
1005 	if (r < 0) {
1006 		DPRINTF(D_MSG, ("%s error", __func__));
1007 		return;
1008 	}
1009 	/* no change, return NAK */
1010 	if (r == 0)
1011 		return;
1012 
1013 	xfer->ux_status = USBD_NORMAL_COMPLETION;
1014 	mutex_enter(&sc->sc_lock);
1015 	usb_transfer_complete(xfer);
1016 	mutex_exit(&sc->sc_lock);
1017 }
1018 
1019 static void
1020 ahci_device_intr_abort(struct usbd_xfer *xfer)
1021 {
1022 	struct ahci_xfer *sx;
1023 
1024 	DPRINTF(D_TRACE, ("INTRabort "));
1025 
1026 	sx = xfer->ux_hcpriv;
1027 	if (sx) {
1028 		callout_stop(&sx->sx_callout_t);
1029 		kmem_intr_free(sx, sizeof(*sx));
1030 		xfer->ux_hcpriv = NULL;
1031 	} else {
1032 		printf("%s: sx == NULL!\n", __func__);
1033 	}
1034 	ahci_abort_xfer(xfer, USBD_CANCELLED);
1035 }
1036 
1037 static void
1038 ahci_device_intr_close(struct usbd_pipe *pipe)
1039 {
1040 	DPRINTF(D_TRACE, ("INTRclose "));
1041 }
1042 
1043 static void
1044 ahci_device_intr_done(struct usbd_xfer *xfer)
1045 {
1046 	DPRINTF(D_TRACE, ("INTRdone "));
1047 }
1048 
1049 static usbd_status
1050 ahci_device_isoc_transfer(struct usbd_xfer *xfer)
1051 {
1052 	DPRINTF(D_TRACE, ("S"));
1053 	return USBD_NORMAL_COMPLETION;
1054 }
1055 
1056 static usbd_status
1057 ahci_device_isoc_start(struct usbd_xfer *xfer)
1058 {
1059 	DPRINTF(D_TRACE, ("st "));
1060 	return USBD_NORMAL_COMPLETION;
1061 }
1062 
1063 static void
1064 ahci_device_isoc_abort(struct usbd_xfer *xfer)
1065 {
1066 	DPRINTF(D_TRACE, ("Sab "));
1067 }
1068 
1069 static void
1070 ahci_device_isoc_close(struct usbd_pipe *pipe)
1071 {
1072 	DPRINTF(D_TRACE, ("Scl "));
1073 }
1074 
1075 static void
1076 ahci_device_isoc_done(struct usbd_xfer *xfer)
1077 {
1078 	DPRINTF(D_TRACE, ("Sdn "));
1079 }
1080 
1081 static usbd_status
1082 ahci_device_bulk_transfer(struct usbd_xfer *xfer)
1083 {
1084 	struct ahci_softc *sc = AHCI_XFER2SC(xfer);
1085 	usbd_status error;
1086 
1087 	DPRINTF(D_TRACE, ("B"));
1088 
1089 	mutex_enter(&sc->sc_lock);
1090 	error = usb_insert_transfer(xfer);
1091 	mutex_exit(&sc->sc_lock);
1092 	if (error)
1093 		return error;
1094 
1095 	return ahci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
1096 }
1097 
1098 static usbd_status
1099 ahci_device_bulk_start(struct usbd_xfer *xfer)
1100 {
1101 #define NBULK_TDS 32
1102 	static volatile int level = 0;
1103 	usbd_status status =  USBD_NORMAL_COMPLETION;
1104 	int s, err;
1105 	static struct admhcd_ed ep_v __attribute__((aligned(16))), *ep;
1106 	static struct admhcd_td td_v[NBULK_TDS] __attribute__((aligned(16))), *td[NBULK_TDS];
1107 	struct usbd_pipe *pipe = xfer->ux_pipe;
1108 	struct ahci_softc *sc = AHCI_XFER2SC(xfer);
1109 	int endpt, i, len, tlen, segs, offset, isread, toggle, short_ok;
1110 	struct ahci_pipe *apipe = (struct ahci_pipe *)xfer->ux_pipe;
1111 
1112 #define KSEG1ADDR(x) (0xa0000000 | (((uint32_t)x) & 0x1fffffff))
1113 	DPRINTF(D_TRACE, ("st "));
1114 
1115 #ifdef DIAGNOSTIC
1116 	if (xfer->ux_rqflags & URQ_REQUEST) {
1117 		/* XXX panic */
1118 		printf("ohci_device_bulk_start: a request\n");
1119 		return USBD_INVAL;
1120 	}
1121 #endif
1122 
1123 	mutex_enter(&sc->sc_lock);
1124 	level++;
1125 /* 	printf("bulk_start>>>\n"); */
1126 
1127 	if (!ep) {
1128 		ep = (struct admhcd_ed *)KSEG1ADDR(&ep_v);
1129 		for (i=0; i<NBULK_TDS; i++) {
1130 			td[i] = (struct admhcd_td *)KSEG1ADDR(&td_v[i]);
1131 		};
1132 /*		printf("ep: %p\n",ep);*/
1133 	};
1134 	if (apipe->toggle == 0) {
1135 		toggle = ADMHCD_TD_DATA0;
1136 	} else {
1137 		toggle = apipe->toggle;
1138 	};
1139 
1140 	endpt = pipe->up_endpoint->ue_edesc->bEndpointAddress;
1141 	ep->control = pipe->up_dev->ud_addr | ((endpt & 0xf) << ADMHCD_ED_EPSHIFT)|\
1142 		((pipe->up_dev->ud_speed==USB_SPEED_FULL)?ADMHCD_ED_SPEED:0) | \
1143 		((UGETW(pipe->up_endpoint->ue_edesc->wMaxPacketSize))<<ADMHCD_ED_MAXSHIFT);
1144 
1145 	short_ok = xfer->ux_flags & USBD_SHORT_XFER_OK?ADMHCD_TD_R:0;
1146 /*	printf("level: %d\n",level);
1147 	printf("short_xfer: %x\n",short_ok);
1148 	printf("ep_control: %x\n",ep->control);
1149 	printf("speed: %x\n",pipe->up_dev->ud_speed);
1150 	printf("dmabuf: %p\n",xfer->ux_dmabuf.block); */
1151 
1152 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
1153 	len = xfer->ux_length;
1154 
1155 	ep->next = ep;
1156 
1157 	i = 0;
1158 	offset = 0;
1159 	while ((len>0) || (i==0)) {
1160 		tlen = uimin(len,4096);
1161 		td[i]->buffer = DMAADDR(&xfer->ux_dmabuf,offset) | 0xa0000000;
1162 		td[i]->buflen=tlen;
1163 		td[i]->control=(isread?ADMHCD_TD_IN:ADMHCD_TD_OUT) | toggle | ADMHCD_TD_OWN | short_ok;
1164 		td[i]->len=tlen;
1165 		toggle = ADMHCD_TD_TOGGLE;
1166 		len -= tlen;
1167 		offset += tlen;
1168 		td[i]->next = td[i+1];
1169 		i++;
1170 	};
1171 
1172 	td[i]->buffer = 0;
1173 	td[i]->buflen = 0;
1174 	td[i]->control = 0;
1175 	td[i]->next = 0;
1176 
1177 	ep->head = td[0];
1178 	ep->tail = td[i];
1179 	segs = i;
1180 	len = 0;
1181 
1182 /*	printf("segs: %d\n",segs);
1183 	printf("ep: %p\n",ep);
1184 	printf("ep->control: %x\n",ep->control);
1185 	printf("ep->next: %p\n",ep->next);
1186 	printf("ep->head: %p\n",ep->head);
1187 	printf("ep->tail: %p\n",ep->tail);
1188 	for (i=0; i<segs; i++) {
1189 		printf("td[%d]: %p\n",i,td[i]);
1190 		printf("td[%d]->control: %x\n",i,td[i]->control);
1191 		printf("td[%d]->next: %p\n",i,td[i]->next);
1192 		printf("td[%d]->buffer: %x\n",i,td[i]->buffer);
1193 		printf("td[%d]->buflen: %x\n",i,td[i]->buflen);
1194 	}; */
1195 
1196 	REG_WRITE(ADMHCD_REG_HOSTHEAD, (uint32_t)ep);
1197 	REG_WRITE(ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP | ADMHCD_DMA_EN);
1198 	i = 0;
1199 /*	printf("1: %x %d %x %x\n", ep->control, i, td[i]->control, td[i]->buflen); */
1200 	s=100;
1201 	err = 0;
1202 	while (s--) {
1203 /*                printf("%x %d %x %x\n", ep->control, i, td[i]->control, td[i]->buflen); */
1204 		status = USBD_TIMEOUT;
1205 		if (td[i]->control & ADMHCD_TD_OWN) {
1206 			delay_ms(3);
1207 			continue;
1208 		};
1209 
1210 		len += td[i]->len - td[i]->buflen;
1211 
1212 		err = (td[i]->control & ADMHCD_TD_ERRMASK)>>ADMHCD_TD_ERRSHIFT;
1213 		if (err) {
1214 			status = USBD_IOERROR;
1215 			break;
1216 		};
1217 
1218 		i++;
1219 		if (i==segs) {
1220 			status = USBD_NORMAL_COMPLETION;
1221 			break;
1222 		};
1223 
1224 	};
1225 	REG_WRITE(ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
1226 
1227 	apipe->toggle = ((uint32_t)ep->head & 2)?ADMHCD_TD_DATA1:ADMHCD_TD_DATA0;
1228 /*	printf("bulk_transfer_done: status: %x, err: %x, len: %x, toggle: %x\n", status,err,len,apipe->toggle); */
1229 
1230 	if (short_ok && (err == 0x9 || err == 0xd)) {
1231 /*		printf("bulk_transfer_done: short_transfer fix\n"); */
1232 		status = USBD_NORMAL_COMPLETION;
1233 	};
1234 	xfer->ux_actlen = len;
1235 	xfer->ux_status = status;
1236 
1237 	level--;
1238 /*	printf("bulk_start<<<\n"); */
1239 
1240 	usb_transfer_complete(xfer);
1241 	mutex_exit(&sc->sc_lock);
1242 
1243 	return USBD_NORMAL_COMPLETION;
1244 }
1245 
1246 static void
1247 ahci_device_bulk_abort(struct usbd_xfer *xfer)
1248 {
1249 	DPRINTF(D_TRACE, ("Bab "));
1250 	ahci_abort_xfer(xfer, USBD_CANCELLED);
1251 }
1252 
1253 static void
1254 ahci_device_bulk_close(struct usbd_pipe *pipe)
1255 {
1256 	DPRINTF(D_TRACE, ("Bcl "));
1257 }
1258 
1259 static void
1260 ahci_device_bulk_done(struct usbd_xfer *xfer)
1261 {
1262 	DPRINTF(D_TRACE, ("Bdn "));
1263 }
1264 
1265 #define DATA0_RD	(0x03)
1266 #define DATA0_WR	(0x07)
1267 #define AHCI_TIMEOUT	(5000)
1268 
1269 /*
1270  * Do a transaction.
1271  * return 1 if ACK, 0 if NAK, -1 if error.
1272  */
1273 static int
1274 ahci_transaction(struct ahci_softc *sc, struct usbd_pipe *pipe,
1275 	uint8_t pid, int len, u_char *buf, uint8_t toggle)
1276 {
1277 	return -1;
1278 #if 0
1279 #ifdef AHCI_DEBUG
1280 	char str[64];
1281 	int i;
1282 #endif
1283 	int timeout;
1284 	int ls_via_hub = 0;
1285 	int pl;
1286 	uint8_t isr;
1287 	uint8_t result = 0;
1288 	uint8_t devaddr = pipe->up_dev->ud_addr;
1289 	uint8_t endpointaddr = pipe->up_endpoint->ue_edesc->bEndpointAddress;
1290 	uint8_t endpoint;
1291 	uint8_t cmd = DATA0_RD;
1292 
1293 	endpoint = UE_GET_ADDR(endpointaddr);
1294 	DPRINTF(D_XFER, ("\n(%x,%d%s%d,%d) ",
1295 		pid, len, (pid == SL11_PID_IN) ? "<-" : "->", devaddr, endpoint));
1296 
1297 	/* Set registers */
1298 	sl11write(sc, SL11_E0ADDR, 0x40);
1299 	sl11write(sc, SL11_E0LEN,  len);
1300 	sl11write(sc, SL11_E0PID,  (pid << 4) + endpoint);
1301 	sl11write(sc, SL11_E0DEV,  devaddr);
1302 
1303 	/* Set buffer unless PID_IN */
1304 	if (pid != SL11_PID_IN) {
1305 		if (len > 0)
1306 			sl11write_region(sc, 0x40, buf, len);
1307 		cmd = DATA0_WR;
1308 	}
1309 
1310 	/* timing ? */
1311 	pl = (len >> 3) + 3;
1312 
1313 	/* Low speed device via HUB */
1314 	/* XXX does not work... */
1315 	if ((sc->sc_fullspeed) && pipe->up_dev->ud_speed == USB_SPEED_LOW) {
1316 		pl = len + 16;
1317 		cmd |= SL11_EPCTRL_PREAMBLE;
1318 
1319 		/*
1320 		 * SL811HS/T rev 1.2 has a bug, when it got PID_IN
1321 		 * from LowSpeed device via HUB.
1322 		 */
1323 		if (sc->sc_sltype == SLTYPE_SL811HS_R12 && pid == SL11_PID_IN) {
1324 			ls_via_hub = 1;
1325 			DPRINTF(D_MSG, ("LSvH "));
1326 		}
1327 	}
1328 
1329 	/* timing ? */
1330 	if (sl11read(sc, SL811_CSOF) <= (uint8_t)pl)
1331 		cmd |= SL11_EPCTRL_SOF;
1332 
1333 	/* Transfer */
1334 	sl11write(sc, SL11_ISR, 0xff);
1335 	sl11write(sc, SL11_E0CTRL, cmd | toggle);
1336 
1337 	/* Polling */
1338 	for (timeout = AHCI_TIMEOUT; timeout; timeout--) {
1339 		isr = sl11read(sc, SL11_ISR);
1340 		if ((isr & SL11_ISR_USBA))
1341 			break;
1342 	}
1343 
1344 	/* Check result status */
1345 	result = sl11read(sc, SL11_E0STAT);
1346 	if (!(result & SL11_EPSTAT_NAK) && ls_via_hub) {
1347 		/* Resend PID_IN within 20usec */
1348 		sl11write(sc, SL11_ISR, 0xff);
1349 		sl11write(sc, SL11_E0CTRL, SL11_EPCTRL_ARM);
1350 	}
1351 
1352 	sl11write(sc, SL11_ISR, 0xff);
1353 
1354 	DPRINTF(D_XFER, ("t=%d i=%x ", AHCI_TIMEOUT - timeout, isr));
1355 #if AHCI_DEBUG
1356 	snprintb(str, sizeof(str),
1357 	    "\20\x8STALL\7NAK\6OV\5SETUP\4DATA1\3TIMEOUT\2ERR\1ACK", result);
1358 	DPRINTF(D_XFER, ("STAT=%s ", str));
1359 #endif
1360 
1361 	if ((result & SL11_EPSTAT_ERROR))
1362 		return -1;
1363 
1364 	if ((result & SL11_EPSTAT_NAK))
1365 		return 0;
1366 
1367 	/* Read buffer if PID_IN */
1368 	if (pid == SL11_PID_IN && len > 0) {
1369 		sl11read_region(sc, buf, 0x40, len);
1370 #if AHCI_DEBUG
1371 		for (i = 0; i < len; i++)
1372 			DPRINTF(D_XFER, ("%02X ", buf[i]));
1373 #endif
1374 	}
1375 
1376 	return 1;
1377 #endif
1378 }
1379 
1380 void
1381 ahci_abort_xfer(struct usbd_xfer *xfer, usbd_status status)
1382 {
1383 	xfer->ux_status = status;
1384 	usb_transfer_complete(xfer);
1385 }
1386 
1387 void
1388 ahci_device_clear_toggle(struct usbd_pipe *pipe)
1389 {
1390 	struct ahci_pipe *apipe = (struct ahci_pipe *)pipe;
1391 	apipe->toggle = 0;
1392 }
1393 
1394 #ifdef AHCI_DEBUG
1395 void
1396 print_req(usb_device_request_t *r)
1397 {
1398 	const char *xmes[]={
1399 		"GETSTAT",
1400 		"CLRFEAT",
1401 		"res",
1402 		"SETFEAT",
1403 		"res",
1404 		"SETADDR",
1405 		"GETDESC",
1406 		"SETDESC",
1407 		"GETCONF",
1408 		"SETCONF",
1409 		"GETIN/F",
1410 		"SETIN/F",
1411 		"SYNC_FR"
1412 	};
1413 	int req, type, value, index, len;
1414 
1415 	req   = r->bRequest;
1416 	type  = r->bmRequestType;
1417 	value = UGETW(r->wValue);
1418 	index = UGETW(r->wIndex);
1419 	len   = UGETW(r->wLength);
1420 
1421 	printf("%x,%s,v=%d,i=%d,l=%d ",
1422 		type, xmes[req], value, index, len);
1423 }
1424 
1425 void
1426 print_req_hub(usb_device_request_t *r)
1427 {
1428 	struct {
1429 		int req;
1430 		int type;
1431 		const char *str;
1432 	} conf[] = {
1433 		{ 1, 0x20, "ClrHubFeat"  },
1434 		{ 1, 0x23, "ClrPortFeat" },
1435 		{ 2, 0xa3, "GetBusState" },
1436 		{ 6, 0xa0, "GetHubDesc"  },
1437 		{ 0, 0xa0, "GetHubStat"  },
1438 		{ 0, 0xa3, "GetPortStat" },
1439 		{ 7, 0x20, "SetHubDesc"  },
1440 		{ 3, 0x20, "SetHubFeat"  },
1441 		{ 3, 0x23, "SetPortFeat" },
1442 		{-1, 0, NULL},
1443 	};
1444 	int i;
1445 	int value, index, len;
1446 
1447 	value = UGETW(r->wValue);
1448 	index = UGETW(r->wIndex);
1449 	len   = UGETW(r->wLength);
1450 	for (i = 0; ; i++) {
1451 		if (conf[i].req == -1 )
1452 			return print_req(r);
1453 		if (r->bmRequestType == conf[i].type && r->bRequest == conf[i].req) {
1454 			printf("%s", conf[i].str);
1455 			break;
1456 		}
1457 	}
1458 	printf(",v=%d,i=%d,l=%d ", value, index, len);
1459 }
1460 
1461 void
1462 print_dumpreg(struct ahci_softc *sc)
1463 {
1464 #if 0
1465 	printf("00=%02x,01=%02x,02=%02x,03=%02x,04=%02x,"
1466 	       "08=%02x,09=%02x,0A=%02x,0B=%02x,0C=%02x,",
1467 		sl11read(sc, 0),  sl11read(sc, 1),
1468 		sl11read(sc, 2),  sl11read(sc, 3),
1469 		sl11read(sc, 4),  sl11read(sc, 8),
1470 		sl11read(sc, 9),  sl11read(sc, 10),
1471 		sl11read(sc, 11), sl11read(sc, 12)
1472 	);
1473 	printf("CR1=%02x,IER=%02x,0D=%02x,0E=%02x,0F=%02x ",
1474 		sl11read(sc, 5), sl11read(sc, 6),
1475 		sl11read(sc, 13), sl11read(sc, 14), sl11read(sc, 15)
1476 	);
1477 #endif
1478 }
1479 
1480 void
1481 print_xfer(struct usbd_xfer *xfer)
1482 {
1483 	printf("xfer: length=%d, actlen=%d, flags=%x, timeout=%d,",
1484 		xfer->ux_length, xfer->ux_actlen, xfer->ux_flags, xfer->ux_timeout);
1485 	printf("request{ ");
1486 	print_req_hub(&xfer->ux_request);
1487 	printf("} ");
1488 }
1489 #endif /* AHCI_DEBUG */
1490