1 /* $NetBSD: admpci.c,v 1.13 2015/10/02 05:22:51 msaitoh Exp $ */ 2 3 /*- 4 * Copyright (c) 2007 David Young. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or 7 * without modification, are permitted provided that the following 8 * conditions are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above 12 * copyright notice, this list of conditions and the following 13 * disclaimer in the documentation and/or other materials provided 14 * with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY 17 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 18 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 19 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 21 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 25 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 27 * OF SUCH DAMAGE. 28 */ 29 /*- 30 * Copyright (c) 2006 Itronix Inc. 31 * All rights reserved. 32 * 33 * Written by Garrett D'Amore for Itronix Inc. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 1. Redistributions of source code must retain the above copyright 39 * notice, this list of conditions and the following disclaimer. 40 * 2. Redistributions in binary form must reproduce the above copyright 41 * notice, this list of conditions and the following disclaimer in the 42 * documentation and/or other materials provided with the distribution. 43 * 3. The name of Itronix Inc. may not be used to endorse 44 * or promote products derived from this software without specific 45 * prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND 48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 49 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 50 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY 51 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 53 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 54 * ON ANY THEORY OF LIABILITY, WHETHER IN 55 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 56 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 57 * POSSIBILITY OF SUCH DAMAGE. 58 */ 59 60 #include "opt_pci.h" 61 #include "pci.h" 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: admpci.c,v 1.13 2015/10/02 05:22:51 msaitoh Exp $"); 65 66 #include <sys/param.h> 67 #include <sys/types.h> 68 #include <sys/bus.h> 69 #include <sys/cpu.h> 70 #include <sys/time.h> 71 #include <sys/systm.h> 72 #include <sys/errno.h> 73 #include <sys/device.h> 74 #include <sys/malloc.h> 75 #include <sys/extent.h> 76 77 #include <uvm/uvm_extern.h> 78 79 #include <dev/pci/pcivar.h> 80 #include <dev/pci/pcireg.h> 81 #include <dev/pci/pciconf.h> 82 83 #ifdef PCI_NETBSD_CONFIGURE 84 #include <mips/cache.h> 85 #endif 86 87 #include <mips/adm5120/include/adm5120_mainbusvar.h> 88 #include <mips/adm5120/include/adm5120reg.h> 89 #include <mips/adm5120/include/adm5120var.h> 90 91 #ifdef ADMPCI_DEBUG 92 int admpci_debug = 1; 93 #define ADMPCI_DPRINTF(__fmt, ...) \ 94 do { \ 95 if (admpci_debug) \ 96 printf((__fmt), __VA_ARGS__); \ 97 } while (/*CONSTCOND*/0) 98 #else /* !ADMPCI_DEBUG */ 99 #define ADMPCI_DPRINTF(__fmt, ...) do { } while (/*CONSTCOND*/0) 100 #endif /* ADMPCI_DEBUG */ 101 102 #define ADMPCI_TAG_BUS_MASK __BITS(23, 16) 103 /* Bit 11 is reserved. It selects the AHB-PCI bridge. Let device 0 104 * be the bridge. For all other device numbers, let bit[11] == 0. 105 */ 106 #define ADMPCI_TAG_DEVICE_MASK __BITS(15, 11) 107 #define ADMPCI_TAG_DEVICE_SUBMASK __BITS(15, 12) 108 #define ADMPCI_TAG_DEVICE_BRIDGE __BIT(11) 109 #define ADMPCI_TAG_FUNCTION_MASK __BITS(10, 8) 110 #define ADMPCI_TAG_REGISTER_MASK __BITS(7, 0) 111 112 #define ADMPCI_MAX_DEVICE 113 114 struct admpci_softc { 115 device_t sc_dev; 116 struct mips_pci_chipset sc_pc; 117 118 bus_space_tag_t sc_memt; 119 bus_space_tag_t sc_iot; 120 121 bus_space_tag_t sc_conft; 122 bus_space_handle_t sc_addrh; 123 bus_space_handle_t sc_datah; 124 }; 125 126 int admpcimatch(device_t, cfdata_t, void *); 127 void admpciattach(device_t, device_t, void *); 128 129 #if NPCI > 0 130 static void admpci_attach_hook(device_t, device_t, 131 struct pcibus_attach_args *); 132 static int admpci_bus_maxdevs(void *, int); 133 static pcitag_t admpci_make_tag(void *, int, int, int); 134 static void admpci_decompose_tag(void *, pcitag_t, int *, int *, int *); 135 static pcireg_t admpci_conf_read(void *, pcitag_t, int); 136 static void admpci_conf_write(void *, pcitag_t, int, pcireg_t); 137 static const char *admpci_intr_string(void *, pci_intr_handle_t, char *, size_t); 138 static void admpci_conf_interrupt(void *, int, int, int, int, int *); 139 static void *admpci_intr_establish(void *, pci_intr_handle_t, int, 140 int (*)(void *), void *); 141 static void admpci_intr_disestablish(void *, void *); 142 static int admpci_intr_map(const struct pci_attach_args *, pci_intr_handle_t *); 143 144 #ifdef PCI_NETBSD_CONFIGURE 145 static struct extent *io_ex = NULL; 146 static struct extent *mem_ex = NULL; 147 #endif /* PCI_NETBSD_CONFIGURE */ 148 149 #endif /* NPCI > 0 */ 150 151 CFATTACH_DECL_NEW(admpci, sizeof(struct admpci_softc), 152 admpcimatch, admpciattach, NULL, NULL); 153 154 int admpci_found = 0; 155 156 /* 157 * Physical PCI addresses are 36-bits long, so we need to have 158 * adequate storage space for them. 159 */ 160 #if NPCI > 0 161 #if !defined(_MIPS_PADDR_T_64BIT) && !defined(_LP64) 162 #error "admpci requires 64 bit paddr_t!" 163 #endif 164 #endif 165 166 int 167 admpcimatch(device_t parent, cfdata_t match, void *aux) 168 { 169 struct mainbus_attach_args *ma = (struct mainbus_attach_args *)aux; 170 171 return !admpci_found && strcmp(ma->ma_name, "admpci") == 0; 172 } 173 174 void 175 admpciattach(device_t parent, device_t self, void *aux) 176 { 177 struct adm5120_config *admc = &adm5120_configuration; 178 struct admpci_softc *sc = device_private(self); 179 struct mainbus_attach_args *ma = (struct mainbus_attach_args *)aux; 180 #if NPCI > 0 181 u_long result; 182 struct pcibus_attach_args pba; 183 #endif 184 185 admpci_found = 1; 186 187 sc->sc_dev = self; 188 sc->sc_conft = ma->ma_obiot; 189 if (bus_space_map(sc->sc_conft, ADM5120_BASE_PCI_CONFDATA, 4, 0, 190 &sc->sc_datah) != 0) { 191 aprint_error( 192 ": unable to map PCI Configuration Data register\n"); 193 return; 194 } 195 if (bus_space_map(sc->sc_conft, ADM5120_BASE_PCI_CONFADDR, 4, 0, 196 &sc->sc_addrh) != 0) { 197 aprint_error( 198 ": unable to map PCI Configuration Address register\n"); 199 return; 200 } 201 202 aprint_normal(": ADM5120 Host-PCI Bridge, " 203 "data %"PRIxBSH" addr %"PRIxBSH", sc %p\n", 204 sc->sc_datah, sc->sc_addrh, sc); 205 206 #if NPCI > 0 207 sc->sc_memt = &admc->pcimem_space; 208 sc->sc_iot = &admc->pciio_space; 209 210 sc->sc_pc.pc_conf_v = sc; 211 sc->sc_pc.pc_attach_hook = admpci_attach_hook; 212 sc->sc_pc.pc_bus_maxdevs = admpci_bus_maxdevs; 213 sc->sc_pc.pc_make_tag = admpci_make_tag; 214 sc->sc_pc.pc_decompose_tag = admpci_decompose_tag; 215 sc->sc_pc.pc_conf_read = admpci_conf_read; 216 sc->sc_pc.pc_conf_write = admpci_conf_write; 217 218 sc->sc_pc.pc_intr_v = sc; 219 sc->sc_pc.pc_intr_map = admpci_intr_map; 220 sc->sc_pc.pc_intr_string = admpci_intr_string; 221 sc->sc_pc.pc_intr_establish = admpci_intr_establish; 222 sc->sc_pc.pc_intr_disestablish = admpci_intr_disestablish; 223 sc->sc_pc.pc_conf_interrupt = admpci_conf_interrupt; 224 225 #ifdef ADMPCI_DEBUG 226 pcitag_t tag = pci_make_tag(&sc->sc_pc, 0, 0, 0); 227 ADMPCI_DPRINTF("%s: BAR 0x10 0x%08x\n", __func__, 228 pci_conf_read(&sc->sc_pc, tag, PCI_MAPREG_START)); 229 #endif 230 231 #ifdef PCI_NETBSD_CONFIGURE 232 mem_ex = extent_create("pcimem", 233 ADM5120_BOTTOM, ADM5120_TOP, 234 NULL, 0, EX_WAITOK); 235 (void)extent_alloc_subregion(mem_ex, 236 ADM5120_BASE_SRAM1, ADM5120_BASE_PCI_MEM - 1, 237 ADM5120_BASE_PCI_MEM - ADM5120_BASE_SRAM1, 238 ADM5120_BASE_PCI_MEM - ADM5120_BASE_SRAM1, 239 0, EX_WAITOK, &result); 240 (void)extent_alloc_subregion(mem_ex, 241 ADM5120_BASE_PCI_IO, ADM5120_TOP, 242 ADM5120_TOP - ADM5120_BASE_PCI_IO + 1, 243 ADM5120_TOP - ADM5120_BASE_PCI_IO + 1, 244 0, EX_WAITOK, &result); 245 246 io_ex = extent_create("pciio", 247 ADM5120_BASE_PCI_IO, ADM5120_BASE_PCI_CONFADDR - 1, 248 NULL, 0, EX_WAITOK); 249 250 pci_configure_bus(&sc->sc_pc, 251 io_ex, mem_ex, NULL, 0, mips_cache_info.mci_dcache_align); 252 extent_destroy(mem_ex); 253 extent_destroy(io_ex); 254 #endif 255 256 pba.pba_iot = sc->sc_iot; 257 pba.pba_memt = sc->sc_memt; 258 /* XXX: review dma tag logic */ 259 pba.pba_dmat = ma->ma_dmat; 260 pba.pba_dmat64 = NULL; 261 pba.pba_pc = &sc->sc_pc; 262 pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY; 263 pba.pba_bus = 0; 264 pba.pba_bridgetag = NULL; 265 266 config_found_ia(self, "pcibus", &pba, pcibusprint); 267 #endif /* NPCI > 0 */ 268 } 269 270 #if NPCI > 0 271 272 void 273 admpci_attach_hook(device_t parent, device_t self, 274 struct pcibus_attach_args *pba) 275 { 276 } 277 278 /* There are at most four devices on bus 0. The ADM5120 has 279 * request/grant lines for 3 PCI devices: 1, 2, and 3. The host 280 * bridge is device 0. 281 */ 282 int 283 admpci_bus_maxdevs(void *v, int bus) 284 { 285 if (bus == 0) 286 return 4; 287 288 return 1 + __SHIFTOUT_MASK(ADMPCI_TAG_DEVICE_MASK); 289 } 290 291 pcitag_t 292 admpci_make_tag(void *v, int bus, int device, int function) 293 { 294 if (bus > __SHIFTOUT_MASK(ADMPCI_TAG_BUS_MASK) || 295 device > __SHIFTOUT_MASK(ADMPCI_TAG_DEVICE_MASK) || 296 function > __SHIFTOUT_MASK(ADMPCI_TAG_FUNCTION_MASK)) 297 panic("%s: bad request", __func__); 298 299 return __SHIFTIN(bus, ADMPCI_TAG_BUS_MASK) | 300 __SHIFTIN(device, ADMPCI_TAG_DEVICE_MASK) | 301 __SHIFTIN(function, ADMPCI_TAG_FUNCTION_MASK); 302 } 303 304 void 305 admpci_decompose_tag(void *v, pcitag_t tag, int *b, int *d, int *f) 306 { 307 int bus, device, function; 308 309 bus = __SHIFTOUT(tag, ADMPCI_TAG_BUS_MASK); 310 device = __SHIFTOUT(tag, ADMPCI_TAG_DEVICE_MASK); 311 function = __SHIFTOUT(tag, ADMPCI_TAG_FUNCTION_MASK); 312 313 if (b != NULL) 314 *b = bus; 315 if (d != NULL) 316 *d = device; 317 if (f != NULL) 318 *f = function; 319 } 320 321 static int 322 admpci_tag_to_addr(void *v, pcitag_t tag, int reg, bus_addr_t *addrp) 323 { 324 int bus, device, function; 325 326 KASSERT(addrp != NULL); 327 328 if ((unsigned int)reg >= PCI_CONF_SIZE) 329 return -1; 330 331 /* panics if tag is not well-formed */ 332 admpci_decompose_tag(v, tag, &bus, &device, &function); 333 if (reg > __SHIFTOUT_MASK(ADMPCI_TAG_REGISTER_MASK)) 334 panic("%s: bad register", __func__); 335 336 *addrp = 0x80000000 | tag | __SHIFTIN(reg, ADMPCI_TAG_REGISTER_MASK); 337 338 return 0; 339 } 340 341 static pcireg_t 342 admpci_conf_read(void *v, pcitag_t tag, int reg) 343 { 344 int s; 345 struct admpci_softc *sc = (struct admpci_softc *)v; 346 uint32_t data; 347 bus_addr_t addr; 348 349 ADMPCI_DPRINTF("%s: sc %p tag %lx reg %d\n", __func__, (void *)sc, tag, 350 reg); 351 352 if (admpci_tag_to_addr(v, tag, reg, &addr) == -1) 353 return 0xffffffff; 354 355 ADMPCI_DPRINTF("%s: sc_addrh %lx sc_datah %lx addr %lx\n", __func__, 356 sc->sc_addrh, sc->sc_datah, addr); 357 358 s = splhigh(); 359 bus_space_write_4(sc->sc_conft, sc->sc_addrh, 0, addr); 360 data = bus_space_read_4(sc->sc_conft, sc->sc_datah, 0); 361 splx(s); 362 363 ADMPCI_DPRINTF("%s: read 0x%" PRIx32 "\n", __func__, data); 364 return data; 365 } 366 367 void 368 admpci_conf_write(void *v, pcitag_t tag, int reg, pcireg_t data) 369 { 370 int s; 371 struct admpci_softc *sc = (struct admpci_softc *)v; 372 bus_addr_t addr; 373 374 ADMPCI_DPRINTF("%s: sc %p tag %lx reg %d\n", __func__, (void *)sc, tag, 375 reg); 376 377 if (admpci_tag_to_addr(v, tag, reg, &addr) == -1) 378 return; 379 380 ADMPCI_DPRINTF("%s: sc_addrh %lx sc_datah %lx addr %lx\n", __func__, 381 sc->sc_addrh, sc->sc_datah, addr); 382 383 s = splhigh(); 384 bus_space_write_4(sc->sc_conft, sc->sc_addrh, 0, addr); 385 bus_space_write_4(sc->sc_conft, sc->sc_datah, 0, data); 386 splx(s); 387 } 388 389 const char * 390 admpci_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len) 391 { 392 (void)snprintf(buf, len, "irq %u", (unsigned)ih); 393 return buf; 394 } 395 396 void * 397 admpci_intr_establish(void *v, pci_intr_handle_t ih, int ipl, 398 int (*handler)(void *), void *arg) 399 { 400 return adm5120_intr_establish(ih, ipl, handler, arg); 401 } 402 403 void 404 admpci_intr_disestablish(void *v, void *cookie) 405 { 406 adm5120_intr_disestablish(cookie); 407 } 408 409 void 410 admpci_conf_interrupt(void *v, int bus, int dev, int ipin, int swiz, int *iline) 411 { 412 /* 413 * We let the machdep_pci_intr_map take care of IRQ routing. 414 * On some platforms the BIOS may have handled this properly, 415 * on others it might not have. For now we avoid clobbering 416 * the settings establishsed by the BIOS, so that they will be 417 * there if the platform logic is confident that it can rely 418 * on them. 419 */ 420 } 421 422 /* 423 * Map the bus 0 device numbers 1, 2, and 3 to IRQ 6, 7, and 8, 424 * respectively. 425 * 426 * XXX How to handle bridges? 427 */ 428 static int 429 admpci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 430 { 431 int bus, device, function; 432 433 admpci_decompose_tag(pa->pa_pc->pc_conf_v, pa->pa_tag, 434 &bus, &device, &function); 435 436 if (bus != 0 || device > 3) 437 return -1; 438 439 *ihp = (device - 1) + 6; 440 441 return 0; 442 } 443 #endif 444