1 /* $NetBSD: admpci.c,v 1.9 2012/02/12 16:34:09 matt Exp $ */ 2 3 /*- 4 * Copyright (c) 2007 David Young. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or 7 * without modification, are permitted provided that the following 8 * conditions are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above 12 * copyright notice, this list of conditions and the following 13 * disclaimer in the documentation and/or other materials provided 14 * with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY 17 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 18 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 19 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 21 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 25 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 27 * OF SUCH DAMAGE. 28 */ 29 /*- 30 * Copyright (c) 2006 Itronix Inc. 31 * All rights reserved. 32 * 33 * Written by Garrett D'Amore for Itronix Inc. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 1. Redistributions of source code must retain the above copyright 39 * notice, this list of conditions and the following disclaimer. 40 * 2. Redistributions in binary form must reproduce the above copyright 41 * notice, this list of conditions and the following disclaimer in the 42 * documentation and/or other materials provided with the distribution. 43 * 3. The name of Itronix Inc. may not be used to endorse 44 * or promote products derived from this software without specific 45 * prior written permission. 46 * 47 * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND 48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 49 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 50 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY 51 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 53 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 54 * ON ANY THEORY OF LIABILITY, WHETHER IN 55 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 56 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 57 * POSSIBILITY OF SUCH DAMAGE. 58 */ 59 60 #include "opt_pci.h" 61 #include "pci.h" 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: admpci.c,v 1.9 2012/02/12 16:34:09 matt Exp $"); 65 66 #include <sys/types.h> 67 #include <sys/bus.h> 68 #include <sys/cpu.h> 69 70 #include <sys/param.h> 71 #include <sys/time.h> 72 #include <sys/systm.h> 73 #include <sys/errno.h> 74 #include <sys/device.h> 75 #include <sys/malloc.h> 76 #include <sys/extent.h> 77 78 #include <uvm/uvm_extern.h> 79 80 #include <dev/pci/pcivar.h> 81 #include <dev/pci/pcireg.h> 82 #include <dev/pci/pciconf.h> 83 84 #ifdef PCI_NETBSD_CONFIGURE 85 #include <mips/cache.h> 86 #endif 87 88 #include <mips/pte.h> 89 90 #include <mips/adm5120/include/adm5120_mainbusvar.h> 91 #include <mips/adm5120/include/adm5120reg.h> 92 #include <mips/adm5120/include/adm5120var.h> 93 94 #ifdef ADMPCI_DEBUG 95 int admpci_debug = 1; 96 #define ADMPCI_DPRINTF(__fmt, ...) \ 97 do { \ 98 if (admpci_debug) \ 99 printf((__fmt), __VA_ARGS__); \ 100 } while (/*CONSTCOND*/0) 101 #else /* !ADMPCI_DEBUG */ 102 #define ADMPCI_DPRINTF(__fmt, ...) do { } while (/*CONSTCOND*/0) 103 #endif /* ADMPCI_DEBUG */ 104 105 #define ADMPCI_TAG_BUS_MASK __BITS(23, 16) 106 /* Bit 11 is reserved. It selects the AHB-PCI bridge. Let device 0 107 * be the bridge. For all other device numbers, let bit[11] == 0. 108 */ 109 #define ADMPCI_TAG_DEVICE_MASK __BITS(15, 11) 110 #define ADMPCI_TAG_DEVICE_SUBMASK __BITS(15, 12) 111 #define ADMPCI_TAG_DEVICE_BRIDGE __BIT(11) 112 #define ADMPCI_TAG_FUNCTION_MASK __BITS(10, 8) 113 #define ADMPCI_TAG_REGISTER_MASK __BITS(7, 0) 114 115 #define ADMPCI_MAX_DEVICE 116 117 struct admpci_softc { 118 device_t sc_dev; 119 struct mips_pci_chipset sc_pc; 120 121 bus_space_tag_t sc_memt; 122 bus_space_tag_t sc_iot; 123 124 bus_space_tag_t sc_conft; 125 bus_space_handle_t sc_addrh; 126 bus_space_handle_t sc_datah; 127 }; 128 129 int admpcimatch(device_t, cfdata_t, void *); 130 void admpciattach(device_t, device_t, void *); 131 132 #if NPCI > 0 133 static void admpci_attach_hook(device_t, device_t, 134 struct pcibus_attach_args *); 135 static int admpci_bus_maxdevs(void *, int); 136 static pcitag_t admpci_make_tag(void *, int, int, int); 137 static void admpci_decompose_tag(void *, pcitag_t, int *, int *, int *); 138 static pcireg_t admpci_conf_read(void *, pcitag_t, int); 139 static void admpci_conf_write(void *, pcitag_t, int, pcireg_t); 140 static const char *admpci_intr_string(void *, pci_intr_handle_t); 141 static void admpci_conf_interrupt(void *, int, int, int, int, int *); 142 static void *admpci_intr_establish(void *, pci_intr_handle_t, int, 143 int (*)(void *), void *); 144 static void admpci_intr_disestablish(void *, void *); 145 static int admpci_intr_map(const struct pci_attach_args *, pci_intr_handle_t *); 146 147 #ifdef PCI_NETBSD_CONFIGURE 148 static struct extent *io_ex = NULL; 149 static struct extent *mem_ex = NULL; 150 #endif /* PCI_NETBSD_CONFIGURE */ 151 152 #endif /* NPCI > 0 */ 153 154 CFATTACH_DECL_NEW(admpci, sizeof(struct admpci_softc), 155 admpcimatch, admpciattach, NULL, NULL); 156 157 int admpci_found = 0; 158 159 /* 160 * Physical PCI addresses are 36-bits long, so we need to have 161 * adequate storage space for them. 162 */ 163 #if NPCI > 0 164 #if !defined(_MIPS_PADDR_T_64BIT) && !defined(_LP64) 165 #error "admpci requires 64 bit paddr_t!" 166 #endif 167 #endif 168 169 int 170 admpcimatch(device_t parent, cfdata_t match, void *aux) 171 { 172 struct mainbus_attach_args *ma = (struct mainbus_attach_args *)aux; 173 174 return !admpci_found && strcmp(ma->ma_name, "admpci") == 0; 175 } 176 177 void 178 admpciattach(device_t parent, device_t self, void *aux) 179 { 180 struct adm5120_config *admc = &adm5120_configuration; 181 struct admpci_softc *sc = device_private(self); 182 struct mainbus_attach_args *ma = (struct mainbus_attach_args *)aux; 183 #if NPCI > 0 184 u_long result; 185 pcitag_t tag; 186 struct pcibus_attach_args pba; 187 #endif 188 189 admpci_found = 1; 190 191 sc->sc_dev = self; 192 sc->sc_conft = ma->ma_obiot; 193 if (bus_space_map(sc->sc_conft, ADM5120_BASE_PCI_CONFDATA, 4, 0, 194 &sc->sc_datah) != 0) { 195 aprint_error( 196 ": unable to map PCI Configuration Data register\n"); 197 return; 198 } 199 if (bus_space_map(sc->sc_conft, ADM5120_BASE_PCI_CONFADDR, 4, 0, 200 &sc->sc_addrh) != 0) { 201 aprint_error( 202 ": unable to map PCI Configuration Address register\n"); 203 return; 204 } 205 206 aprint_normal(": ADM5120 Host-PCI Bridge, " 207 "data %"PRIxBSH" addr %"PRIxBSH", sc %p\n", 208 sc->sc_datah, sc->sc_addrh, sc); 209 210 #if NPCI > 0 211 sc->sc_memt = &admc->pcimem_space; 212 sc->sc_iot = &admc->pciio_space; 213 214 sc->sc_pc.pc_conf_v = sc; 215 sc->sc_pc.pc_attach_hook = admpci_attach_hook; 216 sc->sc_pc.pc_bus_maxdevs = admpci_bus_maxdevs; 217 sc->sc_pc.pc_make_tag = admpci_make_tag; 218 sc->sc_pc.pc_decompose_tag = admpci_decompose_tag; 219 sc->sc_pc.pc_conf_read = admpci_conf_read; 220 sc->sc_pc.pc_conf_write = admpci_conf_write; 221 222 sc->sc_pc.pc_intr_v = sc; 223 sc->sc_pc.pc_intr_map = admpci_intr_map; 224 sc->sc_pc.pc_intr_string = admpci_intr_string; 225 sc->sc_pc.pc_intr_establish = admpci_intr_establish; 226 sc->sc_pc.pc_intr_disestablish = admpci_intr_disestablish; 227 sc->sc_pc.pc_conf_interrupt = admpci_conf_interrupt; 228 229 tag = pci_make_tag(&sc->sc_pc, 0, 0, 0); 230 ADMPCI_DPRINTF("%s: BAR 0x10 0x%08x\n", __func__, 231 pci_conf_read(&sc->sc_pc, tag, PCI_MAPREG_START)); 232 233 #ifdef PCI_NETBSD_CONFIGURE 234 mem_ex = extent_create("pcimem", 235 ADM5120_BOTTOM, ADM5120_TOP, 236 NULL, 0, EX_WAITOK); 237 (void)extent_alloc_subregion(mem_ex, 238 ADM5120_BASE_SRAM1, ADM5120_BASE_PCI_MEM - 1, 239 ADM5120_BASE_PCI_MEM - ADM5120_BASE_SRAM1, 240 ADM5120_BASE_PCI_MEM - ADM5120_BASE_SRAM1, 241 0, EX_WAITOK, &result); 242 (void)extent_alloc_subregion(mem_ex, 243 ADM5120_BASE_PCI_IO, ADM5120_TOP, 244 ADM5120_TOP - ADM5120_BASE_PCI_IO + 1, 245 ADM5120_TOP - ADM5120_BASE_PCI_IO + 1, 246 0, EX_WAITOK, &result); 247 248 io_ex = extent_create("pciio", 249 ADM5120_BASE_PCI_IO, ADM5120_BASE_PCI_CONFADDR - 1, 250 NULL, 0, EX_WAITOK); 251 252 pci_configure_bus(&sc->sc_pc, 253 io_ex, mem_ex, NULL, 0, mips_cache_info.mci_dcache_align); 254 extent_destroy(mem_ex); 255 extent_destroy(io_ex); 256 #endif 257 258 pba.pba_iot = sc->sc_iot; 259 pba.pba_memt = sc->sc_memt; 260 /* XXX: review dma tag logic */ 261 pba.pba_dmat = ma->ma_dmat; 262 pba.pba_dmat64 = NULL; 263 pba.pba_pc = &sc->sc_pc; 264 pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY; 265 pba.pba_bus = 0; 266 pba.pba_bridgetag = NULL; 267 268 config_found_ia(self, "pcibus", &pba, pcibusprint); 269 #endif /* NPCI > 0 */ 270 } 271 272 #if NPCI > 0 273 274 void 275 admpci_attach_hook(device_t parent, device_t self, 276 struct pcibus_attach_args *pba) 277 { 278 } 279 280 /* There are at most four devices on bus 0. The ADM5120 has 281 * request/grant lines for 3 PCI devices: 1, 2, and 3. The host 282 * bridge is device 0. 283 */ 284 int 285 admpci_bus_maxdevs(void *v, int bus) 286 { 287 if (bus == 0) 288 return 4; 289 290 return 1 + __SHIFTOUT_MASK(ADMPCI_TAG_DEVICE_MASK); 291 } 292 293 pcitag_t 294 admpci_make_tag(void *v, int bus, int device, int function) 295 { 296 if (bus > __SHIFTOUT_MASK(ADMPCI_TAG_BUS_MASK) || 297 device > __SHIFTOUT_MASK(ADMPCI_TAG_DEVICE_MASK) || 298 function > __SHIFTOUT_MASK(ADMPCI_TAG_FUNCTION_MASK)) 299 panic("%s: bad request", __func__); 300 301 return __SHIFTIN(bus, ADMPCI_TAG_BUS_MASK) | 302 __SHIFTIN(device, ADMPCI_TAG_DEVICE_MASK) | 303 __SHIFTIN(function, ADMPCI_TAG_FUNCTION_MASK); 304 } 305 306 void 307 admpci_decompose_tag(void *v, pcitag_t tag, int *b, int *d, int *f) 308 { 309 int bus, device, function; 310 311 bus = __SHIFTOUT(tag, ADMPCI_TAG_BUS_MASK); 312 device = __SHIFTOUT(tag, ADMPCI_TAG_DEVICE_MASK); 313 function = __SHIFTOUT(tag, ADMPCI_TAG_FUNCTION_MASK); 314 315 if (b != NULL) 316 *b = bus; 317 if (d != NULL) 318 *d = device; 319 if (f != NULL) 320 *f = function; 321 } 322 323 static int 324 admpci_tag_to_addr(void *v, pcitag_t tag, int reg, bus_addr_t *addrp) 325 { 326 int bus, device, function; 327 328 KASSERT(addrp != NULL); 329 /* panics if tag is not well-formed */ 330 admpci_decompose_tag(v, tag, &bus, &device, &function); 331 if (reg > __SHIFTOUT_MASK(ADMPCI_TAG_REGISTER_MASK)) 332 panic("%s: bad register", __func__); 333 334 *addrp = 0x80000000 | tag | __SHIFTIN(reg, ADMPCI_TAG_REGISTER_MASK); 335 336 return 0; 337 } 338 339 static pcireg_t 340 admpci_conf_read(void *v, pcitag_t tag, int reg) 341 { 342 int s; 343 struct admpci_softc *sc = (struct admpci_softc *)v; 344 uint32_t data; 345 bus_addr_t addr; 346 347 ADMPCI_DPRINTF("%s: sc %p tag %lx reg %d\n", __func__, (void *)sc, tag, 348 reg); 349 350 if (admpci_tag_to_addr(v, tag, reg, &addr) == -1) 351 return 0xffffffff; 352 353 ADMPCI_DPRINTF("%s: sc_addrh %lx sc_datah %lx addr %lx\n", __func__, 354 sc->sc_addrh, sc->sc_datah, addr); 355 356 s = splhigh(); 357 bus_space_write_4(sc->sc_conft, sc->sc_addrh, 0, addr); 358 data = bus_space_read_4(sc->sc_conft, sc->sc_datah, 0); 359 splx(s); 360 361 ADMPCI_DPRINTF("%s: read 0x%" PRIx32 "\n", __func__, data); 362 return data; 363 } 364 365 void 366 admpci_conf_write(void *v, pcitag_t tag, int reg, pcireg_t data) 367 { 368 int s; 369 struct admpci_softc *sc = (struct admpci_softc *)v; 370 bus_addr_t addr; 371 372 ADMPCI_DPRINTF("%s: sc %p tag %lx reg %d\n", __func__, (void *)sc, tag, 373 reg); 374 375 if (admpci_tag_to_addr(v, tag, reg, &addr) == -1) 376 return; 377 378 ADMPCI_DPRINTF("%s: sc_addrh %lx sc_datah %lx addr %lx\n", __func__, 379 sc->sc_addrh, sc->sc_datah, addr); 380 381 s = splhigh(); 382 bus_space_write_4(sc->sc_conft, sc->sc_addrh, 0, addr); 383 bus_space_write_4(sc->sc_conft, sc->sc_datah, 0, data); 384 splx(s); 385 } 386 387 const char * 388 admpci_intr_string(void *v, pci_intr_handle_t ih) 389 { 390 static char name[16]; 391 392 (void)snprintf(name, sizeof(name), "irq %u", (unsigned)ih); 393 return name; 394 } 395 396 void * 397 admpci_intr_establish(void *v, pci_intr_handle_t ih, int ipl, 398 int (*handler)(void *), void *arg) 399 { 400 return adm5120_intr_establish(ih, ipl, handler, arg); 401 } 402 403 void 404 admpci_intr_disestablish(void *v, void *cookie) 405 { 406 adm5120_intr_disestablish(cookie); 407 } 408 409 void 410 admpci_conf_interrupt(void *v, int bus, int dev, int ipin, int swiz, int *iline) 411 { 412 /* 413 * We let the machdep_pci_intr_map take care of IRQ routing. 414 * On some platforms the BIOS may have handled this properly, 415 * on others it might not have. For now we avoid clobbering 416 * the settings establishsed by the BIOS, so that they will be 417 * there if the platform logic is confident that it can rely 418 * on them. 419 */ 420 } 421 422 /* 423 * Map the bus 0 device numbers 1, 2, and 3 to IRQ 6, 7, and 8, 424 * respectively. 425 * 426 * XXX How to handle bridges? 427 */ 428 static int 429 admpci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 430 { 431 int bus, device, function; 432 433 admpci_decompose_tag(pa->pa_pc->pc_conf_v, pa->pa_tag, 434 &bus, &device, &function); 435 436 if (bus != 0 || device > 3) 437 return -1; 438 439 *ihp = (device - 1) + 6; 440 441 return 0; 442 } 443 #endif 444