xref: /netbsd-src/sys/arch/mips/adm5120/dev/admgpio.c (revision 404fbe5fb94ca1e054339640cabb2801ce52dd30)
1 /* $NetBSD: admgpio.c,v 1.1 2007/03/20 08:52:01 dyoung Exp $ */
2 
3 /*-
4  * Copyright (c) 2007 David Young.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or
7  * without modification, are permitted provided that the following
8  * conditions are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above
12  *    copyright notice, this list of conditions and the following
13  *    disclaimer in the documentation and/or other materials provided
14  *    with the distribution.
15  * 3. The name of the author may not be used to endorse or promote
16  *    products derived from this software without specific prior
17  *    written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY
20  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
22  * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
24  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
26  * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
28  * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
29  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
30  * OF SUCH DAMAGE.
31  */
32 #include <sys/cdefs.h>
33 
34 __KERNEL_RCSID(0, "$NetBSD: admgpio.c,v 1.1 2007/03/20 08:52:01 dyoung Exp $");
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/device.h>
39 #include <sys/gpio.h>
40 #include <sys/kernel.h>	/* for hz */
41 
42 #include <machine/bus.h>
43 
44 #include <dev/gpio/gpiovar.h>
45 
46 #include <mips/adm5120/include/adm5120reg.h>
47 #include <mips/adm5120/include/adm5120var.h>
48 #include <mips/adm5120/include/adm5120_mainbusvar.h>
49 
50 static inline uint32_t
51 admgpio_read(struct mainbus_softc *sc)
52 {
53 	return bus_space_read_4(sc->sc_obiot, sc->sc_gpioh, ADM5120_GPIO0);
54 }
55 
56 static inline void
57 admgpio_write(struct mainbus_softc *sc, uint32_t val)
58 {
59 	bus_space_write_4(sc->sc_obiot, sc->sc_gpioh, ADM5120_GPIO0, val);
60 }
61 
62 static void
63 admgpio_pin_ctl(void *cookie, int pin, int flags)
64 {
65 	struct mainbus_softc *sc = cookie;
66 	uint32_t gpio0, mask;
67 
68 	KASSERT(flags == GPIO_PIN_INPUT || flags == GPIO_PIN_OUTPUT);
69 
70 	mask = __SHIFTIN(1 << pin, ADM5120_GPIO0_OE);
71 	gpio0 = admgpio_read(sc);
72 
73 	if (flags == GPIO_PIN_OUTPUT)
74 		admgpio_write(sc, gpio0 | mask);
75 	else
76 		admgpio_write(sc, gpio0 & ~mask);
77 }
78 
79 static int
80 admgpio_pin_read(void *cookie, int pin)
81 {
82 	struct mainbus_softc *sc = cookie;
83 	uint32_t gpio0, mask;
84 
85 	KASSERT(pin >= 0 && pin < 8);
86 
87 	if (sc->sc_pins[pin].pin_flags == GPIO_PIN_INPUT)
88 		mask = __SHIFTIN(1 << pin, ADM5120_GPIO0_IV);
89 	else
90 		mask = __SHIFTIN(1 << pin, ADM5120_GPIO0_OV);
91 
92 	gpio0 = admgpio_read(sc);
93 
94 	return ((gpio0 & mask) != 0) ? GPIO_PIN_HIGH : GPIO_PIN_LOW;
95 }
96 
97 static void
98 admgpio_pin_write(void *cookie, int pin, int value)
99 {
100 	struct mainbus_softc *sc = cookie;
101 	uint32_t gpio0, mask;
102 
103 	KASSERT(pin >= 0 && pin < 8);
104 
105 	mask = __SHIFTIN(1 << pin, ADM5120_GPIO0_OV);
106 	gpio0 = admgpio_read(sc);
107 
108 	admgpio_write(sc,
109 	    (value == GPIO_PIN_HIGH) ? (gpio0 | mask) : (gpio0 & ~mask));
110 }
111 
112 device_t
113 admgpio_attach(struct mainbus_softc *sc)
114 {
115 	int pin;
116 	uint32_t oe;
117 	struct gpiobus_attach_args gba;
118 
119 	oe = __SHIFTOUT(admgpio_read(sc), ADM5120_GPIO0_OE);
120 
121 	for (pin = 0; pin < __arraycount(sc->sc_pins); pin++) {
122 		sc->sc_pins[pin].pin_num = pin;
123 		sc->sc_pins[pin].pin_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
124 
125 		if ((oe & (1 << pin)) != 0)
126 			sc->sc_pins[pin].pin_flags = GPIO_PIN_OUTPUT;
127 		else
128 			sc->sc_pins[pin].pin_flags = GPIO_PIN_INPUT;
129 
130 		sc->sc_pins[pin].pin_state = admgpio_pin_read(sc, pin);
131 	}
132 
133 	sc->sc_gp.gp_cookie = sc;
134 	sc->sc_gp.gp_pin_read = admgpio_pin_read;
135 	sc->sc_gp.gp_pin_write = admgpio_pin_write;
136 	sc->sc_gp.gp_pin_ctl = admgpio_pin_ctl;
137 
138 	gba.gba_gc = &sc->sc_gp;
139 	gba.gba_pins = &sc->sc_pins[0];
140 	gba.gba_npins = __arraycount(sc->sc_pins);
141 
142 	/* Attach GPIO framework */
143 	return config_found_ia(&sc->sc_dev, "gpiobus", &gba, gpiobus_print);
144 }
145