1 /* $NetBSD: uninorth.c,v 1.12 2007/10/17 19:55:35 garbled Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: uninorth.c,v 1.12 2007/10/17 19:55:35 garbled Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/device.h> 34 #include <sys/systm.h> 35 36 #include <dev/pci/pcivar.h> 37 #include <dev/ofw/openfirm.h> 38 #include <dev/ofw/ofw_pci.h> 39 40 #include <machine/autoconf.h> 41 #include <machine/pio.h> 42 43 struct uninorth_softc { 44 struct device sc_dev; 45 struct genppc_pci_chipset sc_pc; 46 struct powerpc_bus_space sc_iot; 47 struct powerpc_bus_space sc_memt; 48 }; 49 50 static void uninorth_attach(struct device *, struct device *, void *); 51 static int uninorth_match(struct device *, struct cfdata *, void *); 52 53 static pcireg_t uninorth_conf_read(void *, pcitag_t, int); 54 static void uninorth_conf_write(void *, pcitag_t, int, pcireg_t); 55 56 CFATTACH_DECL(uninorth, sizeof(struct uninorth_softc), 57 uninorth_match, uninorth_attach, NULL, NULL); 58 59 static int 60 uninorth_match(struct device *parent, struct cfdata *cf, void *aux) 61 { 62 struct confargs *ca = aux; 63 char compat[32]; 64 65 if (strcmp(ca->ca_name, "pci") != 0) 66 return 0; 67 68 memset(compat, 0, sizeof(compat)); 69 OF_getprop(ca->ca_node, "compatible", compat, sizeof(compat)); 70 if (strcmp(compat, "uni-north") != 0) 71 return 0; 72 73 return 1; 74 } 75 76 static void 77 uninorth_attach(struct device *parent, struct device *self, void *aux) 78 { 79 struct uninorth_softc *sc = (void *)self; 80 pci_chipset_tag_t pc = &sc->sc_pc; 81 struct confargs *ca = aux; 82 struct pcibus_attach_args pba; 83 int len, child, node = ca->ca_node; 84 uint32_t reg[2], busrange[2]; 85 struct ranges { 86 uint32_t pci_hi, pci_mid, pci_lo; 87 uint32_t host; 88 uint32_t size_hi, size_lo; 89 } ranges[6], *rp = ranges; 90 91 printf("\n"); 92 93 /* UniNorth address */ 94 if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8) 95 return; 96 97 /* PCI bus number */ 98 if (OF_getprop(node, "bus-range", busrange, sizeof(busrange)) != 8) 99 return; 100 101 /* find i/o tag */ 102 len = OF_getprop(node, "ranges", ranges, sizeof(ranges)); 103 if (len == -1) 104 return; 105 while (len >= sizeof(ranges[0])) { 106 if ((rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) == 107 OFW_PCI_PHYS_HI_SPACE_IO) { 108 sc->sc_iot.pbs_base = rp->host; 109 sc->sc_iot.pbs_limit = rp->host + rp->size_lo; 110 break; 111 } 112 len -= sizeof(ranges[0]); 113 rp++; 114 } 115 116 /* XXX enable gmac ethernet */ 117 for (child = OF_child(node); child; child = OF_peer(child)) { 118 volatile int *gmac_gbclock_en = (void *)0xf8000020; 119 char compat[32]; 120 121 memset(compat, 0, sizeof(compat)); 122 OF_getprop(child, "compatible", compat, sizeof(compat)); 123 if (strcmp(compat, "gmac") == 0) 124 *gmac_gbclock_en |= 0x02; 125 } 126 127 sc->sc_iot.pbs_flags = _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_IO_TYPE; 128 sc->sc_iot.pbs_offset = 0; 129 if (ofwoea_map_space(RANGE_TYPE_PCI, RANGE_IO, node, &sc->sc_iot, 130 "uninorth io-space") != 0) 131 panic("Can't init uninorth io tag"); 132 133 sc->sc_memt.pbs_flags = _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE; 134 sc->sc_memt.pbs_base = 0x00000000; 135 if (ofwoea_map_space(RANGE_TYPE_PCI, RANGE_MEM, node, &sc->sc_memt, 136 "uninorth mem-space") != 0) 137 panic("Can't init uninorth mem tag"); 138 139 macppc_pci_get_chipset_tag(pc); 140 pc->pc_node = node; 141 pc->pc_addr = mapiodev(reg[0] + 0x800000, 4); 142 pc->pc_data = mapiodev(reg[0] + 0xc00000, 8); 143 pc->pc_bus = busrange[0]; 144 pc->pc_conf_read = uninorth_conf_read; 145 pc->pc_conf_write = uninorth_conf_write; 146 pc->pc_iot = &sc->sc_iot; 147 pc->pc_memt = &sc->sc_memt; 148 149 memset(&pba, 0, sizeof(pba)); 150 pba.pba_memt = pc->pc_memt; 151 pba.pba_iot = pc->pc_iot; 152 pba.pba_dmat = &pci_bus_dma_tag; 153 pba.pba_dmat64 = NULL; 154 pba.pba_bus = pc->pc_bus; 155 pba.pba_bridgetag = NULL; 156 pba.pba_pc = pc; 157 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 158 159 config_found_ia(self, "pcibus", &pba, pcibusprint); 160 } 161 162 static pcireg_t 163 uninorth_conf_read(void *cookie, pcitag_t tag, int reg) 164 { 165 pci_chipset_tag_t pc = cookie; 166 int32_t *daddr = pc->pc_data; 167 pcireg_t data; 168 int bus, dev, func, s; 169 uint32_t x; 170 171 /* UniNorth seems to have a 64bit data port */ 172 if (reg & 0x04) 173 daddr++; 174 175 pci_decompose_tag(pc, tag, &bus, &dev, &func); 176 177 /* 178 * bandit's minimum device number of the first bus is 11. 179 * So we behave as if there is no device when dev < 11. 180 */ 181 if (func > 7) 182 panic("pci_conf_read: func > 7"); 183 184 if (bus == pc->pc_bus) { 185 if (dev < 11) 186 return 0xffffffff; 187 x = (1 << dev) | (func << 8) | reg; 188 } else 189 x = tag | reg | 1; 190 191 s = splhigh(); 192 193 out32rb(pc->pc_addr, x); 194 in32rb(pc->pc_addr); 195 data = 0xffffffff; 196 if (!badaddr(daddr, 4)) 197 data = in32rb(daddr); 198 out32rb(pc->pc_addr, 0); 199 in32rb(pc->pc_addr); 200 splx(s); 201 202 return data; 203 } 204 205 static void 206 uninorth_conf_write(void *cookie, pcitag_t tag, int reg, pcireg_t data) 207 { 208 pci_chipset_tag_t pc = cookie; 209 int32_t *daddr = pc->pc_data; 210 int bus, dev, func, s; 211 uint32_t x; 212 213 /* UniNorth seems to have a 64bit data port */ 214 if (reg & 0x04) 215 daddr++; 216 217 pci_decompose_tag(pc, tag, &bus, &dev, &func); 218 219 if (func > 7) 220 panic("pci_conf_write: func > 7"); 221 222 if (bus == pc->pc_bus) { 223 if (dev < 11) 224 panic("pci_conf_write: dev < 11"); 225 x = (1 << dev) | (func << 8) | reg; 226 } else 227 x = tag | reg | 1; 228 229 s = splhigh(); 230 231 out32rb(pc->pc_addr, x); 232 in32rb(pc->pc_addr); 233 out32rb(daddr, data); 234 out32rb(pc->pc_addr, 0); 235 in32rb(pc->pc_addr); 236 237 splx(s); 238 } 239